gtsc.c revision 1.14
1 /* $NetBSD: gtsc.c,v 1.14 1996/03/17 01:17:22 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/cc.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/dmavar.h> 49 #include <amiga/dev/sbicreg.h> 50 #include <amiga/dev/sbicvar.h> 51 #include <amiga/dev/gtscreg.h> 52 #include <amiga/dev/zbusvar.h> 53 #include <amiga/dev/gvpbusvar.h> 54 55 void gtscattach __P((struct device *, struct device *, void *)); 56 int gtscmatch __P((struct device *, void *, void *)); 57 int gtscprint __P((void *auxp, char *)); 58 59 void gtsc_enintr __P((struct sbic_softc *)); 60 void gtsc_dmastop __P((struct sbic_softc *)); 61 int gtsc_dmanext __P((struct sbic_softc *)); 62 int gtsc_dmaintr __P((struct sbic_softc *)); 63 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 64 65 struct scsi_adapter gtsc_scsiswitch = { 66 sbic_scsicmd, 67 sbic_minphys, 68 0, /* no lun support */ 69 0, /* no lun support */ 70 }; 71 72 struct scsi_device gtsc_scsidev = { 73 NULL, /* use default error handler */ 74 NULL, /* have a queue served by this ??? */ 75 NULL, /* have no async handler ??? */ 76 NULL, /* Use default done routine */ 77 }; 78 79 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 80 int gtsc_dmamask = 0; 81 int gtsc_dmabounce = 0; 82 int gtsc_clock_override = 0; 83 84 #ifdef DEBUG 85 int gtsc_debug = 0; 86 #endif 87 88 struct cfattach gtsc_ca = { 89 sizeof(struct sbic_softc), gtscmatch, gtscattach 90 }; 91 92 struct cfdriver gtsc_cd = { 93 NULL, "gtsc", DV_DULL, NULL, 0 94 }; 95 96 int 97 gtscmatch(pdp, match, auxp) 98 struct device *pdp; 99 void *match, *auxp; 100 { 101 struct cfdata *cdp = match; 102 struct gvpbus_args *gap; 103 104 gap = auxp; 105 if (gap->flags & GVP_SCSI) 106 return(1); 107 return(0); 108 } 109 110 /* 111 * attach all devices on our board. 112 */ 113 void 114 gtscattach(pdp, dp, auxp) 115 struct device *pdp, *dp; 116 void *auxp; 117 { 118 volatile struct sdmac *rp; 119 struct gvpbus_args *gap; 120 struct sbic_softc *sc; 121 122 gap = auxp; 123 sc = (struct sbic_softc *)dp; 124 sc->sc_cregs = rp = gap->zargs.va; 125 126 /* 127 * disable ints and reset bank register 128 */ 129 rp->CNTR = 0; 130 if ((gap->flags & GVP_NOBANK) == 0) 131 rp->bank = 0; 132 133 sc->sc_dmago = gtsc_dmago; 134 sc->sc_enintr = gtsc_enintr; 135 sc->sc_dmanext = gtsc_dmanext; 136 sc->sc_dmastop = gtsc_dmastop; 137 sc->sc_dmacmd = 0; 138 139 sc->sc_flags |= SBICF_BADDMA; 140 if (gtsc_dmamask) 141 sc->sc_dmamask = gtsc_dmamask; 142 else if (gap->flags & GVP_24BITDMA) 143 sc->sc_dmamask = ~0x00ffffff; 144 else if (gap->flags & GVP_25BITDMA) 145 sc->sc_dmamask = ~0x01ffffff; 146 else 147 sc->sc_dmamask = ~0x07ffffff; 148 printf(": dmamask 0x%x", ~sc->sc_dmamask); 149 150 if ((gap->flags & GVP_NOBANK) == 0) 151 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 152 153 #if 0 154 /* 155 * if the user requests a bounce buffer or 156 * the users kva space is not ztwo and dma needs it 157 * try and allocate a bounce buffer. If we allocate 158 * one and it is in ztwo space leave maxdma to user 159 * setting or default to MAXPHYS else the address must 160 * be on the chip bus so decrease it to either the users 161 * setting or 1024 bytes. 162 * 163 * XXX this needs to change if we move to multiple memory segments. 164 */ 165 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 166 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 167 if (isztwomem(sc->sc_dmabuffer)) 168 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 169 else if (gtsc_maxdma == 0) { 170 gtsc_maxdma = 1024; 171 printf(" bounce pa 0x%x", 172 PREP_DMA_MEM(sc->sc_dmabuffer)); 173 } 174 } 175 #endif 176 if (gtsc_maxdma == 0) 177 gtsc_maxdma = MAXPHYS; 178 179 printf(" flags %x", gap->flags); 180 printf(" maxdma %d\n", gtsc_maxdma); 181 182 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 183 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 184 ((gap->flags & GVP_14MHZ) ? 143 : 72); 185 printf("sc_clkfreg: %d.%dMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 186 187 sc->sc_link.adapter_softc = sc; 188 sc->sc_link.adapter_target = 7; 189 sc->sc_link.adapter = >sc_scsiswitch; 190 sc->sc_link.device = >sc_scsidev; 191 sc->sc_link.openings = 2; 192 193 sbicinit(sc); 194 195 sc->sc_isr.isr_intr = gtsc_dmaintr; 196 sc->sc_isr.isr_arg = sc; 197 sc->sc_isr.isr_ipl = 2; 198 add_isr(&sc->sc_isr); 199 200 /* 201 * attach all scsi units on us 202 */ 203 config_found(dp, &sc->sc_link, gtscprint); 204 } 205 206 /* 207 * print diag if pnp is NULL else just extra 208 */ 209 int 210 gtscprint(auxp, pnp) 211 void *auxp; 212 char *pnp; 213 { 214 if (pnp == NULL) 215 return(UNCONF); 216 return(QUIET); 217 } 218 219 void 220 gtsc_enintr(dev) 221 struct sbic_softc *dev; 222 { 223 volatile struct sdmac *sdp; 224 225 sdp = dev->sc_cregs; 226 227 dev->sc_flags |= SBICF_INTR; 228 sdp->CNTR = GVP_CNTR_INTEN; 229 } 230 231 int 232 gtsc_dmago(dev, addr, count, flags) 233 struct sbic_softc *dev; 234 char *addr; 235 int count, flags; 236 { 237 volatile struct sdmac *sdp; 238 239 sdp = dev->sc_cregs; 240 /* 241 * Set up the command word based on flags 242 */ 243 dev->sc_dmacmd = GVP_CNTR_INTEN; 244 if ((flags & DMAGO_READ) == 0) 245 dev->sc_dmacmd |= GVP_CNTR_DDIR; 246 247 #ifdef DEBUG 248 if (gtsc_debug & DDB_IO) 249 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 250 #endif 251 dev->sc_flags |= SBICF_INTR; 252 sdp->CNTR = dev->sc_dmacmd; 253 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) { 254 #if 1 255 printf("gtsc_dmago: pa %08x->%08x dmacmd %x", 256 dev->sc_cur->dc_addr, 257 (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask, 258 dev->sc_dmacmd); 259 #endif 260 sdp->ACR = 0x00f80000; /***********************************/ 261 } else 262 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 263 if (dev->gtsc_bankmask) 264 sdp->bank = 265 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 266 sdp->ST_DMA = 1; 267 268 /* 269 * restrict transfer count to maximum 270 */ 271 if (dev->sc_tcnt > gtsc_maxdma) 272 dev->sc_tcnt = gtsc_maxdma; 273 #if 1 274 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) 275 printf(" tcnt %d\n", dev->sc_tcnt); 276 #endif 277 return(dev->sc_tcnt); 278 } 279 280 void 281 gtsc_dmastop(dev) 282 struct sbic_softc *dev; 283 { 284 volatile struct sdmac *sdp; 285 int s; 286 287 sdp = dev->sc_cregs; 288 289 #ifdef DEBUG 290 if (gtsc_debug & DDB_FOLLOW) 291 printf("gtsc_dmastop()\n"); 292 #endif 293 if (dev->sc_dmacmd) { 294 /* 295 * clear possible interrupt and stop dma 296 */ 297 s = splbio(); 298 sdp->CNTR &= ~GVP_CNTR_INT_P; 299 sdp->SP_DMA = 1; 300 dev->sc_dmacmd = 0; 301 splx(s); 302 } 303 } 304 305 int 306 gtsc_dmaintr(dev) 307 struct sbic_softc *dev; 308 { 309 volatile struct sdmac *sdp; 310 int stat; 311 312 sdp = dev->sc_cregs; 313 stat = sdp->CNTR; 314 if ((stat & GVP_CNTR_INT_P) == 0) 315 return (0); 316 #ifdef DEBUG 317 if (gtsc_debug & DDB_FOLLOW) 318 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 319 #endif 320 if (dev->sc_flags & SBICF_INTR) 321 if (sbicintr(dev)) 322 return (1); 323 return(0); 324 } 325 326 327 int 328 gtsc_dmanext(dev) 329 struct sbic_softc *dev; 330 { 331 volatile struct sdmac *sdp; 332 int i, stat; 333 334 sdp = dev->sc_cregs; 335 336 if (dev->sc_cur > dev->sc_last) { 337 /* shouldn't happen !! */ 338 printf("gtsc_dmanext at end !!!\n"); 339 gtsc_dmastop(dev); 340 return(0); 341 } 342 /* 343 * clear possible interrupt and stop dma 344 */ 345 sdp->CNTR &= ~GVP_CNTR_INT_P; 346 sdp->SP_DMA = 1; 347 348 sdp->CNTR = dev->sc_dmacmd; 349 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 350 if (dev->gtsc_bankmask) 351 sdp->bank = 352 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 353 sdp->ST_DMA = 1; 354 355 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 356 if (dev->sc_tcnt > gtsc_maxdma) 357 dev->sc_tcnt = gtsc_maxdma; 358 #ifdef DEBUG 359 if (gtsc_debug & DDB_FOLLOW) 360 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 361 #endif 362 return(dev->sc_tcnt); 363 } 364 365 #ifdef DEBUG 366 void 367 gtsc_dump() 368 { 369 int i; 370 371 for (i = 0; i < gtsc_cd.cd_ndevs; ++i) 372 if (gtsc_cd.cd_devs[i]) 373 sbic_dump(gtsc_cd.cd_devs[i]); 374 } 375 #endif 376
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