gtsc.c revision 1.22
1 /* $NetBSD: gtsc.c,v 1.22 1997/08/27 11:23:09 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/cc.h> 47 #include <amiga/amiga/device.h> 48 #include <amiga/amiga/isr.h> 49 #include <amiga/dev/dmavar.h> 50 #include <amiga/dev/sbicreg.h> 51 #include <amiga/dev/sbicvar.h> 52 #include <amiga/dev/gtscreg.h> 53 #include <amiga/dev/zbusvar.h> 54 #include <amiga/dev/gvpbusvar.h> 55 56 void gtscattach __P((struct device *, struct device *, void *)); 57 int gtscmatch __P((struct device *, struct cfdata *, void *)); 58 59 void gtsc_enintr __P((struct sbic_softc *)); 60 void gtsc_dmastop __P((struct sbic_softc *)); 61 int gtsc_dmanext __P((struct sbic_softc *)); 62 int gtsc_dmaintr __P((void *)); 63 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 64 65 #ifdef DEBUG 66 void gtsc_dump __P((void)); 67 #endif 68 69 struct scsipi_adapter gtsc_scsiswitch = { 70 sbic_scsicmd, 71 sbic_minphys, 72 0, /* no lun support */ 73 0, /* no lun support */ 74 }; 75 76 struct scsipi_device gtsc_scsidev = { 77 NULL, /* use default error handler */ 78 NULL, /* have a queue served by this ??? */ 79 NULL, /* have no async handler ??? */ 80 NULL, /* Use default done routine */ 81 }; 82 83 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 84 int gtsc_dmamask = 0; 85 int gtsc_dmabounce = 0; 86 int gtsc_clock_override = 0; 87 88 #ifdef DEBUG 89 int gtsc_debug = 0; 90 #endif 91 92 struct cfattach gtsc_ca = { 93 sizeof(struct sbic_softc), gtscmatch, gtscattach 94 }; 95 96 struct cfdriver gtsc_cd = { 97 NULL, "gtsc", DV_DULL, NULL, 0 98 }; 99 100 int 101 gtscmatch(pdp, cfp, auxp) 102 struct device *pdp; 103 struct cfdata *cfp; 104 void *auxp; 105 { 106 struct gvpbus_args *gap; 107 108 gap = auxp; 109 if (gap->flags & GVP_SCSI) 110 return(1); 111 return(0); 112 } 113 114 /* 115 * attach all devices on our board. 116 */ 117 void 118 gtscattach(pdp, dp, auxp) 119 struct device *pdp, *dp; 120 void *auxp; 121 { 122 volatile struct sdmac *rp; 123 struct gvpbus_args *gap; 124 struct sbic_softc *sc; 125 126 gap = auxp; 127 sc = (struct sbic_softc *)dp; 128 sc->sc_cregs = rp = gap->zargs.va; 129 130 /* 131 * disable ints and reset bank register 132 */ 133 rp->CNTR = 0; 134 if ((gap->flags & GVP_NOBANK) == 0) 135 rp->bank = 0; 136 137 sc->sc_dmago = gtsc_dmago; 138 sc->sc_enintr = gtsc_enintr; 139 sc->sc_dmanext = gtsc_dmanext; 140 sc->sc_dmastop = gtsc_dmastop; 141 sc->sc_dmacmd = 0; 142 143 sc->sc_flags |= SBICF_BADDMA; 144 if (gtsc_dmamask) 145 sc->sc_dmamask = gtsc_dmamask; 146 else if (gap->flags & GVP_24BITDMA) 147 sc->sc_dmamask = ~0x00ffffff; 148 else if (gap->flags & GVP_25BITDMA) 149 sc->sc_dmamask = ~0x01ffffff; 150 else 151 sc->sc_dmamask = ~0x07ffffff; 152 printf(": dmamask 0x%lx", ~sc->sc_dmamask); 153 154 if ((gap->flags & GVP_NOBANK) == 0) 155 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 156 157 #if 0 158 /* 159 * if the user requests a bounce buffer or 160 * the users kva space is not ztwo and dma needs it 161 * try and allocate a bounce buffer. If we allocate 162 * one and it is in ztwo space leave maxdma to user 163 * setting or default to MAXPHYS else the address must 164 * be on the chip bus so decrease it to either the users 165 * setting or 1024 bytes. 166 * 167 * XXX this needs to change if we move to multiple memory segments. 168 */ 169 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 170 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 171 if (isztwomem(sc->sc_dmabuffer)) 172 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 173 else if (gtsc_maxdma == 0) { 174 gtsc_maxdma = 1024; 175 printf(" bounce pa 0x%x", 176 PREP_DMA_MEM(sc->sc_dmabuffer)); 177 } 178 } 179 #endif 180 if (gtsc_maxdma == 0) 181 gtsc_maxdma = MAXPHYS; 182 183 printf(" flags %x", gap->flags); 184 printf(" maxdma %d\n", gtsc_maxdma); 185 186 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 187 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 188 ((gap->flags & GVP_14MHZ) ? 143 : 72); 189 printf("sc_clkfreg: %ld.%ldMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 190 191 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 192 sc->sc_link.adapter_softc = sc; 193 sc->sc_link.scsipi_scsi.adapter_target = 7; 194 sc->sc_link.adapter = >sc_scsiswitch; 195 sc->sc_link.device = >sc_scsidev; 196 sc->sc_link.openings = 2; 197 sc->sc_link.scsipi_scsi.max_target = 7; 198 sc->sc_link.type = BUS_SCSI; 199 200 sbicinit(sc); 201 202 sc->sc_isr.isr_intr = gtsc_dmaintr; 203 sc->sc_isr.isr_arg = sc; 204 sc->sc_isr.isr_ipl = 2; 205 add_isr(&sc->sc_isr); 206 207 /* 208 * attach all scsi units on us 209 */ 210 config_found(dp, &sc->sc_link, scsiprint); 211 } 212 213 void 214 gtsc_enintr(dev) 215 struct sbic_softc *dev; 216 { 217 volatile struct sdmac *sdp; 218 219 sdp = dev->sc_cregs; 220 221 dev->sc_flags |= SBICF_INTR; 222 sdp->CNTR = GVP_CNTR_INTEN; 223 } 224 225 int 226 gtsc_dmago(dev, addr, count, flags) 227 struct sbic_softc *dev; 228 char *addr; 229 int count, flags; 230 { 231 volatile struct sdmac *sdp; 232 233 sdp = dev->sc_cregs; 234 /* 235 * Set up the command word based on flags 236 */ 237 dev->sc_dmacmd = GVP_CNTR_INTEN; 238 if ((flags & DMAGO_READ) == 0) 239 dev->sc_dmacmd |= GVP_CNTR_DDIR; 240 241 #ifdef DEBUG 242 if (gtsc_debug & DDB_IO) 243 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 244 #endif 245 dev->sc_flags |= SBICF_INTR; 246 sdp->CNTR = dev->sc_dmacmd; 247 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) { 248 #if 1 249 printf("gtsc_dmago: pa %p->%lx dmacmd %x", 250 dev->sc_cur->dc_addr, 251 (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask, 252 dev->sc_dmacmd); 253 #endif 254 sdp->ACR = 0x00f80000; /***********************************/ 255 } else 256 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 257 if (dev->gtsc_bankmask) 258 sdp->bank = 259 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 260 sdp->ST_DMA = 1; 261 262 /* 263 * restrict transfer count to maximum 264 */ 265 if (dev->sc_tcnt > gtsc_maxdma) 266 dev->sc_tcnt = gtsc_maxdma; 267 #if 1 268 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) 269 printf(" tcnt %ld\n", dev->sc_tcnt); 270 #endif 271 return(dev->sc_tcnt); 272 } 273 274 void 275 gtsc_dmastop(dev) 276 struct sbic_softc *dev; 277 { 278 volatile struct sdmac *sdp; 279 int s; 280 281 sdp = dev->sc_cregs; 282 283 #ifdef DEBUG 284 if (gtsc_debug & DDB_FOLLOW) 285 printf("gtsc_dmastop()\n"); 286 #endif 287 if (dev->sc_dmacmd) { 288 /* 289 * clear possible interrupt and stop dma 290 */ 291 s = splbio(); 292 sdp->CNTR &= ~GVP_CNTR_INT_P; 293 sdp->SP_DMA = 1; 294 dev->sc_dmacmd = 0; 295 splx(s); 296 } 297 } 298 299 int 300 gtsc_dmaintr(arg) 301 void *arg; 302 { 303 struct sbic_softc *dev = arg; 304 volatile struct sdmac *sdp; 305 int stat; 306 307 sdp = dev->sc_cregs; 308 stat = sdp->CNTR; 309 if ((stat & GVP_CNTR_INT_P) == 0) 310 return (0); 311 #ifdef DEBUG 312 if (gtsc_debug & DDB_FOLLOW) 313 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 314 #endif 315 if (dev->sc_flags & SBICF_INTR) 316 if (sbicintr(dev)) 317 return (1); 318 return(0); 319 } 320 321 322 int 323 gtsc_dmanext(dev) 324 struct sbic_softc *dev; 325 { 326 volatile struct sdmac *sdp; 327 328 sdp = dev->sc_cregs; 329 330 if (dev->sc_cur > dev->sc_last) { 331 /* shouldn't happen !! */ 332 printf("gtsc_dmanext at end !!!\n"); 333 gtsc_dmastop(dev); 334 return(0); 335 } 336 /* 337 * clear possible interrupt and stop dma 338 */ 339 sdp->CNTR &= ~GVP_CNTR_INT_P; 340 sdp->SP_DMA = 1; 341 342 sdp->CNTR = dev->sc_dmacmd; 343 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 344 if (dev->gtsc_bankmask) 345 sdp->bank = 346 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 347 sdp->ST_DMA = 1; 348 349 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 350 if (dev->sc_tcnt > gtsc_maxdma) 351 dev->sc_tcnt = gtsc_maxdma; 352 #ifdef DEBUG 353 if (gtsc_debug & DDB_FOLLOW) 354 printf("gtsc_dmanext ret: %ld\n", dev->sc_tcnt); 355 #endif 356 return(dev->sc_tcnt); 357 } 358 359 #ifdef DEBUG 360 void 361 gtsc_dump() 362 { 363 int i; 364 365 for (i = 0; i < gtsc_cd.cd_ndevs; ++i) 366 if (gtsc_cd.cd_devs[i]) 367 sbic_dump(gtsc_cd.cd_devs[i]); 368 } 369 #endif 370
Indexes created Mon Sep 29 13:09:55 GMT 2025