gtsc.c revision 1.26
1 /* $NetBSD: gtsc.c,v 1.26 1998/11/19 21:44:36 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/cc.h> 47 #include <amiga/amiga/device.h> 48 #include <amiga/amiga/isr.h> 49 #include <amiga/dev/dmavar.h> 50 #include <amiga/dev/sbicreg.h> 51 #include <amiga/dev/sbicvar.h> 52 #include <amiga/dev/gtscreg.h> 53 #include <amiga/dev/zbusvar.h> 54 #include <amiga/dev/gvpbusvar.h> 55 56 void gtscattach __P((struct device *, struct device *, void *)); 57 int gtscmatch __P((struct device *, struct cfdata *, void *)); 58 59 void gtsc_enintr __P((struct sbic_softc *)); 60 void gtsc_dmastop __P((struct sbic_softc *)); 61 int gtsc_dmanext __P((struct sbic_softc *)); 62 int gtsc_dmaintr __P((void *)); 63 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 64 65 #ifdef DEBUG 66 void gtsc_dump __P((void)); 67 #endif 68 69 struct scsipi_device gtsc_scsidev = { 70 NULL, /* use default error handler */ 71 NULL, /* have a queue served by this ??? */ 72 NULL, /* have no async handler ??? */ 73 NULL, /* Use default done routine */ 74 }; 75 76 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 77 int gtsc_dmamask = 0; 78 int gtsc_dmabounce = 0; 79 int gtsc_clock_override = 0; 80 81 #ifdef DEBUG 82 int gtsc_debug = 0; 83 #endif 84 85 struct cfattach gtsc_ca = { 86 sizeof(struct sbic_softc), gtscmatch, gtscattach 87 }; 88 89 int 90 gtscmatch(pdp, cfp, auxp) 91 struct device *pdp; 92 struct cfdata *cfp; 93 void *auxp; 94 { 95 struct gvpbus_args *gap; 96 97 gap = auxp; 98 if (gap->flags & GVP_SCSI) 99 return(1); 100 return(0); 101 } 102 103 /* 104 * attach all devices on our board. 105 */ 106 void 107 gtscattach(pdp, dp, auxp) 108 struct device *pdp, *dp; 109 void *auxp; 110 { 111 volatile struct sdmac *rp; 112 struct gvpbus_args *gap; 113 struct sbic_softc *sc; 114 115 gap = auxp; 116 sc = (struct sbic_softc *)dp; 117 sc->sc_cregs = rp = gap->zargs.va; 118 119 /* 120 * disable ints and reset bank register 121 */ 122 rp->CNTR = 0; 123 if ((gap->flags & GVP_NOBANK) == 0) 124 rp->bank = 0; 125 126 sc->sc_dmago = gtsc_dmago; 127 sc->sc_enintr = gtsc_enintr; 128 sc->sc_dmanext = gtsc_dmanext; 129 sc->sc_dmastop = gtsc_dmastop; 130 sc->sc_dmacmd = 0; 131 132 sc->sc_flags |= SBICF_BADDMA; 133 if (gtsc_dmamask) 134 sc->sc_dmamask = gtsc_dmamask; 135 else if (gap->flags & GVP_24BITDMA) 136 sc->sc_dmamask = ~0x00ffffff; 137 else if (gap->flags & GVP_25BITDMA) 138 sc->sc_dmamask = ~0x01ffffff; 139 else 140 sc->sc_dmamask = ~0x07ffffff; 141 printf(": dmamask 0x%lx", ~sc->sc_dmamask); 142 143 if ((gap->flags & GVP_NOBANK) == 0) 144 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 145 146 #if 0 147 /* 148 * if the user requests a bounce buffer or 149 * the users kva space is not ztwo and dma needs it 150 * try and allocate a bounce buffer. If we allocate 151 * one and it is in ztwo space leave maxdma to user 152 * setting or default to MAXPHYS else the address must 153 * be on the chip bus so decrease it to either the users 154 * setting or 1024 bytes. 155 * 156 * XXX this needs to change if we move to multiple memory segments. 157 */ 158 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 159 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 160 if (isztwomem(sc->sc_dmabuffer)) 161 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 162 else if (gtsc_maxdma == 0) { 163 gtsc_maxdma = 1024; 164 printf(" bounce pa 0x%x", 165 PREP_DMA_MEM(sc->sc_dmabuffer)); 166 } 167 } 168 #endif 169 if (gtsc_maxdma == 0) 170 gtsc_maxdma = MAXPHYS; 171 172 printf(" flags %x", gap->flags); 173 printf(" maxdma %d\n", gtsc_maxdma); 174 175 sc->sc_sbic.sbic_asr_p = (volatile unsigned char *)rp + 0x61; 176 sc->sc_sbic.sbic_value_p = (volatile unsigned char *)rp + 0x63; 177 178 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 179 ((gap->flags & GVP_14MHZ) ? 143 : 72); 180 printf("sc_clkfreg: %ld.%ldMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 181 182 sc->sc_adapter.scsipi_cmd = sbic_scsicmd; 183 sc->sc_adapter.scsipi_minphys = sbic_minphys; 184 185 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 186 sc->sc_link.adapter_softc = sc; 187 sc->sc_link.scsipi_scsi.adapter_target = 7; 188 sc->sc_link.adapter = &sc->sc_adapter; 189 sc->sc_link.device = >sc_scsidev; 190 sc->sc_link.openings = 2; 191 sc->sc_link.scsipi_scsi.max_target = 7; 192 sc->sc_link.type = BUS_SCSI; 193 194 sbicinit(sc); 195 196 sc->sc_isr.isr_intr = gtsc_dmaintr; 197 sc->sc_isr.isr_arg = sc; 198 sc->sc_isr.isr_ipl = 2; 199 add_isr(&sc->sc_isr); 200 201 /* 202 * attach all scsi units on us 203 */ 204 config_found(dp, &sc->sc_link, scsiprint); 205 } 206 207 void 208 gtsc_enintr(dev) 209 struct sbic_softc *dev; 210 { 211 volatile struct sdmac *sdp; 212 213 sdp = dev->sc_cregs; 214 215 dev->sc_flags |= SBICF_INTR; 216 sdp->CNTR = GVP_CNTR_INTEN; 217 } 218 219 int 220 gtsc_dmago(dev, addr, count, flags) 221 struct sbic_softc *dev; 222 char *addr; 223 int count, flags; 224 { 225 volatile struct sdmac *sdp; 226 227 sdp = dev->sc_cregs; 228 /* 229 * Set up the command word based on flags 230 */ 231 dev->sc_dmacmd = GVP_CNTR_INTEN; 232 if ((flags & DMAGO_READ) == 0) 233 dev->sc_dmacmd |= GVP_CNTR_DDIR; 234 235 #ifdef DEBUG 236 if (gtsc_debug & DDB_IO) 237 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 238 #endif 239 dev->sc_flags |= SBICF_INTR; 240 sdp->CNTR = dev->sc_dmacmd; 241 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) { 242 #if 1 243 printf("gtsc_dmago: pa %p->%lx dmacmd %x", 244 dev->sc_cur->dc_addr, 245 (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask, 246 dev->sc_dmacmd); 247 #endif 248 sdp->ACR = 0x00f80000; /***********************************/ 249 } else 250 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 251 if (dev->gtsc_bankmask) 252 sdp->bank = 253 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 254 sdp->ST_DMA = 1; 255 256 /* 257 * restrict transfer count to maximum 258 */ 259 if (dev->sc_tcnt > gtsc_maxdma) 260 dev->sc_tcnt = gtsc_maxdma; 261 #if 1 262 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) 263 printf(" tcnt %ld\n", dev->sc_tcnt); 264 #endif 265 return(dev->sc_tcnt); 266 } 267 268 void 269 gtsc_dmastop(dev) 270 struct sbic_softc *dev; 271 { 272 volatile struct sdmac *sdp; 273 int s; 274 275 sdp = dev->sc_cregs; 276 277 #ifdef DEBUG 278 if (gtsc_debug & DDB_FOLLOW) 279 printf("gtsc_dmastop()\n"); 280 #endif 281 if (dev->sc_dmacmd) { 282 /* 283 * clear possible interrupt and stop dma 284 */ 285 s = splbio(); 286 sdp->CNTR &= ~GVP_CNTR_INT_P; 287 sdp->SP_DMA = 1; 288 dev->sc_dmacmd = 0; 289 splx(s); 290 } 291 } 292 293 int 294 gtsc_dmaintr(arg) 295 void *arg; 296 { 297 struct sbic_softc *dev = arg; 298 volatile struct sdmac *sdp; 299 int stat; 300 301 sdp = dev->sc_cregs; 302 stat = sdp->CNTR; 303 if ((stat & GVP_CNTR_INT_P) == 0) 304 return (0); 305 #ifdef DEBUG 306 if (gtsc_debug & DDB_FOLLOW) 307 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 308 #endif 309 if (dev->sc_flags & SBICF_INTR) 310 if (sbicintr(dev)) 311 return (1); 312 return(0); 313 } 314 315 316 int 317 gtsc_dmanext(dev) 318 struct sbic_softc *dev; 319 { 320 volatile struct sdmac *sdp; 321 322 sdp = dev->sc_cregs; 323 324 if (dev->sc_cur > dev->sc_last) { 325 /* shouldn't happen !! */ 326 printf("gtsc_dmanext at end !!!\n"); 327 gtsc_dmastop(dev); 328 return(0); 329 } 330 /* 331 * clear possible interrupt and stop dma 332 */ 333 sdp->CNTR &= ~GVP_CNTR_INT_P; 334 sdp->SP_DMA = 1; 335 336 sdp->CNTR = dev->sc_dmacmd; 337 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 338 if (dev->gtsc_bankmask) 339 sdp->bank = 340 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 341 sdp->ST_DMA = 1; 342 343 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 344 if (dev->sc_tcnt > gtsc_maxdma) 345 dev->sc_tcnt = gtsc_maxdma; 346 #ifdef DEBUG 347 if (gtsc_debug & DDB_FOLLOW) 348 printf("gtsc_dmanext ret: %ld\n", dev->sc_tcnt); 349 #endif 350 return(dev->sc_tcnt); 351 } 352 353 #ifdef DEBUG 354 void 355 gtsc_dump() 356 { 357 extern struct cfdriver gtsc_cd; 358 int i; 359 360 for (i = 0; i < gtsc_cd.cd_ndevs; ++i) 361 if (gtsc_cd.cd_devs[i]) 362 sbic_dump(gtsc_cd.cd_devs[i]); 363 } 364 #endif 365
Indexes created Mon Sep 29 21:09:56 GMT 2025