gtsc.c revision 1.29
1 /* $NetBSD: gtsc.c,v 1.29 2002/01/26 13:40:56 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/cc.h> 47 #include <amiga/amiga/device.h> 48 #include <amiga/amiga/isr.h> 49 #include <amiga/dev/dmavar.h> 50 #include <amiga/dev/sbicreg.h> 51 #include <amiga/dev/sbicvar.h> 52 #include <amiga/dev/gtscreg.h> 53 #include <amiga/dev/zbusvar.h> 54 #include <amiga/dev/gvpbusvar.h> 55 56 void gtscattach(struct device *, struct device *, void *); 57 int gtscmatch(struct device *, struct cfdata *, void *); 58 59 void gtsc_enintr(struct sbic_softc *); 60 void gtsc_dmastop(struct sbic_softc *); 61 int gtsc_dmanext(struct sbic_softc *); 62 int gtsc_dmaintr(void *); 63 int gtsc_dmago(struct sbic_softc *, char *, int, int); 64 65 #ifdef DEBUG 66 void gtsc_dump(void); 67 #endif 68 69 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 70 int gtsc_dmamask = 0; 71 int gtsc_dmabounce = 0; 72 int gtsc_clock_override = 0; 73 74 #ifdef DEBUG 75 int gtsc_debug = 0; 76 #endif 77 78 struct cfattach gtsc_ca = { 79 sizeof(struct sbic_softc), gtscmatch, gtscattach 80 }; 81 82 int 83 gtscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 84 { 85 struct gvpbus_args *gap; 86 87 gap = auxp; 88 if (gap->flags & GVP_SCSI) 89 return(1); 90 return(0); 91 } 92 93 /* 94 * attach all devices on our board. 95 */ 96 void 97 gtscattach(struct device *pdp, struct device *dp, void *auxp) 98 { 99 volatile struct sdmac *rp; 100 struct gvpbus_args *gap; 101 struct sbic_softc *sc = (struct sbic_softc *)dp; 102 struct scsipi_adapter *adapt = &sc->sc_adapter; 103 struct scsipi_channel *chan = &sc->sc_channel; 104 105 gap = auxp; 106 sc->sc_cregs = rp = gap->zargs.va; 107 108 /* 109 * disable ints and reset bank register 110 */ 111 rp->CNTR = 0; 112 if ((gap->flags & GVP_NOBANK) == 0) 113 rp->bank = 0; 114 115 sc->sc_dmago = gtsc_dmago; 116 sc->sc_enintr = gtsc_enintr; 117 sc->sc_dmanext = gtsc_dmanext; 118 sc->sc_dmastop = gtsc_dmastop; 119 sc->sc_dmacmd = 0; 120 121 sc->sc_flags |= SBICF_BADDMA; 122 if (gtsc_dmamask) 123 sc->sc_dmamask = gtsc_dmamask; 124 else if (gap->flags & GVP_24BITDMA) 125 sc->sc_dmamask = ~0x00ffffff; 126 else if (gap->flags & GVP_25BITDMA) 127 sc->sc_dmamask = ~0x01ffffff; 128 else 129 sc->sc_dmamask = ~0x07ffffff; 130 printf(": dmamask 0x%lx", ~sc->sc_dmamask); 131 132 if ((gap->flags & GVP_NOBANK) == 0) 133 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 134 135 #if 0 136 /* 137 * if the user requests a bounce buffer or 138 * the users kva space is not ztwo and dma needs it 139 * try and allocate a bounce buffer. If we allocate 140 * one and it is in ztwo space leave maxdma to user 141 * setting or default to MAXPHYS else the address must 142 * be on the chip bus so decrease it to either the users 143 * setting or 1024 bytes. 144 * 145 * XXX this needs to change if we move to multiple memory segments. 146 */ 147 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 148 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 149 if (isztwomem(sc->sc_dmabuffer)) 150 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 151 else if (gtsc_maxdma == 0) { 152 gtsc_maxdma = 1024; 153 printf(" bounce pa 0x%x", 154 PREP_DMA_MEM(sc->sc_dmabuffer)); 155 } 156 } 157 #endif 158 if (gtsc_maxdma == 0) 159 gtsc_maxdma = MAXPHYS; 160 161 printf(" flags %x", gap->flags); 162 printf(" maxdma %d\n", gtsc_maxdma); 163 164 sc->sc_sbic.sbic_asr_p = (volatile unsigned char *)rp + 0x61; 165 sc->sc_sbic.sbic_value_p = (volatile unsigned char *)rp + 0x63; 166 167 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 168 ((gap->flags & GVP_14MHZ) ? 143 : 72); 169 printf("sc_clkfreg: %ld.%ldMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 170 171 /* 172 * Fill in the scsipi_adapter. 173 */ 174 memset(adapt, 0, sizeof(*adapt)); 175 adapt->adapt_dev = &sc->sc_dev; 176 adapt->adapt_nchannels = 1; 177 adapt->adapt_openings = 7; 178 adapt->adapt_max_periph = 1; 179 adapt->adapt_request = sbic_scsipi_request; 180 adapt->adapt_minphys = sbic_minphys; 181 182 /* 183 * Fill in the scsipi_channel. 184 */ 185 memset(chan, 0, sizeof(*chan)); 186 chan->chan_adapter = adapt; 187 chan->chan_bustype = &scsi_bustype; 188 chan->chan_channel = 0; 189 chan->chan_ntargets = 8; 190 chan->chan_nluns = 8; 191 chan->chan_id = 7; 192 193 sbicinit(sc); 194 195 sc->sc_isr.isr_intr = gtsc_dmaintr; 196 sc->sc_isr.isr_arg = sc; 197 sc->sc_isr.isr_ipl = 2; 198 add_isr(&sc->sc_isr); 199 200 /* 201 * attach all scsi units on us 202 */ 203 config_found(dp, chan, scsiprint); 204 } 205 206 void 207 gtsc_enintr(struct sbic_softc *dev) 208 { 209 volatile struct sdmac *sdp; 210 211 sdp = dev->sc_cregs; 212 213 dev->sc_flags |= SBICF_INTR; 214 sdp->CNTR = GVP_CNTR_INTEN; 215 } 216 217 int 218 gtsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags) 219 { 220 volatile struct sdmac *sdp; 221 222 sdp = dev->sc_cregs; 223 /* 224 * Set up the command word based on flags 225 */ 226 dev->sc_dmacmd = GVP_CNTR_INTEN; 227 if ((flags & DMAGO_READ) == 0) 228 dev->sc_dmacmd |= GVP_CNTR_DDIR; 229 230 #ifdef DEBUG 231 if (gtsc_debug & DDB_IO) 232 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 233 #endif 234 dev->sc_flags |= SBICF_INTR; 235 sdp->CNTR = dev->sc_dmacmd; 236 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) { 237 #if 1 238 printf("gtsc_dmago: pa %p->%lx dmacmd %x", 239 dev->sc_cur->dc_addr, 240 (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask, 241 dev->sc_dmacmd); 242 #endif 243 sdp->ACR = 0x00f80000; /***********************************/ 244 } else 245 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 246 if (dev->gtsc_bankmask) 247 sdp->bank = 248 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 249 sdp->ST_DMA = 1; 250 251 /* 252 * restrict transfer count to maximum 253 */ 254 if (dev->sc_tcnt > gtsc_maxdma) 255 dev->sc_tcnt = gtsc_maxdma; 256 #if 1 257 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) 258 printf(" tcnt %ld\n", dev->sc_tcnt); 259 #endif 260 return(dev->sc_tcnt); 261 } 262 263 void 264 gtsc_dmastop(struct sbic_softc *dev) 265 { 266 volatile struct sdmac *sdp; 267 int s; 268 269 sdp = dev->sc_cregs; 270 271 #ifdef DEBUG 272 if (gtsc_debug & DDB_FOLLOW) 273 printf("gtsc_dmastop()\n"); 274 #endif 275 if (dev->sc_dmacmd) { 276 /* 277 * clear possible interrupt and stop dma 278 */ 279 s = splbio(); 280 sdp->CNTR &= ~GVP_CNTR_INT_P; 281 sdp->SP_DMA = 1; 282 dev->sc_dmacmd = 0; 283 splx(s); 284 } 285 } 286 287 int 288 gtsc_dmaintr(void *arg) 289 { 290 struct sbic_softc *dev = arg; 291 volatile struct sdmac *sdp; 292 int stat; 293 294 sdp = dev->sc_cregs; 295 stat = sdp->CNTR; 296 if ((stat & GVP_CNTR_INT_P) == 0) 297 return (0); 298 #ifdef DEBUG 299 if (gtsc_debug & DDB_FOLLOW) 300 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 301 #endif 302 if (dev->sc_flags & SBICF_INTR) 303 if (sbicintr(dev)) 304 return (1); 305 return(0); 306 } 307 308 309 int 310 gtsc_dmanext(struct sbic_softc *dev) 311 { 312 volatile struct sdmac *sdp; 313 314 sdp = dev->sc_cregs; 315 316 if (dev->sc_cur > dev->sc_last) { 317 /* shouldn't happen !! */ 318 printf("gtsc_dmanext at end !!!\n"); 319 gtsc_dmastop(dev); 320 return(0); 321 } 322 /* 323 * clear possible interrupt and stop dma 324 */ 325 sdp->CNTR &= ~GVP_CNTR_INT_P; 326 sdp->SP_DMA = 1; 327 328 sdp->CNTR = dev->sc_dmacmd; 329 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 330 if (dev->gtsc_bankmask) 331 sdp->bank = 332 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 333 sdp->ST_DMA = 1; 334 335 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 336 if (dev->sc_tcnt > gtsc_maxdma) 337 dev->sc_tcnt = gtsc_maxdma; 338 #ifdef DEBUG 339 if (gtsc_debug & DDB_FOLLOW) 340 printf("gtsc_dmanext ret: %ld\n", dev->sc_tcnt); 341 #endif 342 return(dev->sc_tcnt); 343 } 344 345 #ifdef DEBUG 346 void 347 gtsc_dump(void) 348 { 349 extern struct cfdriver gtsc_cd; 350 int i; 351 352 for (i = 0; i < gtsc_cd.cd_ndevs; ++i) 353 if (gtsc_cd.cd_devs[i]) 354 sbic_dump(gtsc_cd.cd_devs[i]); 355 } 356 #endif 357
Indexes created Mon Sep 29 21:09:56 GMT 2025