gtsc.c revision 1.30
1 /* $NetBSD: gtsc.c,v 1.30 2002/01/28 09:56:57 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: gtsc.c,v 1.30 2002/01/28 09:56:57 aymeric Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <dev/scsipi/scsi_all.h> 47 #include <dev/scsipi/scsipi_all.h> 48 #include <dev/scsipi/scsiconf.h> 49 #include <amiga/amiga/custom.h> 50 #include <amiga/amiga/cc.h> 51 #include <amiga/amiga/device.h> 52 #include <amiga/amiga/isr.h> 53 #include <amiga/dev/dmavar.h> 54 #include <amiga/dev/sbicreg.h> 55 #include <amiga/dev/sbicvar.h> 56 #include <amiga/dev/gtscreg.h> 57 #include <amiga/dev/zbusvar.h> 58 #include <amiga/dev/gvpbusvar.h> 59 60 void gtscattach(struct device *, struct device *, void *); 61 int gtscmatch(struct device *, struct cfdata *, void *); 62 63 void gtsc_enintr(struct sbic_softc *); 64 void gtsc_dmastop(struct sbic_softc *); 65 int gtsc_dmanext(struct sbic_softc *); 66 int gtsc_dmaintr(void *); 67 int gtsc_dmago(struct sbic_softc *, char *, int, int); 68 69 #ifdef DEBUG 70 void gtsc_dump(void); 71 #endif 72 73 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 74 int gtsc_dmamask = 0; 75 int gtsc_dmabounce = 0; 76 int gtsc_clock_override = 0; 77 78 #ifdef DEBUG 79 int gtsc_debug = 0; 80 #endif 81 82 struct cfattach gtsc_ca = { 83 sizeof(struct sbic_softc), gtscmatch, gtscattach 84 }; 85 86 int 87 gtscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 88 { 89 struct gvpbus_args *gap; 90 91 gap = auxp; 92 if (gap->flags & GVP_SCSI) 93 return(1); 94 return(0); 95 } 96 97 /* 98 * attach all devices on our board. 99 */ 100 void 101 gtscattach(struct device *pdp, struct device *dp, void *auxp) 102 { 103 volatile struct sdmac *rp; 104 struct gvpbus_args *gap; 105 struct sbic_softc *sc = (struct sbic_softc *)dp; 106 struct scsipi_adapter *adapt = &sc->sc_adapter; 107 struct scsipi_channel *chan = &sc->sc_channel; 108 109 gap = auxp; 110 sc->sc_cregs = rp = gap->zargs.va; 111 112 /* 113 * disable ints and reset bank register 114 */ 115 rp->CNTR = 0; 116 if ((gap->flags & GVP_NOBANK) == 0) 117 rp->bank = 0; 118 119 sc->sc_dmago = gtsc_dmago; 120 sc->sc_enintr = gtsc_enintr; 121 sc->sc_dmanext = gtsc_dmanext; 122 sc->sc_dmastop = gtsc_dmastop; 123 sc->sc_dmacmd = 0; 124 125 sc->sc_flags |= SBICF_BADDMA; 126 if (gtsc_dmamask) 127 sc->sc_dmamask = gtsc_dmamask; 128 else if (gap->flags & GVP_24BITDMA) 129 sc->sc_dmamask = ~0x00ffffff; 130 else if (gap->flags & GVP_25BITDMA) 131 sc->sc_dmamask = ~0x01ffffff; 132 else 133 sc->sc_dmamask = ~0x07ffffff; 134 printf(": dmamask 0x%lx", ~sc->sc_dmamask); 135 136 if ((gap->flags & GVP_NOBANK) == 0) 137 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 138 139 #if 0 140 /* 141 * if the user requests a bounce buffer or 142 * the users kva space is not ztwo and dma needs it 143 * try and allocate a bounce buffer. If we allocate 144 * one and it is in ztwo space leave maxdma to user 145 * setting or default to MAXPHYS else the address must 146 * be on the chip bus so decrease it to either the users 147 * setting or 1024 bytes. 148 * 149 * XXX this needs to change if we move to multiple memory segments. 150 */ 151 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 152 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 153 if (isztwomem(sc->sc_dmabuffer)) 154 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 155 else if (gtsc_maxdma == 0) { 156 gtsc_maxdma = 1024; 157 printf(" bounce pa 0x%x", 158 PREP_DMA_MEM(sc->sc_dmabuffer)); 159 } 160 } 161 #endif 162 if (gtsc_maxdma == 0) 163 gtsc_maxdma = MAXPHYS; 164 165 printf(" flags %x", gap->flags); 166 printf(" maxdma %d\n", gtsc_maxdma); 167 168 sc->sc_sbic.sbic_asr_p = (volatile unsigned char *)rp + 0x61; 169 sc->sc_sbic.sbic_value_p = (volatile unsigned char *)rp + 0x63; 170 171 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 172 ((gap->flags & GVP_14MHZ) ? 143 : 72); 173 printf("sc_clkfreg: %ld.%ldMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 174 175 /* 176 * Fill in the scsipi_adapter. 177 */ 178 memset(adapt, 0, sizeof(*adapt)); 179 adapt->adapt_dev = &sc->sc_dev; 180 adapt->adapt_nchannels = 1; 181 adapt->adapt_openings = 7; 182 adapt->adapt_max_periph = 1; 183 adapt->adapt_request = sbic_scsipi_request; 184 adapt->adapt_minphys = sbic_minphys; 185 186 /* 187 * Fill in the scsipi_channel. 188 */ 189 memset(chan, 0, sizeof(*chan)); 190 chan->chan_adapter = adapt; 191 chan->chan_bustype = &scsi_bustype; 192 chan->chan_channel = 0; 193 chan->chan_ntargets = 8; 194 chan->chan_nluns = 8; 195 chan->chan_id = 7; 196 197 sbicinit(sc); 198 199 sc->sc_isr.isr_intr = gtsc_dmaintr; 200 sc->sc_isr.isr_arg = sc; 201 sc->sc_isr.isr_ipl = 2; 202 add_isr(&sc->sc_isr); 203 204 /* 205 * attach all scsi units on us 206 */ 207 config_found(dp, chan, scsiprint); 208 } 209 210 void 211 gtsc_enintr(struct sbic_softc *dev) 212 { 213 volatile struct sdmac *sdp; 214 215 sdp = dev->sc_cregs; 216 217 dev->sc_flags |= SBICF_INTR; 218 sdp->CNTR = GVP_CNTR_INTEN; 219 } 220 221 int 222 gtsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags) 223 { 224 volatile struct sdmac *sdp; 225 226 sdp = dev->sc_cregs; 227 /* 228 * Set up the command word based on flags 229 */ 230 dev->sc_dmacmd = GVP_CNTR_INTEN; 231 if ((flags & DMAGO_READ) == 0) 232 dev->sc_dmacmd |= GVP_CNTR_DDIR; 233 234 #ifdef DEBUG 235 if (gtsc_debug & DDB_IO) 236 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 237 #endif 238 dev->sc_flags |= SBICF_INTR; 239 sdp->CNTR = dev->sc_dmacmd; 240 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) { 241 #if 1 242 printf("gtsc_dmago: pa %p->%lx dmacmd %x", 243 dev->sc_cur->dc_addr, 244 (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask, 245 dev->sc_dmacmd); 246 #endif 247 sdp->ACR = 0x00f80000; /***********************************/ 248 } else 249 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 250 if (dev->gtsc_bankmask) 251 sdp->bank = 252 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 253 sdp->ST_DMA = 1; 254 255 /* 256 * restrict transfer count to maximum 257 */ 258 if (dev->sc_tcnt > gtsc_maxdma) 259 dev->sc_tcnt = gtsc_maxdma; 260 #if 1 261 if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) 262 printf(" tcnt %ld\n", dev->sc_tcnt); 263 #endif 264 return(dev->sc_tcnt); 265 } 266 267 void 268 gtsc_dmastop(struct sbic_softc *dev) 269 { 270 volatile struct sdmac *sdp; 271 int s; 272 273 sdp = dev->sc_cregs; 274 275 #ifdef DEBUG 276 if (gtsc_debug & DDB_FOLLOW) 277 printf("gtsc_dmastop()\n"); 278 #endif 279 if (dev->sc_dmacmd) { 280 /* 281 * clear possible interrupt and stop dma 282 */ 283 s = splbio(); 284 sdp->CNTR &= ~GVP_CNTR_INT_P; 285 sdp->SP_DMA = 1; 286 dev->sc_dmacmd = 0; 287 splx(s); 288 } 289 } 290 291 int 292 gtsc_dmaintr(void *arg) 293 { 294 struct sbic_softc *dev = arg; 295 volatile struct sdmac *sdp; 296 int stat; 297 298 sdp = dev->sc_cregs; 299 stat = sdp->CNTR; 300 if ((stat & GVP_CNTR_INT_P) == 0) 301 return (0); 302 #ifdef DEBUG 303 if (gtsc_debug & DDB_FOLLOW) 304 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 305 #endif 306 if (dev->sc_flags & SBICF_INTR) 307 if (sbicintr(dev)) 308 return (1); 309 return(0); 310 } 311 312 313 int 314 gtsc_dmanext(struct sbic_softc *dev) 315 { 316 volatile struct sdmac *sdp; 317 318 sdp = dev->sc_cregs; 319 320 if (dev->sc_cur > dev->sc_last) { 321 /* shouldn't happen !! */ 322 printf("gtsc_dmanext at end !!!\n"); 323 gtsc_dmastop(dev); 324 return(0); 325 } 326 /* 327 * clear possible interrupt and stop dma 328 */ 329 sdp->CNTR &= ~GVP_CNTR_INT_P; 330 sdp->SP_DMA = 1; 331 332 sdp->CNTR = dev->sc_dmacmd; 333 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 334 if (dev->gtsc_bankmask) 335 sdp->bank = 336 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 337 sdp->ST_DMA = 1; 338 339 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 340 if (dev->sc_tcnt > gtsc_maxdma) 341 dev->sc_tcnt = gtsc_maxdma; 342 #ifdef DEBUG 343 if (gtsc_debug & DDB_FOLLOW) 344 printf("gtsc_dmanext ret: %ld\n", dev->sc_tcnt); 345 #endif 346 return(dev->sc_tcnt); 347 } 348 349 #ifdef DEBUG 350 void 351 gtsc_dump(void) 352 { 353 extern struct cfdriver gtsc_cd; 354 int i; 355 356 for (i = 0; i < gtsc_cd.cd_ndevs; ++i) 357 if (gtsc_cd.cd_devs[i]) 358 sbic_dump(gtsc_cd.cd_devs[i]); 359 } 360 #endif 361
Indexes created Sun Sep 28 12:09:53 GMT 2025