gtsc.c revision 1.7
1 /* $NetBSD: gtsc.c,v 1.7 1994/10/26 02:03:37 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/cc.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/dev/dmavar.h> 48 #include <amiga/dev/sbicreg.h> 49 #include <amiga/dev/sbicvar.h> 50 #include <amiga/dev/gtscreg.h> 51 #include <amiga/dev/ztwobusvar.h> 52 #include <amiga/dev/gvpbusvar.h> 53 54 void gtscattach __P((struct device *, struct device *, void *)); 55 int gtscmatch __P((struct device *, struct cfdata *, void *)); 56 int gtscprint __P((void *auxp, char *)); 57 58 void gtsc_dmafree __P((struct sbic_softc *)); 59 void gtsc_dmastop __P((struct sbic_softc *)); 60 int gtsc_dmanext __P((struct sbic_softc *)); 61 int gtsc_dmaintr __P((void)); 62 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 63 64 struct scsi_adapter gtsc_scsiswitch = { 65 sbic_scsicmd, 66 sbic_minphys, 67 0, /* no lun support */ 68 0, /* no lun support */ 69 sbic_adinfo, 70 "gtsc", 71 }; 72 73 struct scsi_device gtsc_scsidev = { 74 NULL, /* use default error handler */ 75 NULL, /* have a queue served by this ??? */ 76 NULL, /* have no async handler ??? */ 77 NULL, /* Use default done routine */ 78 "gtsc", 79 0, 80 }; 81 82 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 83 int gtsc_dmamask = 0; 84 int gtsc_dmabounce = 0; 85 86 #ifdef DEBUG 87 void gtsc_dmatimeout __P((void *)); 88 int gtsc_debug = 0; 89 #endif 90 91 struct cfdriver gtsccd = { 92 NULL, "gtsc", gtscmatch, gtscattach, 93 DV_DULL, sizeof(struct sbic_softc), NULL, 0 }; 94 95 int 96 gtscmatch(pdp, cdp, auxp) 97 struct device *pdp; 98 struct cfdata *cdp; 99 void *auxp; 100 { 101 struct gvpbus_args *gap; 102 103 gap = auxp; 104 if (gap->flags & GVP_SCSI) 105 return(1); 106 return(0); 107 } 108 109 /* 110 * attach all devices on our board. 111 */ 112 void 113 gtscattach(pdp, dp, auxp) 114 struct device *pdp, *dp; 115 void *auxp; 116 { 117 volatile struct sdmac *rp; 118 struct gvpbus_args *gap; 119 struct sbic_softc *sc; 120 121 gap = auxp; 122 sc = (struct sbic_softc *)dp; 123 sc->sc_cregs = rp = gap->zargs.va; 124 125 /* 126 * disable ints and reset bank register 127 */ 128 rp->CNTR = 0; 129 if ((gap->flags & GVP_NOBANK) == 0) 130 rp->bank = 0; 131 132 sc->sc_dmago = gtsc_dmago; 133 sc->sc_dmafree = gtsc_dmafree; 134 sc->sc_dmanext = gtsc_dmanext; 135 sc->sc_dmastop = gtsc_dmastop; 136 sc->sc_dmacmd = 0; 137 138 #ifdef DEBUG 139 /* make sure timeout is really not needed */ 140 timeout((void *)gtsc_dmatimeout, 0, 30 * hz); 141 #endif 142 143 sc->sc_flags |= SBICF_BADDMA; 144 if (gtsc_dmamask) 145 sc->sc_dmamask = gtsc_dmamask; 146 else if (gap->flags & GVP_24BITDMA) 147 sc->sc_dmamask = ~0x00ffffff; 148 else if (gap->flags & GVP_25BITDMA) 149 sc->sc_dmamask = ~0x01ffffff; 150 else 151 sc->sc_dmamask = ~0x07ffffff; 152 printf(": dmamask 0x%x", ~sc->sc_dmamask); 153 154 if ((gap->flags & GVP_NOBANK) == 0) 155 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 156 157 158 /* 159 * if the user requests a bounce buffer or 160 * the users kva space is not ztwo and dma needs it 161 * try and allocate a bounce buffer. If we allocate 162 * one and it is in ztwo space leave maxdma to user 163 * setting or default to MAXPHYS else the address must 164 * be on the chip bus so decrease it to either the users 165 * setting or 1024 bytes. 166 * 167 * XXX this needs to change if we move to multiple memory segments. 168 */ 169 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 170 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS); 171 if (isztwomem(sc->sc_dmabuffer)) 172 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 173 else if (gtsc_maxdma == 0) { 174 gtsc_maxdma = 1024; 175 printf(" bounce pa 0x%x", 176 PREP_DMA_MEM(sc->sc_dmabuffer)); 177 } 178 } 179 if (gtsc_maxdma == 0) 180 gtsc_maxdma = MAXPHYS; 181 182 printf(" maxdma %d\n", gtsc_maxdma); 183 184 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 185 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77; 186 187 sbicreset(sc); 188 189 sc->sc_link.adapter_softc = sc; 190 sc->sc_link.adapter_targ = 7; 191 sc->sc_link.adapter = >sc_scsiswitch; 192 sc->sc_link.device = >sc_scsidev; 193 TAILQ_INIT(&sc->sc_xslist); 194 195 custom.intreq = INTF_PORTS; 196 custom.intena = INTF_SETCLR | INTF_PORTS; 197 198 /* 199 * attach all scsi units on us 200 */ 201 config_found(dp, &sc->sc_link, gtscprint); 202 } 203 204 /* 205 * print diag if pnp is NULL else just extra 206 */ 207 int 208 gtscprint(auxp, pnp) 209 void *auxp; 210 char *pnp; 211 { 212 if (pnp == NULL) 213 return(UNCONF); 214 return(QUIET); 215 } 216 217 void 218 gtsc_dmafree(dev) 219 struct sbic_softc *dev; 220 { 221 volatile struct sdmac *sdp; 222 int s; 223 224 sdp = dev->sc_cregs; 225 226 s = splbio(); 227 #ifdef DEBUG 228 dev->sc_dmatimo = 0; 229 #endif 230 if (dev->sc_dmacmd) { 231 /* 232 * clear possible interrupt and stop dma 233 */ 234 sdp->CNTR &= ~GVP_CNTR_INT_P; 235 sdp->SP_DMA = 1; 236 dev->sc_dmacmd = 0; 237 } 238 #ifdef DEBUG 239 if (gtsc_debug & (DDB_IO | DDB_FOLLOW)) 240 printf("gtsc_dmafree\n"); 241 #endif 242 /* 243 * disable interrupts 244 */ 245 sdp->CNTR = 0; /* disable interrupts from dma/sbic */ 246 dev->sc_flags &= ~SBICF_INTR; 247 splx(s); 248 } 249 250 int 251 gtsc_dmago(dev, addr, count, flags) 252 struct sbic_softc *dev; 253 char *addr; 254 int count, flags; 255 { 256 volatile struct sdmac *sdp; 257 258 sdp = dev->sc_cregs; 259 /* 260 * Set up the command word based on flags 261 */ 262 dev->sc_dmacmd = GVP_CNTR_INTEN; 263 if ((flags & DMAGO_READ) == 0) 264 dev->sc_dmacmd |= GVP_CNTR_DDIR; 265 266 #ifdef DEBUG 267 if (gtsc_debug & DDB_IO) 268 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 269 dev->sc_dmatimo = 1; 270 #endif 271 dev->sc_flags |= SBICF_INTR; 272 sdp->CNTR = dev->sc_dmacmd; 273 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 274 if (dev->gtsc_bankmask) 275 sdp->bank = 276 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 277 sdp->ST_DMA = 1; 278 279 /* 280 * restrict transfer count to maximum 281 */ 282 if (dev->sc_tcnt > gtsc_maxdma) 283 dev->sc_tcnt = gtsc_maxdma; 284 return(dev->sc_tcnt); 285 } 286 287 void 288 gtsc_dmastop(dev) 289 struct sbic_softc *dev; 290 { 291 volatile struct sdmac *sdp; 292 int s; 293 294 sdp = dev->sc_cregs; 295 296 #ifdef DEBUG 297 if (gtsc_debug & DDB_FOLLOW) 298 printf("gtsc_dmastop()\n"); 299 dev->sc_dmatimo = 0; 300 #endif 301 if (dev->sc_dmacmd) { 302 /* 303 * clear possible interrupt and stop dma 304 */ 305 s = splbio(); 306 sdp->CNTR &= ~GVP_CNTR_INT_P; 307 sdp->SP_DMA = 1; 308 dev->sc_dmacmd = 0; 309 splx(s); 310 } 311 } 312 313 int 314 gtsc_dmaintr() 315 { 316 volatile struct sdmac *sdp; 317 struct sbic_softc *dev; 318 int i, stat, found; 319 320 found = 0; 321 for (i = 0; i < gtsccd.cd_ndevs; i++) { 322 dev = gtsccd.cd_devs[i]; 323 if (dev == NULL) 324 continue; 325 sdp = dev->sc_cregs; 326 stat = sdp->CNTR; 327 if ((stat & GVP_CNTR_INT_P) == 0) 328 continue; 329 #ifdef DEBUG 330 if (gtsc_debug & DDB_FOLLOW) 331 printf("gtsc_dmaintr(%d, 0x%x) ", i, stat); 332 #endif 333 if (dev->sc_flags & SBICF_INTR) 334 found += sbicintr(dev); 335 } 336 return(found); 337 } 338 339 340 int 341 gtsc_dmanext(dev) 342 struct sbic_softc *dev; 343 { 344 volatile struct sdmac *sdp; 345 int i, stat; 346 347 sdp = dev->sc_cregs; 348 349 if (dev->sc_cur > dev->sc_last) { 350 /* shouldn't happen !! */ 351 printf("gtsc_dmanext at end !!!\n"); 352 gtsc_dmastop(dev); 353 return(0); 354 } 355 #ifdef DEBUG 356 dev->sc_dmatimo = 1; 357 #endif 358 /* 359 * clear possible interrupt and stop dma 360 */ 361 sdp->CNTR &= ~GVP_CNTR_INT_P; 362 sdp->SP_DMA = 1; 363 364 sdp->CNTR = dev->sc_dmacmd; 365 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 366 if (dev->gtsc_bankmask) 367 sdp->bank = 368 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 369 sdp->ST_DMA = 1; 370 371 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 372 if (dev->sc_tcnt > gtsc_maxdma) 373 dev->sc_tcnt = gtsc_maxdma; 374 #ifdef DEBUG 375 if (gtsc_debug & DDB_FOLLOW) 376 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 377 #endif 378 return(dev->sc_tcnt); 379 } 380 381 #ifdef DEBUG 382 void 383 gtsc_dmatimeout(arg) 384 void *arg; 385 { 386 struct sbic_softc *dev; 387 int i, s; 388 389 for (i = 0; i < gtsccd.cd_ndevs; i++) { 390 dev = gtsccd.cd_devs[i]; 391 if (dev == NULL) 392 continue; 393 s = splbio(); 394 if (dev->sc_dmatimo) { 395 if (dev->sc_dmatimo > 1) 396 printf("gtsc_dma%d: timeout #%d\n", 397 dev->sc_dev.dv_unit, dev->sc_dmatimo - 1); 398 dev->sc_dmatimo++; 399 } 400 splx(s); 401 } 402 timeout(gtsc_dmatimeout, 0, 30 * hz); 403 } 404 #endif 405
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