Home | History | Annotate | Line # | Download | only in dev
      1  1.2  phx /*	$NetBSD: if_ed_zbus.c,v 1.2 2012/10/27 21:13:03 phx Exp $ */
      2  1.1  phx 
      3  1.1  phx /*-
      4  1.1  phx  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5  1.1  phx  * All rights reserved.
      6  1.1  phx  *
      7  1.1  phx  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  phx  * by Frank Wille.
      9  1.1  phx  *
     10  1.1  phx  * Redistribution and use in source and binary forms, with or without
     11  1.1  phx  * modification, are permitted provided that the following conditions
     12  1.1  phx  * are met:
     13  1.1  phx  * 1. Redistributions of source code must retain the above copyright
     14  1.1  phx  *    notice, this list of conditions and the following disclaimer.
     15  1.1  phx  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  phx  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  phx  *    documentation and/or other materials provided with the distribution.
     18  1.1  phx  *
     19  1.1  phx  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  phx  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  phx  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  phx  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  phx  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  phx  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  phx  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  phx  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  phx  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  phx  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  phx  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  phx  */
     31  1.1  phx 
     32  1.1  phx /*
     33  1.1  phx  * Device driver for the Hydra Systems and ASDG ethernet cards.
     34  1.1  phx  * Based on the National Semiconductor DS8390/WD83C690.
     35  1.1  phx  */
     36  1.1  phx 
     37  1.1  phx #include <sys/cdefs.h>
     38  1.2  phx __KERNEL_RCSID(0, "$NetBSD: if_ed_zbus.c,v 1.2 2012/10/27 21:13:03 phx Exp $");
     39  1.1  phx 
     40  1.1  phx #include <sys/param.h>
     41  1.1  phx #include <sys/device.h>
     42  1.1  phx #include <sys/bus.h>
     43  1.1  phx 
     44  1.1  phx #include <net/if.h>
     45  1.1  phx #include <net/if_media.h>
     46  1.1  phx #include <net/if_ether.h>
     47  1.1  phx 
     48  1.1  phx #include <dev/ic/dp8390reg.h>
     49  1.1  phx #include <dev/ic/dp8390var.h>
     50  1.1  phx 
     51  1.1  phx #include <amiga/amiga/device.h>
     52  1.1  phx #include <amiga/amiga/isr.h>
     53  1.1  phx #include <amiga/dev/zbusvar.h>
     54  1.1  phx 
     55  1.1  phx #define ETHER_PAD_LEN	(ETHER_MIN_LEN - ETHER_CRC_LEN)
     56  1.1  phx 
     57  1.1  phx /* Hydra Systems AmigaNet */
     58  1.1  phx #define HYDRA_MANID	2121
     59  1.1  phx #define HYDRA_PRODID	1
     60  1.1  phx #define HYDRA_REGADDR	0xffe1
     61  1.1  phx #define	HYDRA_MEMADDR	0
     62  1.1  phx #define HYDRA_PROMADDR	0xffc0
     63  1.1  phx 
     64  1.1  phx /* ASDG LANRover */
     65  1.1  phx #define ASDG_MANID	1023
     66  1.1  phx #define ASDG_PRODID	254
     67  1.1  phx #define ASDG_REGADDR	0x1
     68  1.1  phx #define ASDG_MEMADDR	0x8000
     69  1.1  phx #define ASDG_PROMADDR	0x100
     70  1.1  phx 
     71  1.1  phx /* Buffer size is always 16k */
     72  1.1  phx #define ED_ZBUS_MEMSIZE	0x4000
     73  1.1  phx 
     74  1.1  phx int	ed_zbus_match(device_t, cfdata_t , void *);
     75  1.1  phx void	ed_zbus_attach(device_t, device_t, void *);
     76  1.1  phx int	ed_zbus_test_mem(struct dp8390_softc *);
     77  1.1  phx void	ed_zbus_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *);
     78  1.1  phx int	ed_zbus_ring_copy(struct dp8390_softc *, int, void *, u_short);
     79  1.1  phx int	ed_zbus_write_mbuf(struct dp8390_softc *, struct mbuf *, int);
     80  1.1  phx 
     81  1.1  phx struct ed_zbus_softc {
     82  1.1  phx 	struct dp8390_softc	sc_dp8390;
     83  1.1  phx 	struct bus_space_tag	sc_bst;
     84  1.1  phx 	struct isr		sc_isr;
     85  1.1  phx };
     86  1.1  phx 
     87  1.1  phx CFATTACH_DECL_NEW(ed_zbus, sizeof(struct ed_zbus_softc),
     88  1.1  phx     ed_zbus_match, ed_zbus_attach, NULL, NULL);
     89  1.1  phx 
     90  1.1  phx 
     91  1.1  phx int
     92  1.1  phx ed_zbus_match(device_t parent, cfdata_t cf, void *aux)
     93  1.1  phx {
     94  1.1  phx 	struct zbus_args *zap = aux;
     95  1.1  phx 
     96  1.1  phx 	if (zap->manid == HYDRA_MANID && zap->prodid == HYDRA_PRODID)
     97  1.1  phx 		return 1;
     98  1.1  phx 	else if (zap->manid == ASDG_MANID && zap->prodid == ASDG_PRODID)
     99  1.1  phx 		return 1;
    100  1.1  phx 	return 0;
    101  1.1  phx }
    102  1.1  phx 
    103  1.1  phx void
    104  1.1  phx ed_zbus_attach(device_t parent, device_t self, void *aux)
    105  1.1  phx {
    106  1.1  phx 	struct ed_zbus_softc *zsc = device_private(self);
    107  1.1  phx 	struct dp8390_softc *sc = &zsc->sc_dp8390;
    108  1.1  phx 	struct zbus_args *zap = aux;
    109  1.1  phx 	bus_space_handle_t promh;
    110  1.1  phx 	bus_addr_t memaddr, promaddr, regaddr;
    111  1.1  phx 	int i;
    112  1.1  phx 
    113  1.1  phx 	zsc->sc_bst.base = (bus_addr_t)zap->va;
    114  1.1  phx 	zsc->sc_bst.absm = &amiga_bus_stride_1;
    115  1.1  phx 
    116  1.1  phx 	if (zap->manid == HYDRA_MANID) {
    117  1.1  phx 		regaddr = HYDRA_REGADDR;
    118  1.1  phx 		memaddr = HYDRA_MEMADDR;
    119  1.1  phx 		promaddr = HYDRA_PROMADDR;
    120  1.1  phx 	} else {
    121  1.1  phx 		regaddr = ASDG_REGADDR;
    122  1.1  phx 		memaddr = ASDG_MEMADDR;
    123  1.1  phx 		promaddr = ASDG_PROMADDR;
    124  1.1  phx 	}
    125  1.1  phx 
    126  1.1  phx 	sc->sc_dev = self;
    127  1.1  phx 	sc->sc_regt = &zsc->sc_bst;
    128  1.1  phx 	sc->sc_buft = &zsc->sc_bst;
    129  1.1  phx 
    130  1.1  phx 	if (bus_space_map(sc->sc_regt, regaddr, 0x20, 0, &sc->sc_regh)) {
    131  1.1  phx 		aprint_error_dev(self, "can't map i/o space\n");
    132  1.1  phx 		return;
    133  1.1  phx 	}
    134  1.1  phx 
    135  1.1  phx 	if (bus_space_map(sc->sc_buft, memaddr, ED_ZBUS_MEMSIZE, 0,
    136  1.1  phx 	    &sc->sc_bufh)) {
    137  1.1  phx 		aprint_error_dev(self, "can't map buffer space\n");
    138  1.1  phx 		return;
    139  1.1  phx 	}
    140  1.1  phx 
    141  1.1  phx 	/* SRAM buffer size is always 16K */
    142  1.1  phx 	sc->mem_start = 0;
    143  1.1  phx 	sc->mem_size = ED_ZBUS_MEMSIZE;
    144  1.1  phx 
    145  1.1  phx 	/*
    146  1.1  phx 	 * Read the ethernet address from the PROM.
    147  1.1  phx 	 * Interrupts must be inactive when reading the PROM, as the
    148  1.1  phx 	 * interrupt line is shared with one of its address lines.
    149  1.1  phx 	 */
    150  1.1  phx 
    151  1.1  phx 	NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_IMR, 0x00);
    152  1.1  phx 	NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_ISR, 0xff);
    153  1.1  phx 
    154  1.1  phx 	if (bus_space_map(&zsc->sc_bst, promaddr, ETHER_ADDR_LEN * 2, 0,
    155  1.1  phx 	    &promh) == 0) {
    156  1.1  phx 		for (i = 0; i < ETHER_ADDR_LEN; i++)
    157  1.1  phx 			sc->sc_enaddr[i] =
    158  1.1  phx 			    bus_space_read_1(&zsc->sc_bst, promh, i * 2);
    159  1.1  phx 
    160  1.1  phx 		bus_space_unmap(&zsc->sc_bst, promh, ETHER_ADDR_LEN * 2);
    161  1.1  phx 	}
    162  1.1  phx 
    163  1.1  phx 	/* Initialize sc_reg_map[]. Registers have stride 2 on the bus. */
    164  1.1  phx 	for (i = 0; i < 16; i++)
    165  1.1  phx 		sc->sc_reg_map[i] = i << 1;
    166  1.1  phx 
    167  1.1  phx 	/*
    168  1.1  phx 	 * Set 2 word FIFO threshold, no auto-init Remote DMA,
    169  1.1  phx 	 * byte order 68k, word-wide DMA xfers.
    170  1.1  phx 	 */
    171  1.1  phx 	sc->dcr_reg = ED_DCR_FT0 | ED_DCR_WTS | ED_DCR_LS | ED_DCR_BOS;
    172  1.1  phx 
    173  1.1  phx 	/* Remote DMA abort .*/
    174  1.1  phx 	sc->cr_proto = ED_CR_RD2;
    175  1.1  phx 
    176  1.1  phx 	/*
    177  1.1  phx 	 * Override all functions which deal with the buffer, because
    178  1.1  phx 	 * this implementation only allows 16-bit buffer accesses.
    179  1.1  phx 	 */
    180  1.1  phx 	sc->test_mem = ed_zbus_test_mem;
    181  1.1  phx 	sc->read_hdr = ed_zbus_read_hdr;
    182  1.1  phx 	sc->ring_copy = ed_zbus_ring_copy;
    183  1.1  phx 	sc->write_mbuf = ed_zbus_write_mbuf;
    184  1.1  phx 
    185  1.1  phx 	sc->sc_flags = device_cfdata(self)->cf_flags;
    186  1.1  phx 	sc->is790 = 0;
    187  1.1  phx 	sc->sc_media_init = dp8390_media_init;
    188  1.1  phx 	sc->sc_enabled = 1;
    189  1.1  phx 
    190  1.1  phx 	/* Do generic DS8390/WD83C690 config. */
    191  1.1  phx 	if (dp8390_config(sc)) {
    192  1.1  phx 		bus_space_unmap(sc->sc_buft, sc->sc_bufh, ED_ZBUS_MEMSIZE);
    193  1.1  phx 		bus_space_unmap(sc->sc_regt, sc->sc_regh, 0x10);
    194  1.1  phx 		return;
    195  1.1  phx 	}
    196  1.1  phx 
    197  1.1  phx 	/* establish level 2 interrupt handler */
    198  1.1  phx 	zsc->sc_isr.isr_intr = dp8390_intr;
    199  1.1  phx 	zsc->sc_isr.isr_arg = sc;
    200  1.1  phx 	zsc->sc_isr.isr_ipl = 2;
    201  1.1  phx 	add_isr(&zsc->sc_isr);
    202  1.1  phx }
    203  1.1  phx 
    204  1.1  phx int
    205  1.1  phx ed_zbus_test_mem(struct dp8390_softc *sc)
    206  1.1  phx {
    207  1.1  phx 	bus_space_tag_t buft = sc->sc_buft;
    208  1.1  phx 	bus_space_handle_t bufh = sc->sc_bufh;
    209  1.1  phx 	int i;
    210  1.1  phx 
    211  1.2  phx 	bus_space_set_region_2(buft, bufh, sc->mem_start, 0,
    212  1.2  phx 	    sc->mem_size >> 1);
    213  1.1  phx 
    214  1.2  phx 	for (i = 0; i < sc->mem_size; i += 2) {
    215  1.1  phx 		if (bus_space_read_2(sc->sc_buft, sc->sc_bufh, i)) {
    216  1.1  phx 			printf(": failed to clear NIC buffer at offset %x - "
    217  1.1  phx 			    "check configuration\n", (sc->mem_start + i));
    218  1.1  phx 			return 1;
    219  1.1  phx 		}
    220  1.1  phx 	}
    221  1.1  phx 	return 0;
    222  1.1  phx }
    223  1.1  phx 
    224  1.1  phx void
    225  1.1  phx ed_zbus_read_hdr(struct dp8390_softc *sc, int src, struct dp8390_ring *hdrp)
    226  1.1  phx {
    227  1.1  phx 	bus_space_tag_t buft = sc->sc_buft;
    228  1.1  phx 	bus_space_handle_t bufh = sc->sc_bufh;
    229  1.2  phx 	uint16_t wrd[2];
    230  1.1  phx 
    231  1.1  phx 	/*
    232  1.1  phx 	 * Read the 4-byte header as two 16-bit words in little-endian
    233  1.1  phx 	 * format. Convert into big-endian and put them into hdrp.
    234  1.1  phx 	 */
    235  1.2  phx 	bus_space_read_region_stream_2(buft, bufh, src, wrd, 2);
    236  1.2  phx 	hdrp->rsr = wrd[0] & 0xff;
    237  1.2  phx 	hdrp->next_packet = wrd[0] >> 8;
    238  1.2  phx 	hdrp->count = bswap16(wrd[1]);
    239  1.1  phx }
    240  1.1  phx 
    241  1.1  phx /*
    242  1.1  phx  * Copy `amount' bytes from a packet in the ring buffer to a linear
    243  1.1  phx  * destination buffer, given a source offset and destination address.
    244  1.1  phx  * Takes into account ring-wrap.
    245  1.1  phx  */
    246  1.1  phx int
    247  1.1  phx ed_zbus_ring_copy(struct dp8390_softc *sc, int src, void *dst, u_short amount)
    248  1.1  phx {
    249  1.1  phx 	bus_space_tag_t buft = sc->sc_buft;
    250  1.1  phx 	bus_space_handle_t bufh = sc->sc_bufh;
    251  1.1  phx 	u_short tmp_amount;
    252  1.2  phx 	u_char readbyte[2];
    253  1.1  phx 
    254  1.1  phx 	/* Does copy wrap to lower addr in ring buffer? */
    255  1.1  phx 	if (src + amount > sc->mem_end) {
    256  1.1  phx 		tmp_amount = sc->mem_end - src;
    257  1.1  phx 
    258  1.2  phx 		/* copy amount up to end of NIC memory */
    259  1.2  phx 		bus_space_read_region_stream_2(buft, bufh, src, dst,
    260  1.2  phx 		    tmp_amount >> 1);
    261  1.1  phx 
    262  1.1  phx 		amount -= tmp_amount;
    263  1.1  phx 		src = sc->mem_ring;
    264  1.2  phx 		dst = (u_char *)dst + tmp_amount;
    265  1.2  phx 	}
    266  1.2  phx 
    267  1.2  phx 	bus_space_read_region_stream_2(buft, bufh, src, dst, amount >> 1);
    268  1.2  phx 
    269  1.2  phx 	/* handle odd length packet */
    270  1.2  phx 	if (amount & 1) {
    271  1.2  phx 		bus_space_read_region_stream_2(buft, bufh, src + amount - 1,
    272  1.2  phx 		    (u_int16_t *)readbyte, 1);
    273  1.2  phx 		*((u_char *)dst + amount - 1) = readbyte[0];
    274  1.2  phx 		amount++;
    275  1.1  phx 	}
    276  1.1  phx 
    277  1.1  phx 	return src + amount;
    278  1.1  phx }
    279  1.1  phx 
    280  1.1  phx /*
    281  1.1  phx  * Copy packet from mbuf to the board memory. Currently uses an extra
    282  1.1  phx  * buffer/extra memory copy, unless the whole packet fits in one mbuf.
    283  1.1  phx  * As in the test_mem function, we use word-wide writes.
    284  1.1  phx  */
    285  1.1  phx int
    286  1.1  phx ed_zbus_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
    287  1.1  phx {
    288  1.1  phx 	u_char *data, savebyte[2];
    289  1.1  phx 	int len, wantbyte;
    290  1.1  phx 	u_short totlen = 0;
    291  1.1  phx 
    292  1.1  phx 	wantbyte = 0;
    293  1.1  phx 
    294  1.1  phx 	for (; m ; m = m->m_next) {
    295  1.1  phx 		data = mtod(m, u_char *);
    296  1.1  phx 		len = m->m_len;
    297  1.1  phx 		totlen += len;
    298  1.1  phx 		if (len > 0) {
    299  1.1  phx 			/* Finish the last word. */
    300  1.1  phx 			if (wantbyte) {
    301  1.1  phx 				savebyte[1] = *data;
    302  1.2  phx 				bus_space_write_region_stream_2(sc->sc_buft,
    303  1.2  phx 				    sc->sc_bufh, buf,
    304  1.2  phx 				    (u_int16_t *)savebyte, 1);
    305  1.1  phx 				buf += 2;
    306  1.1  phx 				data++;
    307  1.1  phx 				len--;
    308  1.1  phx 				wantbyte = 0;
    309  1.1  phx 			}
    310  1.1  phx 			/* Output contiguous words. */
    311  1.1  phx 			if (len > 1) {
    312  1.2  phx 				bus_space_write_region_stream_2(sc->sc_buft,
    313  1.2  phx 				    sc->sc_bufh, buf,
    314  1.2  phx 				    (u_int16_t *)data, len >> 1);
    315  1.1  phx 				buf += len & ~1;
    316  1.1  phx 				data += len & ~1;
    317  1.1  phx 				len &= 1;
    318  1.1  phx 			}
    319  1.1  phx 			/* Save last byte, if necessary. */
    320  1.1  phx 			if (len == 1) {
    321  1.1  phx 				savebyte[0] = *data;
    322  1.1  phx 				wantbyte = 1;
    323  1.1  phx 			}
    324  1.1  phx 		}
    325  1.1  phx 	}
    326  1.1  phx 
    327  1.1  phx 	len = ETHER_PAD_LEN - totlen;
    328  1.1  phx 	if (wantbyte) {
    329  1.1  phx 		savebyte[1] = 0;
    330  1.2  phx 		bus_space_write_region_stream_2(sc->sc_buft, sc->sc_bufh,
    331  1.1  phx 		    buf, (u_int16_t *)savebyte, 1);
    332  1.1  phx 		buf += 2;
    333  1.1  phx 		totlen++;
    334  1.1  phx 		len--;
    335  1.1  phx 	}
    336  1.1  phx 	/* if sent data is shorter than EHTER_PAD_LEN, put 0 to padding */
    337  1.1  phx 	if (len > 0) {
    338  1.1  phx 		bus_space_set_region_2(sc->sc_buft, sc->sc_bufh, buf, 0,
    339  1.1  phx 		    len >> 1);
    340  1.1  phx 		totlen = ETHER_PAD_LEN;
    341  1.1  phx 	}
    342  1.1  phx 	return totlen;
    343  1.1  phx }
    344