if_es.c revision 1.27 1 /* $NetBSD: if_es.c,v 1.27 2002/01/26 13:40:56 aymeric Exp $ */
2
3 /*
4 * Copyright (c) 1995 Michael L. Hitch
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Michael L. Hitch.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * SMC 91C90 Single-Chip Ethernet Controller
35 */
36 #include "opt_ddb.h"
37 #include "opt_inet.h"
38 #include "opt_ns.h"
39
40 #include "bpfilter.h"
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/mbuf.h>
45 #include <sys/buf.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/syslog.h>
49 #include <sys/ioctl.h>
50 #include <sys/errno.h>
51 #include <sys/device.h>
52
53 #include <net/if.h>
54 #include <net/if_dl.h>
55 #include <net/if_ether.h>
56
57 #ifdef INET
58 #include <netinet/in.h>
59 #include <netinet/in_systm.h>
60 #include <netinet/in_var.h>
61 #include <netinet/ip.h>
62 #include <netinet/if_inarp.h>
63 #endif
64
65 #ifdef NS
66 #include <netns/ns.h>
67 #include <netns/ns_if.h>
68 #endif
69
70 #include <machine/cpu.h>
71 #include <machine/mtpr.h>
72 #include <amiga/amiga/device.h>
73 #include <amiga/amiga/isr.h>
74 #include <amiga/dev/zbusvar.h>
75 #include <amiga/dev/if_esreg.h>
76
77 #define SWAP(x) (((x & 0xff) << 8) | ((x >> 8) & 0xff))
78
79 #define USEPKTBUF
80
81 /*
82 * Ethernet software status per interface.
83 *
84 * Each interface is referenced by a network interface structure,
85 * es_if, which the routing code uses to locate the interface.
86 * This structure contains the output queue for the interface, its address, ...
87 */
88 struct es_softc {
89 struct device sc_dev;
90 struct isr sc_isr;
91 struct ethercom sc_ethercom; /* common Ethernet structures */
92 void *sc_base; /* base address of board */
93 short sc_iflags;
94 unsigned short sc_intctl;
95 #ifdef ESDEBUG
96 int sc_debug;
97 short sc_intbusy; /* counter for interrupt rentered */
98 short sc_smcbusy; /* counter for other rentry checks */
99 #endif
100 };
101
102 #if NBPFILTER > 0
103 #include <net/bpf.h>
104 #include <net/bpfdesc.h>
105 #endif
106
107 #ifdef ESDEBUG
108 /* console error messages */
109 int esdebug = 0;
110 int estxints = 0; /* IST_TX with TX enabled */
111 int estxint2 = 0; /* IST_TX active after IST_TX_EMPTY */
112 int estxint3 = 0; /* IST_TX interrupt processed */
113 int estxint4 = 0; /* ~TEMPTY counts */
114 int estxint5 = 0; /* IST_TX_EMPTY interrupts */
115 void es_dump_smcregs(char *, union smcregs *);
116 #endif
117
118 int esintr(void *);
119 void esstart(struct ifnet *);
120 void eswatchdog(struct ifnet *);
121 int esioctl(struct ifnet *, u_long, caddr_t);
122 void esrint(struct es_softc *);
123 void estint(struct es_softc *);
124 void esinit(struct es_softc *);
125 void esreset(struct es_softc *);
126 void esstop(struct es_softc *);
127
128 int esmatch(struct device *, struct cfdata *, void *);
129 void esattach(struct device *, struct device *, void *);
130
131 struct cfattach es_ca = {
132 sizeof(struct es_softc), esmatch, esattach
133 };
134
135 int
136 esmatch(struct device *parent, struct cfdata *cfp, void *aux)
137 {
138 struct zbus_args *zap = aux;
139
140 /* Ameristar A4066 ethernet card */
141 if (zap->manid == 1053 && zap->prodid == 10)
142 return(1);
143
144 return (0);
145 }
146
147 /*
148 * Interface exists: make available by filling in network interface
149 * record. System will initialize the interface when it is ready
150 * to accept packets.
151 */
152 void
153 esattach(struct device *parent, struct device *self, void *aux)
154 {
155 struct es_softc *sc = (void *)self;
156 struct zbus_args *zap = aux;
157 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
158 unsigned long ser;
159 u_int8_t myaddr[ETHER_ADDR_LEN];
160
161 sc->sc_base = zap->va;
162
163 /*
164 * Manufacturer decides the 3 first bytes, i.e. ethernet vendor ID.
165 * (Currently only Ameristar.)
166 */
167 myaddr[0] = 0x00;
168 myaddr[1] = 0x00;
169 myaddr[2] = 0x9f;
170
171 /*
172 * Serial number for board contains last 3 bytes.
173 */
174 ser = (unsigned long) zap->serno;
175
176 myaddr[3] = (ser >> 16) & 0xff;
177 myaddr[4] = (ser >> 8) & 0xff;
178 myaddr[5] = (ser ) & 0xff;
179
180 /* Initialize ifnet structure. */
181 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
182 ifp->if_softc = sc;
183 ifp->if_ioctl = esioctl;
184 ifp->if_start = esstart;
185 ifp->if_watchdog = eswatchdog;
186 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS |
187 IFF_MULTICAST;
188
189 /* Attach the interface. */
190 if_attach(ifp);
191 ether_ifattach(ifp, myaddr);
192
193 /* Print additional info when attached. */
194 printf(": address %s\n", ether_sprintf(myaddr));
195
196 sc->sc_isr.isr_intr = esintr;
197 sc->sc_isr.isr_arg = sc;
198 sc->sc_isr.isr_ipl = 2;
199 add_isr(&sc->sc_isr);
200 }
201
202 #ifdef ESDEBUG
203 void
204 es_dump_smcregs(char *where, union smcregs *smc)
205 {
206 u_short cur_bank = smc->b0.bsr & BSR_MASK;
207
208 printf("SMC registers %p from %s bank %04x\n", smc, where,
209 smc->b0.bsr);
210 smc->b0.bsr = BSR_BANK0;
211 printf("TCR %04x EPHSR %04x RCR %04x ECR %04x MIR %04x MCR %04x\n",
212 SWAP(smc->b0.tcr), SWAP(smc->b0.ephsr), SWAP(smc->b0.rcr),
213 SWAP(smc->b0.ecr), SWAP(smc->b0.mir), SWAP(smc->b0.mcr));
214 smc->b1.bsr = BSR_BANK1;
215 printf("CR %04x BAR %04x IAR %04x %04x %04x GPR %04x CTR %04x\n",
216 SWAP(smc->b1.cr), SWAP(smc->b1.bar), smc->b1.iar[0], smc->b1.iar[1],
217 smc->b1.iar[2], smc->b1.gpr, SWAP(smc->b1.ctr));
218 smc->b2.bsr = BSR_BANK2;
219 printf("MMUCR %04x PNR %02x ARR %02x FIFO %04x PTR %04x",
220 SWAP(smc->b2.mmucr), smc->b2.pnr, smc->b2.arr, smc->b2.fifo,
221 SWAP(smc->b2.ptr));
222 printf(" DATA %04x %04x IST %02x MSK %02x\n", smc->b2.data,
223 smc->b2.datax, smc->b2.ist, smc->b2.msk);
224 smc->b3.bsr = BSR_BANK3;
225 printf("MT %04x %04x %04x %04x\n",
226 smc->b3.mt[0], smc->b3.mt[1], smc->b3.mt[2], smc->b3.mt[3]);
227 smc->b3.bsr = cur_bank;
228 }
229 #endif
230
231 void
232 esstop(struct es_softc *sc)
233 {
234 }
235
236 void
237 esinit(struct es_softc *sc)
238 {
239 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
240 union smcregs *smc = sc->sc_base;
241 int s;
242
243 s = splnet();
244
245 #ifdef ESDEBUG
246 if (ifp->if_flags & IFF_RUNNING)
247 es_dump_smcregs("esinit", smc);
248 #endif
249 smc->b0.bsr = BSR_BANK0; /* Select bank 0 */
250 smc->b0.rcr = RCR_EPH_RST;
251 smc->b0.rcr = 0;
252 smc->b3.bsr = BSR_BANK3; /* Select bank 3 */
253 smc->b3.mt[0] = 0; /* clear Multicast table */
254 smc->b3.mt[1] = 0;
255 smc->b3.mt[2] = 0;
256 smc->b3.mt[3] = 0;
257 /* XXX set Multicast table from Multicast list */
258 smc->b1.bsr = BSR_BANK1; /* Select bank 1 */
259 smc->b1.cr = CR_RAM32K | CR_NO_WAIT_ST | CR_SET_SQLCH;
260 smc->b1.ctr = CTR_AUTO_RLSE;
261 smc->b1.iar[0] = *((unsigned short *) &LLADDR(ifp->if_sadl)[0]);
262 smc->b1.iar[1] = *((unsigned short *) &LLADDR(ifp->if_sadl)[2]);
263 smc->b1.iar[2] = *((unsigned short *) &LLADDR(ifp->if_sadl)[4]);
264 smc->b2.bsr = BSR_BANK2; /* Select bank 2 */
265 smc->b2.mmucr = MMUCR_RESET;
266 smc->b0.bsr = BSR_BANK0; /* Select bank 0 */
267 smc->b0.mcr = SWAP(0x0020); /* reserve 8K for transmit buffers */
268 smc->b0.tcr = TCR_PAD_EN | (TCR_TXENA + TCR_MON_CSN);
269 smc->b0.rcr = RCR_FILT_CAR | RCR_STRIP_CRC | RCR_RXEN | RCR_ALLMUL;
270 /* XXX add promiscuous flags */
271 smc->b2.bsr = BSR_BANK2; /* Select bank 2 */
272 smc->b2.msk = sc->sc_intctl = MSK_RX_OVRN | MSK_RX;
273
274 /* Interface is now 'running', with no output active. */
275 ifp->if_flags |= IFF_RUNNING;
276 ifp->if_flags &= ~IFF_OACTIVE;
277
278 /* Attempt to start output, if any. */
279 esstart(ifp);
280
281 splx(s);
282 }
283
284 int
285 esintr(void *arg)
286 {
287 struct es_softc *sc = arg;
288 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
289 u_short intsts, intact;
290 union smcregs *smc;
291 int s = splnet();
292
293 smc = sc->sc_base;
294 #ifdef ESDEBUG
295 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2 &&
296 ifp->if_flags & IFF_RUNNING) {
297 printf("%s: intr BSR not 2: %04x\n", sc->sc_dev.dv_xname,
298 smc->b2.bsr);
299 smc->b2.bsr = BSR_BANK2;
300 }
301 #endif
302 intsts = smc->b2.ist;
303 intact = smc->b2.msk & intsts;
304 if ((intact) == 0) {
305 splx(s);
306 return (0);
307 }
308 #ifdef ESDEBUG
309 if (esdebug)
310 printf ("%s: esintr ist %02x msk %02x",
311 sc->sc_dev.dv_xname, intsts, smc->b2.msk);
312 if (sc->sc_intbusy++) {
313 printf("%s: esintr re-entered\n", sc->sc_dev.dv_xname);
314 panic("esintr re-entered");
315 }
316 if (sc->sc_smcbusy)
317 printf("%s: esintr interrupted busy %d\n", sc->sc_dev.dv_xname,
318 sc->sc_smcbusy);
319 #endif
320 smc->b2.msk = 0;
321 #ifdef ESDEBUG
322 if (esdebug)
323 printf ("=>%02x%02x pnr %02x arr %02x fifo %04x\n",
324 smc->b2.ist, smc->b2.ist, smc->b2.pnr, smc->b2.arr,
325 smc->b2.fifo);
326 #endif
327 if (intact & IST_ALLOC) {
328 sc->sc_intctl &= ~MSK_ALLOC;
329 #ifdef ESDEBUG
330 if (esdebug || 1)
331 printf ("%s: ist %02x", sc->sc_dev.dv_xname,
332 intsts);
333 #endif
334 if ((smc->b2.arr & ARR_FAILED) == 0) {
335 u_char save_pnr;
336 #ifdef ESDEBUG
337 if (esdebug || 1)
338 printf (" arr %02x\n", smc->b2.arr);
339 #endif
340 save_pnr = smc->b2.pnr;
341 smc->b2.pnr = smc->b2.arr;
342 smc->b2.mmucr = MMUCR_RLSPKT;
343 while (smc->b2.mmucr & MMUCR_BUSY)
344 ;
345 smc->b2.pnr = save_pnr;
346 ifp->if_flags &= ~IFF_OACTIVE;
347 }
348 #ifdef ESDEBUG
349 else if (esdebug || 1)
350 printf (" IST_ALLOC with ARR_FAILED?\n");
351 #endif
352 }
353 #ifdef ESDEBUG
354 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
355 printf("%s: intr+ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
356 smc->b2.bsr);
357 smc->b2.bsr = BSR_BANK2;
358 }
359 #endif
360 while ((smc->b2.fifo & FIFO_REMPTY) == 0) {
361 esrint(sc);
362 }
363 #ifdef ESDEBUG
364 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
365 printf("%s: intr++ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
366 smc->b2.bsr);
367 smc->b2.bsr = BSR_BANK2;
368 }
369 #endif
370 if (intact & IST_RX_OVRN) {
371 printf ("%s: Overrun ist %02x", sc->sc_dev.dv_xname,
372 intsts);
373 smc->b2.ist = ACK_RX_OVRN;
374 printf ("->%02x\n", smc->b2.ist);
375 ifp->if_ierrors++;
376 }
377 if (intact & IST_TX_EMPTY) {
378 u_short ecr;
379 #ifdef ESDEBUG
380 if (esdebug)
381 printf ("%s: TX EMPTY %02x",
382 sc->sc_dev.dv_xname, intsts);
383 ++estxint5; /* count # IST_TX_EMPTY ints */
384 #endif
385 smc->b2.ist = ACK_TX_EMPTY;
386 sc->sc_intctl &= ~(MSK_TX_EMPTY | MSK_TX);
387 #ifdef ESDEBUG
388 if (esdebug)
389 printf ("->%02x intcl %x pnr %02x arr %02x\n",
390 smc->b2.ist, sc->sc_intctl, smc->b2.pnr,
391 smc->b2.arr);
392 #endif
393 if (smc->b2.ist & IST_TX) {
394 intact |= IST_TX;
395 #ifdef ESDEBUG
396 ++estxint2; /* count # TX after TX_EMPTY */
397 #endif
398 } else {
399 smc->b0.bsr = BSR_BANK0;
400 ecr = smc->b0.ecr; /* Get error counters */
401 if (ecr & 0xff00)
402 ifp->if_collisions += ((ecr >> 8) & 15) +
403 ((ecr >> 11) & 0x1e);
404 smc->b2.bsr = BSR_BANK2;
405 #if 0
406 smc->b2.mmucr = MMUCR_RESET_TX; /* XXX reset TX FIFO */
407 #endif
408 }
409 }
410 if (intact & IST_TX) {
411 u_char tx_pnr, save_pnr;
412 u_short save_ptr, ephsr, tcr;
413 int n = 0;
414 #ifdef ESDEBUG
415 if (esdebug) {
416 printf ("%s: TX INT ist %02x",
417 sc->sc_dev.dv_xname, intsts);
418 printf ("->%02x\n", smc->b2.ist);
419 }
420 ++estxint3; /* count # IST_TX */
421 #endif
422 zzzz:
423 #ifdef ESDEBUG
424 ++estxint4; /* count # ~TEMPTY */
425 #endif
426 smc->b0.bsr = BSR_BANK0;
427 ephsr = smc->b0.ephsr; /* get EPHSR */
428 tcr = smc->b0.tcr; /* and TCR */
429 smc->b2.bsr = BSR_BANK2;
430 save_ptr = smc->b2.ptr;
431 save_pnr = smc->b2.pnr;
432 tx_pnr = smc->b2.fifo >> 8; /* pktno from completion fifo */
433 smc->b2.pnr = tx_pnr; /* set TX packet number */
434 smc->b2.ptr = PTR_READ; /* point to status word */
435 #if 0 /* XXXX */
436 printf("%s: esintr TXINT IST %02x PNR %02x(%d)",
437 sc->sc_dev.dv_xname, smc->b2.ist,
438 tx_pnr, n);
439 printf(" Status %04x", smc->b2.data);
440 printf(" EPHSR %04x\n", ephsr);
441 #endif
442 if ((smc->b2.data & EPHSR_TX_SUC) == 0 && (tcr & TCR_TXENA) == 0) {
443 /*
444 * Transmitter was stopped for some error. Enqueue
445 * the packet again and restart the transmitter.
446 * May need some check to limit the number of retries.
447 */
448 smc->b2.mmucr = MMUCR_ENQ_TX;
449 smc->b0.bsr = BSR_BANK0;
450 smc->b0.tcr |= TCR_TXENA;
451 smc->b2.bsr = BSR_BANK2;
452 ifp->if_oerrors++;
453 sc->sc_intctl |= MSK_TX_EMPTY | MSK_TX;
454 } else {
455 /*
456 * This shouldn't have happened: IST_TX indicates
457 * the TX completion FIFO is not empty, but the
458 * status for the packet on the completion FIFO
459 * shows that the transmit was sucessful. Since
460 * AutoRelease is being used, a sucessful transmit
461 * should not result in a packet on the completion
462 * FIFO. Also, that packet doesn't seem to want
463 * to be acknowledged. If this occurs, just reset
464 * the TX FIFOs.
465 */
466 #if 1
467 if (smc->b2.ist & IST_TX_EMPTY) {
468 smc->b2.mmucr = MMUCR_RESET_TX;
469 sc->sc_intctl &= ~(MSK_TX_EMPTY | MSK_TX);
470 }
471 #endif
472 #ifdef ESDEBUG
473 ++estxints; /* count IST_TX with TX enabled */
474 #endif
475 }
476 smc->b2.pnr = save_pnr;
477 smc->b2.ptr = save_ptr;
478 smc->b2.ist = ACK_TX;
479
480 if ((smc->b2.fifo & FIFO_TEMPTY) == 0 && n++ < 32) {
481 #if 0 /* XXXX */
482 printf("%s: multiple TX int(%2d) pnr %02x ist %02x fifo %04x",
483 sc->sc_dev.dv_xname, n, tx_pnr, smc->b2.ist, smc->b2.fifo);
484 smc->w2.istmsk = ACK_TX << 8;
485 printf(" %04x\n", smc->b2.fifo);
486 #endif
487 if (tx_pnr != (smc->b2.fifo >> 8))
488 goto zzzz;
489 }
490 }
491 /* output packets */
492 estint(sc);
493 #ifdef ESDEBUG
494 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
495 printf("%s: intr+++ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
496 smc->b2.bsr);
497 smc->b2.bsr = BSR_BANK2;
498 }
499 #endif
500 smc->b2.msk = sc->sc_intctl;
501 #ifdef ESDEBUG
502 if (--sc->sc_intbusy) {
503 printf("%s: esintr busy on exit\n", sc->sc_dev.dv_xname);
504 panic("esintr busy on exit");
505 }
506 #endif
507 splx(s);
508 return (1);
509 }
510
511 void
512 esrint(struct es_softc *sc)
513 {
514 union smcregs *smc = sc->sc_base;
515 u_short len;
516 short cnt;
517 u_short pktctlw, pktlen, *buf;
518 volatile u_short *data;
519 #if 0
520 u_long *lbuf;
521 volatile u_long *ldata;
522 #endif
523 struct ifnet *ifp;
524 struct mbuf *top, **mp, *m;
525 #ifdef USEPKTBUF
526 u_char *b, pktbuf[1530];
527 #endif
528 #ifdef ESDEBUG
529 int i;
530 #endif
531
532 ifp = &sc->sc_ethercom.ec_if;
533 #ifdef ESDEBUG
534 if (esdebug)
535 printf ("%s: esrint fifo %04x", sc->sc_dev.dv_xname,
536 smc->b2.fifo);
537 if (sc->sc_smcbusy++) {
538 printf("%s: esrint re-entered\n", sc->sc_dev.dv_xname);
539 panic("esrint re-entered");
540 }
541 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
542 printf("%s: rint BSR not 2: %04x\n", sc->sc_dev.dv_xname,
543 smc->b2.bsr);
544 smc->b2.bsr = BSR_BANK2;
545 }
546 #endif
547 data = (u_short *)&smc->b2.data;
548 smc->b2.ptr = PTR_RCV | PTR_AUTOINCR | PTR_READ | SWAP(0x0002);
549 (void) smc->b2.mmucr;
550 #ifdef ESDEBUG
551 if (esdebug)
552 printf ("->%04x", smc->b2.fifo);
553 #endif
554 len = *data;
555 len = SWAP(len); /* Careful of macro side-effects */
556 #ifdef ESDEBUG
557 if (esdebug)
558 printf (" length %d", len);
559 #endif
560 smc->b2.ptr = PTR_RCV | (PTR_AUTOINCR + PTR_READ) | SWAP(0x0000);
561 (void) smc->b2.mmucr;
562 pktctlw = *data;
563 pktlen = *data;
564 pktctlw = SWAP(pktctlw);
565 pktlen = SWAP(pktlen) - 6;
566 if (pktctlw & RFSW_ODDFRM)
567 pktlen++;
568 if (len > 1530) {
569 printf("%s: Corrupted packet length-sts %04x bytcnt %04x len %04x bank %04x\n",
570 sc->sc_dev.dv_xname, pktctlw, pktlen, len, smc->b2.bsr);
571 /* XXX ignore packet, or just truncate? */
572 #if defined(ESDEBUG) && defined(DDB)
573 if ((smc->b2.bsr & BSR_MASK) != BSR_BANK2)
574 Debugger();
575 #endif
576 smc->b2.bsr = BSR_BANK2;
577 smc->b2.mmucr = MMUCR_REMRLS_RX;
578 while (smc->b2.mmucr & MMUCR_BUSY)
579 ;
580 ++ifp->if_ierrors;
581 #ifdef ESDEBUG
582 if (--sc->sc_smcbusy) {
583 printf("%s: esrintr busy on bad packet exit\n",
584 sc->sc_dev.dv_xname);
585 panic("esrintr busy on exit");
586 }
587 #endif
588 return;
589 }
590 #ifdef USEPKTBUF
591 #if 0
592 lbuf = (u_long *) pktbuf;
593 ldata = (u_long *)data;
594 cnt = (len - 4) / 4;
595 while (cnt--)
596 *lbuf++ = *ldata;
597 if ((len - 4) & 2) {
598 buf = (u_short *) lbuf;
599 *buf = *data;
600 }
601 #else
602 buf = (u_short *)pktbuf;
603 cnt = (len - 4) / 2;
604 while (cnt--)
605 *buf++ = *data;
606 #endif
607 smc->b2.mmucr = MMUCR_REMRLS_RX;
608 while (smc->b2.mmucr & MMUCR_BUSY)
609 ;
610 #ifdef ESDEBUG
611 if (pktctlw & (RFSW_ALGNERR | RFSW_BADCRC | RFSW_TOOLNG | RFSW_TOOSHORT)) {
612 printf ("%s: Packet error %04x\n", sc->sc_dev.dv_xname, pktctlw);
613 /* count input error? */
614 }
615 if (esdebug) {
616 printf (" pktctlw %04x pktlen %04x fifo %04x\n", pktctlw, pktlen,
617 smc->b2.fifo);
618 for (i = 0; i < pktlen; ++i)
619 printf ("%02x%s", pktbuf[i], ((i & 31) == 31) ? "\n" :
620 "");
621 if (i & 31)
622 printf ("\n");
623 }
624 #endif
625 #else /* USEPKTBUF */
626 /* XXX copy directly from controller to mbuf */
627 #ifdef ESDEBUG
628 if (pktctlw & (RFSW_ALGNERR | RFSW_BADCRC | RFSW_TOOLNG | RFSW_TOOSHORT)) {
629 printf ("%s: Packet error %04x\n", sc->sc_dev.dv_xname, pktctlw);
630 /* count input error? */
631 }
632 if (esdebug) {
633 printf (" pktctlw %04x pktlen %04x fifo %04x\n", pktctlw, pktlen,
634 smc->b2.fifo);
635 }
636 #endif
637 #endif /* USEPKTBUF */
638 ifp->if_ipackets++;
639 MGETHDR(m, M_DONTWAIT, MT_DATA);
640 if (m == NULL)
641 return;
642 m->m_pkthdr.rcvif = ifp;
643 m->m_pkthdr.len = pktlen;
644 len = MHLEN;
645 top = NULL;
646 mp = ⊤
647 #ifdef USEPKTBUF
648 b = pktbuf;
649 #endif
650 while (pktlen > 0) {
651 if (top) {
652 MGET(m, M_DONTWAIT, MT_DATA);
653 if (m == 0) {
654 m_freem(top);
655 return;
656 }
657 len = MLEN;
658 }
659 if (pktlen >= MINCLSIZE) {
660 MCLGET(m, M_DONTWAIT);
661 if (m->m_flags & M_EXT)
662 len = MCLBYTES;
663 }
664 m->m_len = len = min(pktlen, len);
665 #ifdef USEPKTBUF
666 bcopy((caddr_t)b, mtod(m, caddr_t), len);
667 b += len;
668 #else /* USEPKTBUF */
669 buf = mtod(m, u_short *);
670 cnt = len / 2;
671 while (cnt--)
672 *buf++ = *data;
673 if (len & 1)
674 *buf = *data; /* XXX should be byte store */
675 #ifdef ESDEBUG
676 if (esdebug) {
677 buf = mtod(m, u_short *);
678 for (i = 0; i < len; ++i)
679 printf ("%02x%s", ((u_char *)buf)[i],
680 ((i & 31) == 31) ? "\n" : "");
681 if (i & 31)
682 printf ("\n");
683 }
684 #endif
685 #endif /* USEPKTBUF */
686 pktlen -= len;
687 *mp = m;
688 mp = &m->m_next;
689 }
690 #ifndef USEPKTBUF
691 smc->b2.mmucr = MMUCR_REMRLS_RX;
692 while (smc->b2.mmucr & MMUCR_BUSY)
693 ;
694 #endif
695 #if NBPFILTER > 0
696 /*
697 * Check if there's a BPF listener on this interface. If so, hand off
698 * the raw packet to bpf.
699 */
700 if (ifp->if_bpf)
701 bpf_mtap(ifp->if_bpf, top);
702 #endif
703 (*ifp->if_input)(ifp, top);
704 #ifdef ESDEBUG
705 if (--sc->sc_smcbusy) {
706 printf("%s: esintr busy on exit\n", sc->sc_dev.dv_xname);
707 panic("esintr busy on exit");
708 }
709 #endif
710 }
711
712 void
713 estint(struct es_softc *sc)
714 {
715
716 esstart(&sc->sc_ethercom.ec_if);
717 }
718
719 void
720 esstart(struct ifnet *ifp)
721 {
722 struct es_softc *sc = ifp->if_softc;
723 union smcregs *smc = sc->sc_base;
724 struct mbuf *m0, *m;
725 #ifdef USEPKTBUF
726 u_short pktbuf[ETHERMTU + 2];
727 #else
728 u_short oddbyte, needbyte;
729 #endif
730 u_short pktctlw, pktlen;
731 u_short *buf;
732 volatile u_short *data;
733 #if 0
734 u_long *lbuf;
735 volatile u_long *ldata;
736 #endif
737 short cnt;
738 int i;
739 u_char active_pnr;
740
741 if ((sc->sc_ethercom.ec_if.if_flags & (IFF_RUNNING | IFF_OACTIVE)) !=
742 IFF_RUNNING)
743 return;
744
745 #ifdef ESDEBUG
746 if (sc->sc_smcbusy++) {
747 printf("%s: esstart re-entered\n", sc->sc_dev.dv_xname);
748 panic("esstart re-entred");
749 }
750 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
751 printf("%s: esstart BSR not 2: %04x\n", sc->sc_dev.dv_xname,
752 smc->b2.bsr);
753 smc->b2.bsr = BSR_BANK2;
754 }
755 #endif
756 for (;;) {
757 #ifdef ESDEBUG
758 u_short start_ptr, end_ptr;
759 #endif
760 /*
761 * Sneak a peek at the next packet to get the length
762 * and see if the SMC 91C90 can accept it.
763 */
764 m = sc->sc_ethercom.ec_if.if_snd.ifq_head;
765 if (!m)
766 break;
767 #ifdef ESDEBUG
768 if (esdebug && (m->m_next || m->m_len & 1))
769 printf("%s: esstart m_next %p m_len %d\n",
770 sc->sc_dev.dv_xname, m->m_next, m->m_len);
771 #endif
772 for (m0 = m, pktlen = 0; m0; m0 = m0->m_next)
773 pktlen += m0->m_len;
774 pktctlw = 0;
775 pktlen += 4;
776 if (pktlen & 1)
777 ++pktlen; /* control byte after last byte */
778 else
779 pktlen += 2; /* control byte after pad byte */
780 smc->b2.mmucr = MMUCR_ALLOC | (pktlen & 0x0700);
781 for (i = 0; i <= 5; ++i)
782 if ((smc->b2.arr & ARR_FAILED) == 0)
783 break;
784 if (smc->b2.arr & ARR_FAILED) {
785 sc->sc_ethercom.ec_if.if_flags |= IFF_OACTIVE;
786 sc->sc_intctl |= MSK_ALLOC;
787 break;
788 }
789 active_pnr = smc->b2.pnr = smc->b2.arr;
790
791 #ifdef ESDEBUG
792 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
793 printf("%s: esstart+ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
794 smc->b2.bsr);
795 smc->b2.bsr = BSR_BANK2;
796 }
797 #endif
798 IF_DEQUEUE(&sc->sc_ethercom.ec_if.if_snd, m);
799 smc->b2.ptr = PTR_AUTOINCR;
800 (void) smc->b2.mmucr;
801 data = (u_short *)&smc->b2.data;
802 *data = SWAP(pktctlw);
803 *data = SWAP(pktlen);
804 #ifdef ESDEBUG
805 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
806 printf("%s: esstart++ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
807 smc->b2.bsr);
808 smc->b2.bsr = BSR_BANK2;
809 }
810 #endif
811 #ifdef USEPKTBUF
812 i = 0;
813 for (m0 = m; m; m = m->m_next) {
814 bcopy(mtod(m, caddr_t), (char *)pktbuf + i, m->m_len);
815 i += m->m_len;
816 }
817
818 if (i & 1) /* Figure out where to put control byte */
819 pktbuf[i/2] = (pktbuf[i/2] & 0xff00) | CTLB_ODD;
820 else
821 pktbuf[i/2] = 0;
822 pktlen -= 4;
823 #ifdef ESDEBUG
824 if (pktlen > sizeof(pktbuf) && i > (sizeof(pktbuf) * 2))
825 printf("%s: esstart packet longer than pktbuf\n",
826 sc->sc_dev.dv_xname);
827 #endif
828 #if 0 /* doesn't quite work? */
829 lbuf = (u_long *)(pktbuf);
830 ldata = (u_long *)data;
831 cnt = pktlen / 4;
832 while(cnt--)
833 *ldata = *lbuf++;
834 if (pktlen & 2) {
835 buf = (u_short *)lbuf;
836 *data = *buf;
837 }
838 #else
839 #ifdef ESDEBUG
840 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
841 printf("%s: esstart++2 BSR not 2: %04x\n", sc->sc_dev.dv_xname,
842 smc->b2.bsr);
843 smc->b2.bsr = BSR_BANK2;
844 }
845 start_ptr = SWAP(smc->b2.ptr); /* save PTR before copy */
846 #endif
847 buf = pktbuf;
848 cnt = pktlen / 2;
849 while (cnt--)
850 *data = *buf++;
851 #ifdef ESDEBUG
852 end_ptr = SWAP(smc->b2.ptr); /* save PTR after copy */
853 #endif
854 #endif
855 #else /* USEPKTBUF */
856 pktctlw = 0;
857 oddbyte = needbyte = 0;
858 for (m0 = m; m; m = m->m_next) {
859 buf = mtod(m, u_short *);
860 cnt = m->m_len / 2;
861 if (needbyte) {
862 oddbyte |= *buf >> 8;
863 *data = oddbyte;
864 }
865 while (cnt--)
866 *data = *buf++;
867 if (m->m_len & 1)
868 pktctlw = (*buf & 0xff00) | CTLB_ODD;
869 if (m->m_len & 1 && m->m_next)
870 printf("%s: esstart odd byte count in mbuf\n",
871 sc->sc_dev.dv_xname);
872 }
873 *data = pktctlw;
874 #endif /* USEPKTBUF */
875 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
876 /*
877 * The bank select register has changed. This seems
878 * to happen with my A2000/Zeus once in a while. It
879 * appears that the Ethernet chip resets while
880 * copying the transmit buffer. Requeue the current
881 * transmit buffer and reinitialize the interface.
882 * The initialize routine will take care of
883 * retransmitting the buffer. mhitch
884 */
885 #ifdef DIAGNOSTIC
886 printf("%s: esstart+++ BSR not 2: %04x\n",
887 sc->sc_dev.dv_xname, smc->b2.bsr);
888 #endif
889 smc->b2.bsr = BSR_BANK2;
890 #ifdef ESDEBUG
891 printf("start_ptr %04x end_ptr %04x cur ptr %04x\n",
892 start_ptr, end_ptr, SWAP(smc->b2.ptr));
893 --sc->sc_smcbusy;
894 #endif
895 IF_PREPEND(&sc->sc_ethercom.ec_if.if_snd, m0);
896 esinit(sc); /* It's really hosed - reset */
897 return;
898 }
899 smc->b2.mmucr = MMUCR_ENQ_TX;
900 if (smc->b2.pnr != active_pnr)
901 printf("%s: esstart - PNR changed %x->%x\n",
902 sc->sc_dev.dv_xname, active_pnr, smc->b2.pnr);
903 #if NBPFILTER > 0
904 if (sc->sc_ethercom.ec_if.if_bpf)
905 bpf_mtap(sc->sc_ethercom.ec_if.if_bpf, m0);
906 #endif
907 m_freem(m0);
908 sc->sc_ethercom.ec_if.if_opackets++; /* move to interrupt? */
909 sc->sc_intctl |= MSK_TX_EMPTY | MSK_TX;
910 }
911 smc->b2.msk = sc->sc_intctl;
912 #ifdef ESDEBUG
913 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
914 printf("%s: esstart++++ BSR not 2: %04x\n", sc->sc_dev.dv_xname,
915 smc->b2.bsr);
916 smc->b2.bsr = BSR_BANK2;
917 }
918 if (--sc->sc_smcbusy) {
919 printf("%s: esstart busy on exit\n", sc->sc_dev.dv_xname);
920 panic("esstart busy on exit");
921 }
922 #endif
923 }
924
925 int
926 esioctl(register struct ifnet *ifp, u_long command, caddr_t data)
927 {
928 struct es_softc *sc = ifp->if_softc;
929 register struct ifaddr *ifa = (struct ifaddr *)data;
930 struct ifreq *ifr = (struct ifreq *)data;
931 int s, error = 0;
932
933 s = splnet();
934
935 switch (command) {
936
937 case SIOCSIFADDR:
938 ifp->if_flags |= IFF_UP;
939
940 switch (ifa->ifa_addr->sa_family) {
941 #ifdef INET
942 case AF_INET:
943 esinit(sc);
944 arp_ifinit(ifp, ifa);
945 break;
946 #endif
947 #ifdef NS
948 case AF_NS:
949 {
950 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
951
952 if (ns_nullhost(*ina))
953 ina->x_host =
954 *(union ns_host *)LLADDR(ifp->if_sadl);
955 else
956 bcopy(ina->x_host.c_host,
957 LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
958 /* Set new address. */
959 esinit(sc);
960 break;
961 }
962 #endif
963 default:
964 esinit(sc);
965 break;
966 }
967 break;
968
969 case SIOCSIFFLAGS:
970 /*
971 * If interface is marked down and it is running, then stop it
972 */
973 if ((ifp->if_flags & IFF_UP) == 0 &&
974 (ifp->if_flags & IFF_RUNNING) != 0) {
975 /*
976 * If interface is marked down and it is running, then
977 * stop it.
978 */
979 esstop(sc);
980 ifp->if_flags &= ~IFF_RUNNING;
981 } else if ((ifp->if_flags & IFF_UP) != 0 &&
982 (ifp->if_flags & IFF_RUNNING) == 0) {
983 /*
984 * If interface is marked up and it is stopped, then
985 * start it.
986 */
987 esinit(sc);
988 } else {
989 /*
990 * Reset the interface to pick up changes in any other
991 * flags that affect hardware registers.
992 */
993 esstop(sc);
994 esinit(sc);
995 }
996 #ifdef ESDEBUG
997 if (ifp->if_flags & IFF_DEBUG)
998 esdebug = sc->sc_debug = 1;
999 else
1000 esdebug = sc->sc_debug = 0;
1001 #endif
1002 break;
1003
1004 case SIOCADDMULTI:
1005 case SIOCDELMULTI:
1006 error = (command == SIOCADDMULTI) ?
1007 ether_addmulti(ifr, &sc->sc_ethercom) :
1008 ether_delmulti(ifr, &sc->sc_ethercom);
1009
1010 if (error == ENETRESET) {
1011 /*
1012 * Multicast list has changed; set the hardware filter
1013 * accordingly.
1014 */
1015 /* XXX */
1016 error = 0;
1017 }
1018 break;
1019
1020 default:
1021 error = EINVAL;
1022 }
1023
1024 splx(s);
1025 return (error);
1026 }
1027
1028 void
1029 esreset(struct es_softc *sc)
1030 {
1031 int s;
1032
1033 s = splnet();
1034 esstop(sc);
1035 esinit(sc);
1036 splx(s);
1037 }
1038
1039 void
1040 eswatchdog(struct ifnet *ifp)
1041 {
1042 struct es_softc *sc = ifp->if_softc;
1043
1044 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1045 ++ifp->if_oerrors;
1046
1047 esreset(sc);
1048 }
1049