ivsc.c revision 1.20 1 1.20 thorpej /* $NetBSD: ivsc.c,v 1.20 1996/12/10 21:27:25 thorpej Exp $ */
2 1.5 cgd
3 1.1 chopps /*
4 1.2 chopps * Copyright (c) 1994 Michael L. Hitch
5 1.1 chopps * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 chopps * All rights reserved.
7 1.1 chopps *
8 1.1 chopps * Redistribution and use in source and binary forms, with or without
9 1.1 chopps * modification, are permitted provided that the following conditions
10 1.1 chopps * are met:
11 1.1 chopps * 1. Redistributions of source code must retain the above copyright
12 1.1 chopps * notice, this list of conditions and the following disclaimer.
13 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 chopps * notice, this list of conditions and the following disclaimer in the
15 1.1 chopps * documentation and/or other materials provided with the distribution.
16 1.1 chopps * 3. All advertising materials mentioning features or use of this software
17 1.1 chopps * must display the following acknowledgement:
18 1.1 chopps * This product includes software developed by the University of
19 1.1 chopps * California, Berkeley and its contributors.
20 1.1 chopps * 4. Neither the name of the University nor the names of its contributors
21 1.1 chopps * may be used to endorse or promote products derived from this software
22 1.1 chopps * without specific prior written permission.
23 1.1 chopps *
24 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.1 chopps * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.1 chopps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.1 chopps * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.1 chopps * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.1 chopps * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.1 chopps * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.1 chopps * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.1 chopps * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.1 chopps * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.1 chopps * SUCH DAMAGE.
35 1.1 chopps *
36 1.1 chopps * @(#)ivsdma.c
37 1.1 chopps */
38 1.2 chopps #include <sys/param.h>
39 1.2 chopps #include <sys/systm.h>
40 1.2 chopps #include <sys/kernel.h>
41 1.2 chopps #include <sys/device.h>
42 1.2 chopps #include <scsi/scsi_all.h>
43 1.2 chopps #include <scsi/scsiconf.h>
44 1.2 chopps #include <amiga/amiga/custom.h>
45 1.2 chopps #include <amiga/amiga/device.h>
46 1.9 chopps #include <amiga/amiga/isr.h>
47 1.2 chopps #include <amiga/dev/scireg.h>
48 1.2 chopps #include <amiga/dev/scivar.h>
49 1.7 chopps #include <amiga/dev/zbusvar.h>
50 1.2 chopps
51 1.2 chopps void ivscattach __P((struct device *, struct device *, void *));
52 1.13 thorpej int ivscmatch __P((struct device *, void *, void *));
53 1.2 chopps
54 1.15 veego int ivsc_intr __P((void *));
55 1.2 chopps int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len,
56 1.2 chopps register u_char *buf, int phase));
57 1.2 chopps int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len,
58 1.2 chopps register u_char *buf, int phase));
59 1.2 chopps
60 1.2 chopps struct scsi_adapter ivsc_scsiswitch = {
61 1.2 chopps sci_scsicmd,
62 1.2 chopps sci_minphys,
63 1.2 chopps 0, /* no lun support */
64 1.2 chopps 0, /* no lun support */
65 1.2 chopps };
66 1.2 chopps
67 1.2 chopps struct scsi_device ivsc_scsidev = {
68 1.2 chopps NULL, /* use default error handler */
69 1.2 chopps NULL, /* do not have a start functio */
70 1.2 chopps NULL, /* have no async handler */
71 1.2 chopps NULL, /* Use default done routine */
72 1.2 chopps };
73 1.2 chopps
74 1.2 chopps
75 1.2 chopps #ifdef DEBUG
76 1.2 chopps extern int sci_debug;
77 1.19 christos #define QPRINTF(a) if (sci_debug > 1) printf a
78 1.15 veego #else
79 1.15 veego #define QPRINTF(a)
80 1.2 chopps #endif
81 1.2 chopps
82 1.2 chopps extern int sci_data_wait;
83 1.2 chopps
84 1.11 chopps int ivsdma_pseudo = 1; /* 0=off, 1=on */
85 1.11 chopps
86 1.13 thorpej struct cfattach ivsc_ca = {
87 1.13 thorpej sizeof(struct sci_softc), ivscmatch, ivscattach
88 1.13 thorpej };
89 1.13 thorpej
90 1.13 thorpej struct cfdriver ivsc_cd = {
91 1.13 thorpej NULL, "ivsc", DV_DULL, NULL, 0
92 1.13 thorpej };
93 1.1 chopps
94 1.1 chopps /*
95 1.2 chopps * if this is an IVS board
96 1.1 chopps */
97 1.2 chopps int
98 1.13 thorpej ivscmatch(pdp, match, auxp)
99 1.2 chopps struct device *pdp;
100 1.13 thorpej void *match, *auxp;
101 1.2 chopps {
102 1.7 chopps struct zbus_args *zap;
103 1.1 chopps
104 1.2 chopps zap = auxp;
105 1.1 chopps
106 1.2 chopps /*
107 1.2 chopps * Check manufacturer and product id.
108 1.2 chopps */
109 1.2 chopps if (zap->manid != 2112 || /* If manufacturer is IVS */
110 1.12 chopps (zap->prodid != 48 && /* product = Trumpcard 500 */
111 1.12 chopps zap->prodid != 52 && /* product = Trumpcard */
112 1.2 chopps zap->prodid != 243)) /* product = Vector SCSI */
113 1.2 chopps return(0); /* didn't match */
114 1.2 chopps return(1);
115 1.2 chopps }
116 1.1 chopps
117 1.1 chopps void
118 1.2 chopps ivscattach(pdp, dp, auxp)
119 1.2 chopps struct device *pdp, *dp;
120 1.2 chopps void *auxp;
121 1.2 chopps {
122 1.2 chopps volatile u_char *rp;
123 1.2 chopps struct sci_softc *sc;
124 1.7 chopps struct zbus_args *zap;
125 1.3 chopps
126 1.19 christos printf("\n");
127 1.2 chopps
128 1.2 chopps zap = auxp;
129 1.2 chopps
130 1.2 chopps sc = (struct sci_softc *)dp;
131 1.2 chopps rp = zap->va + 0x40;
132 1.2 chopps sc->sci_data = rp;
133 1.2 chopps sc->sci_odata = rp;
134 1.2 chopps sc->sci_icmd = rp + 2;
135 1.2 chopps sc->sci_mode = rp + 4;
136 1.2 chopps sc->sci_tcmd = rp + 6;
137 1.2 chopps sc->sci_bus_csr = rp + 8;
138 1.2 chopps sc->sci_sel_enb = rp + 8;
139 1.2 chopps sc->sci_csr = rp + 10;
140 1.2 chopps sc->sci_dma_send = rp + 10;
141 1.2 chopps sc->sci_idata = rp + 12;
142 1.2 chopps sc->sci_trecv = rp + 12;
143 1.2 chopps sc->sci_iack = rp + 14;
144 1.2 chopps sc->sci_irecv = rp + 14;
145 1.2 chopps
146 1.11 chopps if (ivsdma_pseudo == 1) {
147 1.11 chopps sc->dma_xfer_in = ivsc_dma_xfer_in;
148 1.11 chopps sc->dma_xfer_out = ivsc_dma_xfer_out;
149 1.11 chopps }
150 1.2 chopps
151 1.9 chopps sc->sc_isr.isr_intr = ivsc_intr;
152 1.9 chopps sc->sc_isr.isr_arg = sc;
153 1.9 chopps sc->sc_isr.isr_ipl = 2;
154 1.9 chopps add_isr(&sc->sc_isr);
155 1.9 chopps
156 1.2 chopps scireset(sc);
157 1.2 chopps
158 1.17 cgd sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
159 1.2 chopps sc->sc_link.adapter_softc = sc;
160 1.8 chopps sc->sc_link.adapter_target = 7;
161 1.2 chopps sc->sc_link.adapter = &ivsc_scsiswitch;
162 1.2 chopps sc->sc_link.device = &ivsc_scsidev;
163 1.8 chopps sc->sc_link.openings = 1;
164 1.20 thorpej sc->sc_link.max_target = 7;
165 1.2 chopps TAILQ_INIT(&sc->sc_xslist);
166 1.2 chopps
167 1.2 chopps /*
168 1.2 chopps * attach all scsi units on us
169 1.2 chopps */
170 1.17 cgd config_found(dp, &sc->sc_link, scsiprint);
171 1.2 chopps }
172 1.2 chopps
173 1.2 chopps int
174 1.2 chopps ivsc_dma_xfer_in (dev, len, buf, phase)
175 1.2 chopps struct sci_softc *dev;
176 1.2 chopps int len;
177 1.2 chopps register u_char *buf;
178 1.2 chopps int phase;
179 1.2 chopps {
180 1.11 chopps int wait = sci_data_wait;
181 1.11 chopps volatile register u_char *sci_dma = dev->sci_idata + 0x20;
182 1.11 chopps volatile register u_char *sci_csr = dev->sci_csr;
183 1.15 veego #ifdef DEBUG
184 1.15 veego u_char *obp = buf;
185 1.15 veego #endif
186 1.11 chopps
187 1.11 chopps QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
188 1.11 chopps
189 1.11 chopps *dev->sci_tcmd = phase;
190 1.11 chopps *dev->sci_mode |= SCI_MODE_DMA;
191 1.11 chopps *dev->sci_irecv = 0;
192 1.11 chopps
193 1.11 chopps while (len >= 128) {
194 1.11 chopps wait = sci_data_wait;
195 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
196 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
197 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
198 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
199 1.11 chopps || --wait < 0) {
200 1.11 chopps #ifdef DEBUG
201 1.11 chopps if (sci_debug)
202 1.19 christos printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
203 1.15 veego len, *dev->sci_bus_csr, wait);
204 1.11 chopps #endif
205 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
206 1.11 chopps return 0;
207 1.11 chopps }
208 1.11 chopps }
209 1.11 chopps
210 1.11 chopps #define R1 (*buf++ = *sci_dma)
211 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
212 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
213 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
214 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
215 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
216 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
217 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
218 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
219 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
220 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
221 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
222 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
223 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
224 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
225 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
226 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
227 1.11 chopps len -= 128;
228 1.11 chopps }
229 1.11 chopps
230 1.11 chopps while (len > 0) {
231 1.11 chopps wait = sci_data_wait;
232 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
233 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
234 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
235 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
236 1.11 chopps || --wait < 0) {
237 1.11 chopps #ifdef DEBUG
238 1.11 chopps if (sci_debug)
239 1.19 christos printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
240 1.15 veego len, *dev->sci_bus_csr, wait);
241 1.11 chopps #endif
242 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
243 1.11 chopps return 0;
244 1.11 chopps }
245 1.11 chopps }
246 1.11 chopps
247 1.11 chopps *buf++ = *sci_dma;
248 1.11 chopps len--;
249 1.11 chopps }
250 1.11 chopps
251 1.11 chopps QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
252 1.11 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
253 1.11 chopps obp[6], obp[7], obp[8], obp[9]));
254 1.11 chopps
255 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
256 1.11 chopps return 0;
257 1.2 chopps }
258 1.2 chopps
259 1.2 chopps int
260 1.2 chopps ivsc_dma_xfer_out (dev, len, buf, phase)
261 1.2 chopps struct sci_softc *dev;
262 1.2 chopps int len;
263 1.2 chopps register u_char *buf;
264 1.2 chopps int phase;
265 1.1 chopps {
266 1.11 chopps int wait = sci_data_wait;
267 1.11 chopps volatile register u_char *sci_dma = dev->sci_data + 0x20;
268 1.11 chopps volatile register u_char *sci_csr = dev->sci_csr;
269 1.11 chopps
270 1.11 chopps QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
271 1.11 chopps
272 1.11 chopps QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
273 1.11 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
274 1.11 chopps buf[6], buf[7], buf[8], buf[9]));
275 1.11 chopps
276 1.11 chopps *dev->sci_tcmd = phase;
277 1.11 chopps *dev->sci_mode |= SCI_MODE_DMA;
278 1.11 chopps *dev->sci_icmd |= SCI_ICMD_DATA;
279 1.11 chopps *dev->sci_dma_send = 0;
280 1.11 chopps while (len > 0) {
281 1.11 chopps wait = sci_data_wait;
282 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
283 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
284 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
285 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
286 1.11 chopps || --wait < 0) {
287 1.11 chopps #ifdef DEBUG
288 1.11 chopps if (sci_debug)
289 1.19 christos printf("ivsc_dma_out fail: l%d i%x w%d\n",
290 1.15 veego len, *dev->sci_bus_csr, wait);
291 1.11 chopps #endif
292 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
293 1.11 chopps return 0;
294 1.11 chopps }
295 1.11 chopps }
296 1.11 chopps
297 1.11 chopps *sci_dma = *buf++;
298 1.11 chopps len--;
299 1.11 chopps }
300 1.11 chopps
301 1.11 chopps wait = sci_data_wait;
302 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
303 1.11 chopps SCI_CSR_PHASE_MATCH && --wait);
304 1.11 chopps
305 1.11 chopps
306 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
307 1.11 chopps return 0;
308 1.1 chopps }
309 1.2 chopps
310 1.2 chopps int
311 1.15 veego ivsc_intr(arg)
312 1.15 veego void *arg;
313 1.2 chopps {
314 1.15 veego struct sci_softc *dev = arg;
315 1.2 chopps u_char stat;
316 1.2 chopps
317 1.9 chopps if ((*dev->sci_csr & SCI_CSR_INT) == 0)
318 1.9 chopps return(0);
319 1.9 chopps stat = *dev->sci_iack;
320 1.14 is /* XXXX is: something is missing here, at least a: */
321 1.14 is return(1);
322 1.2 chopps }
323