ivsc.c revision 1.28 1 1.28 bouyer /* $NetBSD: ivsc.c,v 1.28 2001/04/25 17:53:07 bouyer Exp $ */
2 1.5 cgd
3 1.1 chopps /*
4 1.2 chopps * Copyright (c) 1994 Michael L. Hitch
5 1.1 chopps * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 chopps * All rights reserved.
7 1.1 chopps *
8 1.1 chopps * Redistribution and use in source and binary forms, with or without
9 1.1 chopps * modification, are permitted provided that the following conditions
10 1.1 chopps * are met:
11 1.1 chopps * 1. Redistributions of source code must retain the above copyright
12 1.1 chopps * notice, this list of conditions and the following disclaimer.
13 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 chopps * notice, this list of conditions and the following disclaimer in the
15 1.1 chopps * documentation and/or other materials provided with the distribution.
16 1.1 chopps * 3. All advertising materials mentioning features or use of this software
17 1.1 chopps * must display the following acknowledgement:
18 1.1 chopps * This product includes software developed by the University of
19 1.1 chopps * California, Berkeley and its contributors.
20 1.1 chopps * 4. Neither the name of the University nor the names of its contributors
21 1.1 chopps * may be used to endorse or promote products derived from this software
22 1.1 chopps * without specific prior written permission.
23 1.1 chopps *
24 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.1 chopps * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.1 chopps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.1 chopps * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.1 chopps * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.1 chopps * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.1 chopps * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.1 chopps * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.1 chopps * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.1 chopps * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.1 chopps * SUCH DAMAGE.
35 1.1 chopps *
36 1.1 chopps * @(#)ivsdma.c
37 1.1 chopps */
38 1.2 chopps #include <sys/param.h>
39 1.2 chopps #include <sys/systm.h>
40 1.2 chopps #include <sys/kernel.h>
41 1.2 chopps #include <sys/device.h>
42 1.22 bouyer #include <dev/scsipi/scsi_all.h>
43 1.22 bouyer #include <dev/scsipi/scsipi_all.h>
44 1.22 bouyer #include <dev/scsipi/scsiconf.h>
45 1.2 chopps #include <amiga/amiga/custom.h>
46 1.2 chopps #include <amiga/amiga/device.h>
47 1.9 chopps #include <amiga/amiga/isr.h>
48 1.2 chopps #include <amiga/dev/scireg.h>
49 1.2 chopps #include <amiga/dev/scivar.h>
50 1.7 chopps #include <amiga/dev/zbusvar.h>
51 1.2 chopps
52 1.2 chopps void ivscattach __P((struct device *, struct device *, void *));
53 1.21 veego int ivscmatch __P((struct device *, struct cfdata *, void *));
54 1.2 chopps
55 1.15 veego int ivsc_intr __P((void *));
56 1.2 chopps int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len,
57 1.2 chopps register u_char *buf, int phase));
58 1.2 chopps int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len,
59 1.2 chopps register u_char *buf, int phase));
60 1.2 chopps
61 1.2 chopps
62 1.2 chopps #ifdef DEBUG
63 1.2 chopps extern int sci_debug;
64 1.19 christos #define QPRINTF(a) if (sci_debug > 1) printf a
65 1.15 veego #else
66 1.15 veego #define QPRINTF(a)
67 1.2 chopps #endif
68 1.2 chopps
69 1.2 chopps extern int sci_data_wait;
70 1.2 chopps
71 1.11 chopps int ivsdma_pseudo = 1; /* 0=off, 1=on */
72 1.11 chopps
73 1.13 thorpej struct cfattach ivsc_ca = {
74 1.13 thorpej sizeof(struct sci_softc), ivscmatch, ivscattach
75 1.13 thorpej };
76 1.1 chopps
77 1.1 chopps /*
78 1.2 chopps * if this is an IVS board
79 1.1 chopps */
80 1.2 chopps int
81 1.21 veego ivscmatch(pdp, cfp, auxp)
82 1.2 chopps struct device *pdp;
83 1.21 veego struct cfdata *cfp;
84 1.21 veego void *auxp;
85 1.2 chopps {
86 1.7 chopps struct zbus_args *zap;
87 1.1 chopps
88 1.2 chopps zap = auxp;
89 1.1 chopps
90 1.2 chopps /*
91 1.2 chopps * Check manufacturer and product id.
92 1.2 chopps */
93 1.2 chopps if (zap->manid != 2112 || /* If manufacturer is IVS */
94 1.12 chopps (zap->prodid != 48 && /* product = Trumpcard 500 */
95 1.12 chopps zap->prodid != 52 && /* product = Trumpcard */
96 1.2 chopps zap->prodid != 243)) /* product = Vector SCSI */
97 1.2 chopps return(0); /* didn't match */
98 1.2 chopps return(1);
99 1.2 chopps }
100 1.1 chopps
101 1.1 chopps void
102 1.2 chopps ivscattach(pdp, dp, auxp)
103 1.2 chopps struct device *pdp, *dp;
104 1.2 chopps void *auxp;
105 1.2 chopps {
106 1.2 chopps volatile u_char *rp;
107 1.28 bouyer struct sci_softc *sc = (struct sci_softc *)dp;
108 1.7 chopps struct zbus_args *zap;
109 1.28 bouyer struct scsipi_adapter *adapt = &sc->sc_adapter;
110 1.28 bouyer struct scsipi_channel *chan = &sc->sc_channel;
111 1.3 chopps
112 1.19 christos printf("\n");
113 1.2 chopps
114 1.2 chopps zap = auxp;
115 1.2 chopps
116 1.27 tron rp = (u_char *)zap->va + 0x40;
117 1.2 chopps sc->sci_data = rp;
118 1.2 chopps sc->sci_odata = rp;
119 1.2 chopps sc->sci_icmd = rp + 2;
120 1.2 chopps sc->sci_mode = rp + 4;
121 1.2 chopps sc->sci_tcmd = rp + 6;
122 1.2 chopps sc->sci_bus_csr = rp + 8;
123 1.2 chopps sc->sci_sel_enb = rp + 8;
124 1.2 chopps sc->sci_csr = rp + 10;
125 1.2 chopps sc->sci_dma_send = rp + 10;
126 1.2 chopps sc->sci_idata = rp + 12;
127 1.2 chopps sc->sci_trecv = rp + 12;
128 1.2 chopps sc->sci_iack = rp + 14;
129 1.2 chopps sc->sci_irecv = rp + 14;
130 1.2 chopps
131 1.11 chopps if (ivsdma_pseudo == 1) {
132 1.11 chopps sc->dma_xfer_in = ivsc_dma_xfer_in;
133 1.11 chopps sc->dma_xfer_out = ivsc_dma_xfer_out;
134 1.11 chopps }
135 1.2 chopps
136 1.9 chopps sc->sc_isr.isr_intr = ivsc_intr;
137 1.9 chopps sc->sc_isr.isr_arg = sc;
138 1.9 chopps sc->sc_isr.isr_ipl = 2;
139 1.9 chopps add_isr(&sc->sc_isr);
140 1.9 chopps
141 1.2 chopps scireset(sc);
142 1.2 chopps
143 1.28 bouyer /*
144 1.28 bouyer * Fill in the scsipi_adapter.
145 1.28 bouyer */
146 1.28 bouyer memset(adapt, 0, sizeof(*adapt));
147 1.28 bouyer adapt->adapt_dev = &sc->sc_dev;
148 1.28 bouyer adapt->adapt_nchannels = 1;
149 1.28 bouyer adapt->adapt_openings = 7;
150 1.28 bouyer adapt->adapt_max_periph = 1;
151 1.28 bouyer adapt->adapt_request = sci_scsipi_request;
152 1.28 bouyer adapt->adapt_minphys = sci_minphys;
153 1.25 thorpej
154 1.28 bouyer /*
155 1.28 bouyer * Fill in the scsipi_channel.
156 1.28 bouyer */
157 1.28 bouyer memset(chan, 0, sizeof(*chan));
158 1.28 bouyer chan->chan_adapter = adapt;
159 1.28 bouyer chan->chan_bustype = &scsi_bustype;
160 1.28 bouyer chan->chan_channel = 0;
161 1.28 bouyer chan->chan_ntargets = 8;
162 1.28 bouyer chan->chan_nluns = 8;
163 1.28 bouyer chan->chan_id = 7;
164 1.2 chopps
165 1.2 chopps /*
166 1.2 chopps * attach all scsi units on us
167 1.2 chopps */
168 1.28 bouyer config_found(dp, chan, scsiprint);
169 1.2 chopps }
170 1.2 chopps
171 1.2 chopps int
172 1.2 chopps ivsc_dma_xfer_in (dev, len, buf, phase)
173 1.2 chopps struct sci_softc *dev;
174 1.2 chopps int len;
175 1.2 chopps register u_char *buf;
176 1.2 chopps int phase;
177 1.2 chopps {
178 1.11 chopps int wait = sci_data_wait;
179 1.11 chopps volatile register u_char *sci_dma = dev->sci_idata + 0x20;
180 1.11 chopps volatile register u_char *sci_csr = dev->sci_csr;
181 1.15 veego #ifdef DEBUG
182 1.15 veego u_char *obp = buf;
183 1.15 veego #endif
184 1.11 chopps
185 1.11 chopps QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
186 1.11 chopps
187 1.11 chopps *dev->sci_tcmd = phase;
188 1.11 chopps *dev->sci_mode |= SCI_MODE_DMA;
189 1.11 chopps *dev->sci_irecv = 0;
190 1.11 chopps
191 1.11 chopps while (len >= 128) {
192 1.11 chopps wait = sci_data_wait;
193 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
194 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
195 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
196 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
197 1.11 chopps || --wait < 0) {
198 1.11 chopps #ifdef DEBUG
199 1.11 chopps if (sci_debug)
200 1.19 christos printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
201 1.15 veego len, *dev->sci_bus_csr, wait);
202 1.11 chopps #endif
203 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
204 1.11 chopps return 0;
205 1.11 chopps }
206 1.11 chopps }
207 1.11 chopps
208 1.11 chopps #define R1 (*buf++ = *sci_dma)
209 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
210 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
211 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
212 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
213 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
214 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
215 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
216 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
217 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
218 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
219 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
220 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
221 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
222 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
223 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
224 1.11 chopps R1; R1; R1; R1; R1; R1; R1; R1;
225 1.11 chopps len -= 128;
226 1.11 chopps }
227 1.11 chopps
228 1.11 chopps while (len > 0) {
229 1.11 chopps wait = sci_data_wait;
230 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
231 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
232 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
233 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
234 1.11 chopps || --wait < 0) {
235 1.11 chopps #ifdef DEBUG
236 1.11 chopps if (sci_debug)
237 1.19 christos printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
238 1.15 veego len, *dev->sci_bus_csr, wait);
239 1.11 chopps #endif
240 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
241 1.11 chopps return 0;
242 1.11 chopps }
243 1.11 chopps }
244 1.11 chopps
245 1.11 chopps *buf++ = *sci_dma;
246 1.11 chopps len--;
247 1.11 chopps }
248 1.11 chopps
249 1.11 chopps QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
250 1.11 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
251 1.11 chopps obp[6], obp[7], obp[8], obp[9]));
252 1.11 chopps
253 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
254 1.11 chopps return 0;
255 1.2 chopps }
256 1.2 chopps
257 1.2 chopps int
258 1.2 chopps ivsc_dma_xfer_out (dev, len, buf, phase)
259 1.2 chopps struct sci_softc *dev;
260 1.2 chopps int len;
261 1.2 chopps register u_char *buf;
262 1.2 chopps int phase;
263 1.1 chopps {
264 1.11 chopps int wait = sci_data_wait;
265 1.11 chopps volatile register u_char *sci_dma = dev->sci_data + 0x20;
266 1.11 chopps volatile register u_char *sci_csr = dev->sci_csr;
267 1.11 chopps
268 1.11 chopps QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
269 1.11 chopps
270 1.11 chopps QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
271 1.11 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
272 1.11 chopps buf[6], buf[7], buf[8], buf[9]));
273 1.11 chopps
274 1.11 chopps *dev->sci_tcmd = phase;
275 1.11 chopps *dev->sci_mode |= SCI_MODE_DMA;
276 1.11 chopps *dev->sci_icmd |= SCI_ICMD_DATA;
277 1.11 chopps *dev->sci_dma_send = 0;
278 1.11 chopps while (len > 0) {
279 1.11 chopps wait = sci_data_wait;
280 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
281 1.11 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
282 1.11 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
283 1.11 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
284 1.11 chopps || --wait < 0) {
285 1.11 chopps #ifdef DEBUG
286 1.11 chopps if (sci_debug)
287 1.19 christos printf("ivsc_dma_out fail: l%d i%x w%d\n",
288 1.15 veego len, *dev->sci_bus_csr, wait);
289 1.11 chopps #endif
290 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
291 1.11 chopps return 0;
292 1.11 chopps }
293 1.11 chopps }
294 1.11 chopps
295 1.11 chopps *sci_dma = *buf++;
296 1.11 chopps len--;
297 1.11 chopps }
298 1.11 chopps
299 1.11 chopps wait = sci_data_wait;
300 1.11 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
301 1.11 chopps SCI_CSR_PHASE_MATCH && --wait);
302 1.11 chopps
303 1.11 chopps
304 1.11 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
305 1.11 chopps return 0;
306 1.1 chopps }
307 1.2 chopps
308 1.2 chopps int
309 1.15 veego ivsc_intr(arg)
310 1.15 veego void *arg;
311 1.2 chopps {
312 1.15 veego struct sci_softc *dev = arg;
313 1.2 chopps u_char stat;
314 1.2 chopps
315 1.9 chopps if ((*dev->sci_csr & SCI_CSR_INT) == 0)
316 1.9 chopps return(0);
317 1.9 chopps stat = *dev->sci_iack;
318 1.14 is /* XXXX is: something is missing here, at least a: */
319 1.14 is return(1);
320 1.2 chopps }
321