Home | History | Annotate | Line # | Download | only in dev
ivsc.c revision 1.15
      1 /*	$NetBSD: ivsc.c,v 1.15 1996/04/21 21:12:04 veego Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994 Michael L. Hitch
      5  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by the University of
     19  *	California, Berkeley and its contributors.
     20  * 4. Neither the name of the University nor the names of its contributors
     21  *    may be used to endorse or promote products derived from this software
     22  *    without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  *	@(#)ivsdma.c
     37  */
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/kernel.h>
     41 #include <sys/device.h>
     42 #include <scsi/scsi_all.h>
     43 #include <scsi/scsiconf.h>
     44 #include <amiga/amiga/custom.h>
     45 #include <amiga/amiga/device.h>
     46 #include <amiga/amiga/isr.h>
     47 #include <amiga/dev/scireg.h>
     48 #include <amiga/dev/scivar.h>
     49 #include <amiga/dev/zbusvar.h>
     50 
     51 int ivscprint __P((void *auxp, char *));
     52 void ivscattach __P((struct device *, struct device *, void *));
     53 int ivscmatch __P((struct device *, void *, void *));
     54 
     55 int ivsc_intr __P((void *));
     56 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len,
     57     register u_char *buf, int phase));
     58 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len,
     59     register u_char *buf, int phase));
     60 
     61 struct scsi_adapter ivsc_scsiswitch = {
     62 	sci_scsicmd,
     63 	sci_minphys,
     64 	0,			/* no lun support */
     65 	0,			/* no lun support */
     66 };
     67 
     68 struct scsi_device ivsc_scsidev = {
     69 	NULL,		/* use default error handler */
     70 	NULL,		/* do not have a start functio */
     71 	NULL,		/* have no async handler */
     72 	NULL,		/* Use default done routine */
     73 };
     74 
     75 
     76 #ifdef DEBUG
     77 extern int sci_debug;
     78 #define QPRINTF(a) if (sci_debug > 1) printf a
     79 #else
     80 #define QPRINTF(a)
     81 #endif
     82 
     83 extern int sci_data_wait;
     84 
     85 int ivsdma_pseudo = 1;		/* 0=off, 1=on */
     86 
     87 struct cfattach ivsc_ca = {
     88 	sizeof(struct sci_softc), ivscmatch, ivscattach
     89 };
     90 
     91 struct cfdriver ivsc_cd = {
     92 	NULL, "ivsc", DV_DULL, NULL, 0
     93 };
     94 
     95 /*
     96  * if this is an IVS board
     97  */
     98 int
     99 ivscmatch(pdp, match, auxp)
    100 	struct device *pdp;
    101 	void *match, *auxp;
    102 {
    103 	struct zbus_args *zap;
    104 
    105 	zap = auxp;
    106 
    107 	/*
    108 	 * Check manufacturer and product id.
    109 	 */
    110 	if (zap->manid != 2112 ||	/* If manufacturer is IVS */
    111 	    (zap->prodid != 48 &&	/*   product = Trumpcard 500 */
    112 	    zap->prodid != 52 &&	/*   product = Trumpcard */
    113 	    zap->prodid != 243))	/*   product = Vector SCSI */
    114 		return(0);		/* didn't match */
    115 	return(1);
    116 }
    117 
    118 void
    119 ivscattach(pdp, dp, auxp)
    120 	struct device *pdp, *dp;
    121 	void *auxp;
    122 {
    123 	volatile u_char *rp;
    124 	struct sci_softc *sc;
    125 	struct zbus_args *zap;
    126 
    127 	printf("\n");
    128 
    129 	zap = auxp;
    130 
    131 	sc = (struct sci_softc *)dp;
    132 	rp = zap->va + 0x40;
    133 	sc->sci_data = rp;
    134 	sc->sci_odata = rp;
    135 	sc->sci_icmd = rp + 2;
    136 	sc->sci_mode = rp + 4;
    137 	sc->sci_tcmd = rp + 6;
    138 	sc->sci_bus_csr = rp + 8;
    139 	sc->sci_sel_enb = rp + 8;
    140 	sc->sci_csr = rp + 10;
    141 	sc->sci_dma_send = rp + 10;
    142 	sc->sci_idata = rp + 12;
    143 	sc->sci_trecv = rp + 12;
    144 	sc->sci_iack = rp + 14;
    145 	sc->sci_irecv = rp + 14;
    146 
    147 	if (ivsdma_pseudo == 1) {
    148 		sc->dma_xfer_in = ivsc_dma_xfer_in;
    149 		sc->dma_xfer_out = ivsc_dma_xfer_out;
    150 	}
    151 
    152 	sc->sc_isr.isr_intr = ivsc_intr;
    153 	sc->sc_isr.isr_arg = sc;
    154 	sc->sc_isr.isr_ipl = 2;
    155 	add_isr(&sc->sc_isr);
    156 
    157 	scireset(sc);
    158 
    159 	sc->sc_link.adapter_softc = sc;
    160 	sc->sc_link.adapter_target = 7;
    161 	sc->sc_link.adapter = &ivsc_scsiswitch;
    162 	sc->sc_link.device = &ivsc_scsidev;
    163 	sc->sc_link.openings = 1;
    164 	TAILQ_INIT(&sc->sc_xslist);
    165 
    166 	/*
    167 	 * attach all scsi units on us
    168 	 */
    169 	config_found(dp, &sc->sc_link, ivscprint);
    170 }
    171 
    172 /*
    173  * print diag if pnp is NULL else just extra
    174  */
    175 int
    176 ivscprint(auxp, pnp)
    177 	void *auxp;
    178 	char *pnp;
    179 {
    180 	if (pnp == NULL)
    181 		return(UNCONF);
    182 	return(QUIET);
    183 }
    184 
    185 int
    186 ivsc_dma_xfer_in (dev, len, buf, phase)
    187 	struct sci_softc *dev;
    188 	int len;
    189 	register u_char *buf;
    190 	int phase;
    191 {
    192 	int wait = sci_data_wait;
    193 	volatile register u_char *sci_dma = dev->sci_idata + 0x20;
    194 	volatile register u_char *sci_csr = dev->sci_csr;
    195 #ifdef DEBUG
    196 	u_char *obp = buf;
    197 #endif
    198 
    199 	QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    200 
    201 	*dev->sci_tcmd = phase;
    202 	*dev->sci_mode |= SCI_MODE_DMA;
    203 	*dev->sci_irecv = 0;
    204 
    205 	while (len >= 128) {
    206 		wait = sci_data_wait;
    207 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    208 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    209 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    210 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    211 			  || --wait < 0) {
    212 #ifdef DEBUG
    213 				if (sci_debug)
    214 					printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
    215 					len, *dev->sci_bus_csr, wait);
    216 #endif
    217 				*dev->sci_mode &= ~SCI_MODE_DMA;
    218 				return 0;
    219 			}
    220 		}
    221 
    222 #define	R1	(*buf++ = *sci_dma)
    223 		R1; R1; R1; R1; R1; R1; R1; R1;
    224 		R1; R1; R1; R1; R1; R1; R1; R1;
    225 		R1; R1; R1; R1; R1; R1; R1; R1;
    226 		R1; R1; R1; R1; R1; R1; R1; R1;
    227 		R1; R1; R1; R1; R1; R1; R1; R1;
    228 		R1; R1; R1; R1; R1; R1; R1; R1;
    229 		R1; R1; R1; R1; R1; R1; R1; R1;
    230 		R1; R1; R1; R1; R1; R1; R1; R1;
    231 		R1; R1; R1; R1; R1; R1; R1; R1;
    232 		R1; R1; R1; R1; R1; R1; R1; R1;
    233 		R1; R1; R1; R1; R1; R1; R1; R1;
    234 		R1; R1; R1; R1; R1; R1; R1; R1;
    235 		R1; R1; R1; R1; R1; R1; R1; R1;
    236 		R1; R1; R1; R1; R1; R1; R1; R1;
    237 		R1; R1; R1; R1; R1; R1; R1; R1;
    238 		R1; R1; R1; R1; R1; R1; R1; R1;
    239 		len -= 128;
    240 	}
    241 
    242   	while (len > 0) {
    243 		wait = sci_data_wait;
    244 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    245 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    246 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    247 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    248 			  || --wait < 0) {
    249 #ifdef DEBUG
    250 				if (sci_debug)
    251 					printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
    252 					len, *dev->sci_bus_csr, wait);
    253 #endif
    254 				*dev->sci_mode &= ~SCI_MODE_DMA;
    255 				return 0;
    256 			}
    257 		}
    258 
    259 		*buf++ = *sci_dma;
    260 		len--;
    261 	}
    262 
    263 	QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    264 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    265 	  obp[6], obp[7], obp[8], obp[9]));
    266 
    267 	*dev->sci_mode &= ~SCI_MODE_DMA;
    268 	return 0;
    269 }
    270 
    271 int
    272 ivsc_dma_xfer_out (dev, len, buf, phase)
    273 	struct sci_softc *dev;
    274 	int len;
    275 	register u_char *buf;
    276 	int phase;
    277 {
    278 	int wait = sci_data_wait;
    279 	volatile register u_char *sci_dma = dev->sci_data + 0x20;
    280 	volatile register u_char *sci_csr = dev->sci_csr;
    281 
    282 	QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    283 
    284 	QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    285   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    286 	 buf[6], buf[7], buf[8], buf[9]));
    287 
    288 	*dev->sci_tcmd = phase;
    289 	*dev->sci_mode |= SCI_MODE_DMA;
    290 	*dev->sci_icmd |= SCI_ICMD_DATA;
    291 	*dev->sci_dma_send = 0;
    292 	while (len > 0) {
    293 		wait = sci_data_wait;
    294 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    295 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    296 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    297 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    298 			  || --wait < 0) {
    299 #ifdef DEBUG
    300 				if (sci_debug)
    301 					printf("ivsc_dma_out fail: l%d i%x w%d\n",
    302 					len, *dev->sci_bus_csr, wait);
    303 #endif
    304 				*dev->sci_mode &= ~SCI_MODE_DMA;
    305 				return 0;
    306 			}
    307 		}
    308 
    309 		*sci_dma = *buf++;
    310 		len--;
    311 	}
    312 
    313 	wait = sci_data_wait;
    314 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    315 	  SCI_CSR_PHASE_MATCH && --wait);
    316 
    317 
    318 	*dev->sci_mode &= ~SCI_MODE_DMA;
    319 	return 0;
    320 }
    321 
    322 int
    323 ivsc_intr(arg)
    324 	void *arg;
    325 {
    326 	struct sci_softc *dev = arg;
    327 	u_char stat;
    328 
    329 	if ((*dev->sci_csr & SCI_CSR_INT) == 0)
    330 		return(0);
    331 	stat = *dev->sci_iack;
    332 	/* XXXX is: something is missing here, at least a: */
    333 	return(1);
    334 }
    335