ivsc.c revision 1.20
1 /* $NetBSD: ivsc.c,v 1.20 1996/12/10 21:27:25 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 #include <amiga/dev/scireg.h> 48 #include <amiga/dev/scivar.h> 49 #include <amiga/dev/zbusvar.h> 50 51 void ivscattach __P((struct device *, struct device *, void *)); 52 int ivscmatch __P((struct device *, void *, void *)); 53 54 int ivsc_intr __P((void *)); 55 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 56 register u_char *buf, int phase)); 57 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 58 register u_char *buf, int phase)); 59 60 struct scsi_adapter ivsc_scsiswitch = { 61 sci_scsicmd, 62 sci_minphys, 63 0, /* no lun support */ 64 0, /* no lun support */ 65 }; 66 67 struct scsi_device ivsc_scsidev = { 68 NULL, /* use default error handler */ 69 NULL, /* do not have a start functio */ 70 NULL, /* have no async handler */ 71 NULL, /* Use default done routine */ 72 }; 73 74 75 #ifdef DEBUG 76 extern int sci_debug; 77 #define QPRINTF(a) if (sci_debug > 1) printf a 78 #else 79 #define QPRINTF(a) 80 #endif 81 82 extern int sci_data_wait; 83 84 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 85 86 struct cfattach ivsc_ca = { 87 sizeof(struct sci_softc), ivscmatch, ivscattach 88 }; 89 90 struct cfdriver ivsc_cd = { 91 NULL, "ivsc", DV_DULL, NULL, 0 92 }; 93 94 /* 95 * if this is an IVS board 96 */ 97 int 98 ivscmatch(pdp, match, auxp) 99 struct device *pdp; 100 void *match, *auxp; 101 { 102 struct zbus_args *zap; 103 104 zap = auxp; 105 106 /* 107 * Check manufacturer and product id. 108 */ 109 if (zap->manid != 2112 || /* If manufacturer is IVS */ 110 (zap->prodid != 48 && /* product = Trumpcard 500 */ 111 zap->prodid != 52 && /* product = Trumpcard */ 112 zap->prodid != 243)) /* product = Vector SCSI */ 113 return(0); /* didn't match */ 114 return(1); 115 } 116 117 void 118 ivscattach(pdp, dp, auxp) 119 struct device *pdp, *dp; 120 void *auxp; 121 { 122 volatile u_char *rp; 123 struct sci_softc *sc; 124 struct zbus_args *zap; 125 126 printf("\n"); 127 128 zap = auxp; 129 130 sc = (struct sci_softc *)dp; 131 rp = zap->va + 0x40; 132 sc->sci_data = rp; 133 sc->sci_odata = rp; 134 sc->sci_icmd = rp + 2; 135 sc->sci_mode = rp + 4; 136 sc->sci_tcmd = rp + 6; 137 sc->sci_bus_csr = rp + 8; 138 sc->sci_sel_enb = rp + 8; 139 sc->sci_csr = rp + 10; 140 sc->sci_dma_send = rp + 10; 141 sc->sci_idata = rp + 12; 142 sc->sci_trecv = rp + 12; 143 sc->sci_iack = rp + 14; 144 sc->sci_irecv = rp + 14; 145 146 if (ivsdma_pseudo == 1) { 147 sc->dma_xfer_in = ivsc_dma_xfer_in; 148 sc->dma_xfer_out = ivsc_dma_xfer_out; 149 } 150 151 sc->sc_isr.isr_intr = ivsc_intr; 152 sc->sc_isr.isr_arg = sc; 153 sc->sc_isr.isr_ipl = 2; 154 add_isr(&sc->sc_isr); 155 156 scireset(sc); 157 158 sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE; 159 sc->sc_link.adapter_softc = sc; 160 sc->sc_link.adapter_target = 7; 161 sc->sc_link.adapter = &ivsc_scsiswitch; 162 sc->sc_link.device = &ivsc_scsidev; 163 sc->sc_link.openings = 1; 164 sc->sc_link.max_target = 7; 165 TAILQ_INIT(&sc->sc_xslist); 166 167 /* 168 * attach all scsi units on us 169 */ 170 config_found(dp, &sc->sc_link, scsiprint); 171 } 172 173 int 174 ivsc_dma_xfer_in (dev, len, buf, phase) 175 struct sci_softc *dev; 176 int len; 177 register u_char *buf; 178 int phase; 179 { 180 int wait = sci_data_wait; 181 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 182 volatile register u_char *sci_csr = dev->sci_csr; 183 #ifdef DEBUG 184 u_char *obp = buf; 185 #endif 186 187 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 188 189 *dev->sci_tcmd = phase; 190 *dev->sci_mode |= SCI_MODE_DMA; 191 *dev->sci_irecv = 0; 192 193 while (len >= 128) { 194 wait = sci_data_wait; 195 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 196 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 197 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 198 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 199 || --wait < 0) { 200 #ifdef DEBUG 201 if (sci_debug) 202 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 203 len, *dev->sci_bus_csr, wait); 204 #endif 205 *dev->sci_mode &= ~SCI_MODE_DMA; 206 return 0; 207 } 208 } 209 210 #define R1 (*buf++ = *sci_dma) 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 len -= 128; 228 } 229 230 while (len > 0) { 231 wait = sci_data_wait; 232 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 233 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 234 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 235 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 236 || --wait < 0) { 237 #ifdef DEBUG 238 if (sci_debug) 239 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 240 len, *dev->sci_bus_csr, wait); 241 #endif 242 *dev->sci_mode &= ~SCI_MODE_DMA; 243 return 0; 244 } 245 } 246 247 *buf++ = *sci_dma; 248 len--; 249 } 250 251 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 252 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 253 obp[6], obp[7], obp[8], obp[9])); 254 255 *dev->sci_mode &= ~SCI_MODE_DMA; 256 return 0; 257 } 258 259 int 260 ivsc_dma_xfer_out (dev, len, buf, phase) 261 struct sci_softc *dev; 262 int len; 263 register u_char *buf; 264 int phase; 265 { 266 int wait = sci_data_wait; 267 volatile register u_char *sci_dma = dev->sci_data + 0x20; 268 volatile register u_char *sci_csr = dev->sci_csr; 269 270 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 271 272 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 273 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 274 buf[6], buf[7], buf[8], buf[9])); 275 276 *dev->sci_tcmd = phase; 277 *dev->sci_mode |= SCI_MODE_DMA; 278 *dev->sci_icmd |= SCI_ICMD_DATA; 279 *dev->sci_dma_send = 0; 280 while (len > 0) { 281 wait = sci_data_wait; 282 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 283 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 284 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 285 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 286 || --wait < 0) { 287 #ifdef DEBUG 288 if (sci_debug) 289 printf("ivsc_dma_out fail: l%d i%x w%d\n", 290 len, *dev->sci_bus_csr, wait); 291 #endif 292 *dev->sci_mode &= ~SCI_MODE_DMA; 293 return 0; 294 } 295 } 296 297 *sci_dma = *buf++; 298 len--; 299 } 300 301 wait = sci_data_wait; 302 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 303 SCI_CSR_PHASE_MATCH && --wait); 304 305 306 *dev->sci_mode &= ~SCI_MODE_DMA; 307 return 0; 308 } 309 310 int 311 ivsc_intr(arg) 312 void *arg; 313 { 314 struct sci_softc *dev = arg; 315 u_char stat; 316 317 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 318 return(0); 319 stat = *dev->sci_iack; 320 /* XXXX is: something is missing here, at least a: */ 321 return(1); 322 } 323
Indexes created Wed Sep 24 02:09:48 GMT 2025