ivsc.c revision 1.21
1 /* $NetBSD: ivsc.c,v 1.21 1996/12/23 09:10:21 veego Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 #include <amiga/dev/scireg.h> 48 #include <amiga/dev/scivar.h> 49 #include <amiga/dev/zbusvar.h> 50 51 void ivscattach __P((struct device *, struct device *, void *)); 52 int ivscmatch __P((struct device *, struct cfdata *, void *)); 53 54 int ivsc_intr __P((void *)); 55 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 56 register u_char *buf, int phase)); 57 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 58 register u_char *buf, int phase)); 59 60 struct scsi_adapter ivsc_scsiswitch = { 61 sci_scsicmd, 62 sci_minphys, 63 0, /* no lun support */ 64 0, /* no lun support */ 65 }; 66 67 struct scsi_device ivsc_scsidev = { 68 NULL, /* use default error handler */ 69 NULL, /* do not have a start functio */ 70 NULL, /* have no async handler */ 71 NULL, /* Use default done routine */ 72 }; 73 74 75 #ifdef DEBUG 76 extern int sci_debug; 77 #define QPRINTF(a) if (sci_debug > 1) printf a 78 #else 79 #define QPRINTF(a) 80 #endif 81 82 extern int sci_data_wait; 83 84 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 85 86 struct cfattach ivsc_ca = { 87 sizeof(struct sci_softc), ivscmatch, ivscattach 88 }; 89 90 struct cfdriver ivsc_cd = { 91 NULL, "ivsc", DV_DULL, NULL, 0 92 }; 93 94 /* 95 * if this is an IVS board 96 */ 97 int 98 ivscmatch(pdp, cfp, auxp) 99 struct device *pdp; 100 struct cfdata *cfp; 101 void *auxp; 102 { 103 struct zbus_args *zap; 104 105 zap = auxp; 106 107 /* 108 * Check manufacturer and product id. 109 */ 110 if (zap->manid != 2112 || /* If manufacturer is IVS */ 111 (zap->prodid != 48 && /* product = Trumpcard 500 */ 112 zap->prodid != 52 && /* product = Trumpcard */ 113 zap->prodid != 243)) /* product = Vector SCSI */ 114 return(0); /* didn't match */ 115 return(1); 116 } 117 118 void 119 ivscattach(pdp, dp, auxp) 120 struct device *pdp, *dp; 121 void *auxp; 122 { 123 volatile u_char *rp; 124 struct sci_softc *sc; 125 struct zbus_args *zap; 126 127 printf("\n"); 128 129 zap = auxp; 130 131 sc = (struct sci_softc *)dp; 132 rp = zap->va + 0x40; 133 sc->sci_data = rp; 134 sc->sci_odata = rp; 135 sc->sci_icmd = rp + 2; 136 sc->sci_mode = rp + 4; 137 sc->sci_tcmd = rp + 6; 138 sc->sci_bus_csr = rp + 8; 139 sc->sci_sel_enb = rp + 8; 140 sc->sci_csr = rp + 10; 141 sc->sci_dma_send = rp + 10; 142 sc->sci_idata = rp + 12; 143 sc->sci_trecv = rp + 12; 144 sc->sci_iack = rp + 14; 145 sc->sci_irecv = rp + 14; 146 147 if (ivsdma_pseudo == 1) { 148 sc->dma_xfer_in = ivsc_dma_xfer_in; 149 sc->dma_xfer_out = ivsc_dma_xfer_out; 150 } 151 152 sc->sc_isr.isr_intr = ivsc_intr; 153 sc->sc_isr.isr_arg = sc; 154 sc->sc_isr.isr_ipl = 2; 155 add_isr(&sc->sc_isr); 156 157 scireset(sc); 158 159 sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE; 160 sc->sc_link.adapter_softc = sc; 161 sc->sc_link.adapter_target = 7; 162 sc->sc_link.adapter = &ivsc_scsiswitch; 163 sc->sc_link.device = &ivsc_scsidev; 164 sc->sc_link.openings = 1; 165 sc->sc_link.max_target = 7; 166 TAILQ_INIT(&sc->sc_xslist); 167 168 /* 169 * attach all scsi units on us 170 */ 171 config_found(dp, &sc->sc_link, scsiprint); 172 } 173 174 int 175 ivsc_dma_xfer_in (dev, len, buf, phase) 176 struct sci_softc *dev; 177 int len; 178 register u_char *buf; 179 int phase; 180 { 181 int wait = sci_data_wait; 182 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 183 volatile register u_char *sci_csr = dev->sci_csr; 184 #ifdef DEBUG 185 u_char *obp = buf; 186 #endif 187 188 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 189 190 *dev->sci_tcmd = phase; 191 *dev->sci_mode |= SCI_MODE_DMA; 192 *dev->sci_irecv = 0; 193 194 while (len >= 128) { 195 wait = sci_data_wait; 196 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 197 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 198 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 199 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 200 || --wait < 0) { 201 #ifdef DEBUG 202 if (sci_debug) 203 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 204 len, *dev->sci_bus_csr, wait); 205 #endif 206 *dev->sci_mode &= ~SCI_MODE_DMA; 207 return 0; 208 } 209 } 210 211 #define R1 (*buf++ = *sci_dma) 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 R1; R1; R1; R1; R1; R1; R1; R1; 228 len -= 128; 229 } 230 231 while (len > 0) { 232 wait = sci_data_wait; 233 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 234 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 235 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 236 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 237 || --wait < 0) { 238 #ifdef DEBUG 239 if (sci_debug) 240 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 241 len, *dev->sci_bus_csr, wait); 242 #endif 243 *dev->sci_mode &= ~SCI_MODE_DMA; 244 return 0; 245 } 246 } 247 248 *buf++ = *sci_dma; 249 len--; 250 } 251 252 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 253 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 254 obp[6], obp[7], obp[8], obp[9])); 255 256 *dev->sci_mode &= ~SCI_MODE_DMA; 257 return 0; 258 } 259 260 int 261 ivsc_dma_xfer_out (dev, len, buf, phase) 262 struct sci_softc *dev; 263 int len; 264 register u_char *buf; 265 int phase; 266 { 267 int wait = sci_data_wait; 268 volatile register u_char *sci_dma = dev->sci_data + 0x20; 269 volatile register u_char *sci_csr = dev->sci_csr; 270 271 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 272 273 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 274 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 275 buf[6], buf[7], buf[8], buf[9])); 276 277 *dev->sci_tcmd = phase; 278 *dev->sci_mode |= SCI_MODE_DMA; 279 *dev->sci_icmd |= SCI_ICMD_DATA; 280 *dev->sci_dma_send = 0; 281 while (len > 0) { 282 wait = sci_data_wait; 283 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 284 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 285 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 286 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 287 || --wait < 0) { 288 #ifdef DEBUG 289 if (sci_debug) 290 printf("ivsc_dma_out fail: l%d i%x w%d\n", 291 len, *dev->sci_bus_csr, wait); 292 #endif 293 *dev->sci_mode &= ~SCI_MODE_DMA; 294 return 0; 295 } 296 } 297 298 *sci_dma = *buf++; 299 len--; 300 } 301 302 wait = sci_data_wait; 303 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 304 SCI_CSR_PHASE_MATCH && --wait); 305 306 307 *dev->sci_mode &= ~SCI_MODE_DMA; 308 return 0; 309 } 310 311 int 312 ivsc_intr(arg) 313 void *arg; 314 { 315 struct sci_softc *dev = arg; 316 u_char stat; 317 318 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 319 return(0); 320 stat = *dev->sci_iack; 321 /* XXXX is: something is missing here, at least a: */ 322 return(1); 323 } 324
Indexes created Mon Sep 22 21:09:42 GMT 2025