ivsc.c revision 1.26
1 /* $NetBSD: ivsc.c,v 1.26 1998/12/05 19:43:36 mjacob Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/scireg.h> 49 #include <amiga/dev/scivar.h> 50 #include <amiga/dev/zbusvar.h> 51 52 void ivscattach __P((struct device *, struct device *, void *)); 53 int ivscmatch __P((struct device *, struct cfdata *, void *)); 54 55 int ivsc_intr __P((void *)); 56 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 59 register u_char *buf, int phase)); 60 61 struct scsipi_device ivsc_scsidev = { 62 NULL, /* use default error handler */ 63 NULL, /* do not have a start functio */ 64 NULL, /* have no async handler */ 65 NULL, /* Use default done routine */ 66 }; 67 68 69 #ifdef DEBUG 70 extern int sci_debug; 71 #define QPRINTF(a) if (sci_debug > 1) printf a 72 #else 73 #define QPRINTF(a) 74 #endif 75 76 extern int sci_data_wait; 77 78 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 79 80 struct cfattach ivsc_ca = { 81 sizeof(struct sci_softc), ivscmatch, ivscattach 82 }; 83 84 /* 85 * if this is an IVS board 86 */ 87 int 88 ivscmatch(pdp, cfp, auxp) 89 struct device *pdp; 90 struct cfdata *cfp; 91 void *auxp; 92 { 93 struct zbus_args *zap; 94 95 zap = auxp; 96 97 /* 98 * Check manufacturer and product id. 99 */ 100 if (zap->manid != 2112 || /* If manufacturer is IVS */ 101 (zap->prodid != 48 && /* product = Trumpcard 500 */ 102 zap->prodid != 52 && /* product = Trumpcard */ 103 zap->prodid != 243)) /* product = Vector SCSI */ 104 return(0); /* didn't match */ 105 return(1); 106 } 107 108 void 109 ivscattach(pdp, dp, auxp) 110 struct device *pdp, *dp; 111 void *auxp; 112 { 113 volatile u_char *rp; 114 struct sci_softc *sc; 115 struct zbus_args *zap; 116 117 printf("\n"); 118 119 zap = auxp; 120 121 sc = (struct sci_softc *)dp; 122 rp = zap->va + 0x40; 123 sc->sci_data = rp; 124 sc->sci_odata = rp; 125 sc->sci_icmd = rp + 2; 126 sc->sci_mode = rp + 4; 127 sc->sci_tcmd = rp + 6; 128 sc->sci_bus_csr = rp + 8; 129 sc->sci_sel_enb = rp + 8; 130 sc->sci_csr = rp + 10; 131 sc->sci_dma_send = rp + 10; 132 sc->sci_idata = rp + 12; 133 sc->sci_trecv = rp + 12; 134 sc->sci_iack = rp + 14; 135 sc->sci_irecv = rp + 14; 136 137 if (ivsdma_pseudo == 1) { 138 sc->dma_xfer_in = ivsc_dma_xfer_in; 139 sc->dma_xfer_out = ivsc_dma_xfer_out; 140 } 141 142 sc->sc_isr.isr_intr = ivsc_intr; 143 sc->sc_isr.isr_arg = sc; 144 sc->sc_isr.isr_ipl = 2; 145 add_isr(&sc->sc_isr); 146 147 scireset(sc); 148 149 sc->sc_adapter.scsipi_cmd = sci_scsicmd; 150 sc->sc_adapter.scsipi_minphys = sci_minphys; 151 152 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 153 sc->sc_link.adapter_softc = sc; 154 sc->sc_link.scsipi_scsi.adapter_target = 7; 155 sc->sc_link.adapter = &sc->sc_adapter; 156 sc->sc_link.device = &ivsc_scsidev; 157 sc->sc_link.openings = 1; 158 sc->sc_link.scsipi_scsi.max_target = 7; 159 sc->sc_link.scsipi_scsi.max_lun = 7; 160 sc->sc_link.type = BUS_SCSI; 161 TAILQ_INIT(&sc->sc_xslist); 162 163 /* 164 * attach all scsi units on us 165 */ 166 config_found(dp, &sc->sc_link, scsiprint); 167 } 168 169 int 170 ivsc_dma_xfer_in (dev, len, buf, phase) 171 struct sci_softc *dev; 172 int len; 173 register u_char *buf; 174 int phase; 175 { 176 int wait = sci_data_wait; 177 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 178 volatile register u_char *sci_csr = dev->sci_csr; 179 #ifdef DEBUG 180 u_char *obp = buf; 181 #endif 182 183 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 184 185 *dev->sci_tcmd = phase; 186 *dev->sci_mode |= SCI_MODE_DMA; 187 *dev->sci_irecv = 0; 188 189 while (len >= 128) { 190 wait = sci_data_wait; 191 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 192 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 193 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 194 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 195 || --wait < 0) { 196 #ifdef DEBUG 197 if (sci_debug) 198 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 199 len, *dev->sci_bus_csr, wait); 200 #endif 201 *dev->sci_mode &= ~SCI_MODE_DMA; 202 return 0; 203 } 204 } 205 206 #define R1 (*buf++ = *sci_dma) 207 R1; R1; R1; R1; R1; R1; R1; R1; 208 R1; R1; R1; R1; R1; R1; R1; R1; 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 len -= 128; 224 } 225 226 while (len > 0) { 227 wait = sci_data_wait; 228 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 229 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 230 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 231 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 232 || --wait < 0) { 233 #ifdef DEBUG 234 if (sci_debug) 235 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 236 len, *dev->sci_bus_csr, wait); 237 #endif 238 *dev->sci_mode &= ~SCI_MODE_DMA; 239 return 0; 240 } 241 } 242 243 *buf++ = *sci_dma; 244 len--; 245 } 246 247 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 248 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 249 obp[6], obp[7], obp[8], obp[9])); 250 251 *dev->sci_mode &= ~SCI_MODE_DMA; 252 return 0; 253 } 254 255 int 256 ivsc_dma_xfer_out (dev, len, buf, phase) 257 struct sci_softc *dev; 258 int len; 259 register u_char *buf; 260 int phase; 261 { 262 int wait = sci_data_wait; 263 volatile register u_char *sci_dma = dev->sci_data + 0x20; 264 volatile register u_char *sci_csr = dev->sci_csr; 265 266 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 267 268 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 269 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 270 buf[6], buf[7], buf[8], buf[9])); 271 272 *dev->sci_tcmd = phase; 273 *dev->sci_mode |= SCI_MODE_DMA; 274 *dev->sci_icmd |= SCI_ICMD_DATA; 275 *dev->sci_dma_send = 0; 276 while (len > 0) { 277 wait = sci_data_wait; 278 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 279 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 280 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 281 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 282 || --wait < 0) { 283 #ifdef DEBUG 284 if (sci_debug) 285 printf("ivsc_dma_out fail: l%d i%x w%d\n", 286 len, *dev->sci_bus_csr, wait); 287 #endif 288 *dev->sci_mode &= ~SCI_MODE_DMA; 289 return 0; 290 } 291 } 292 293 *sci_dma = *buf++; 294 len--; 295 } 296 297 wait = sci_data_wait; 298 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 299 SCI_CSR_PHASE_MATCH && --wait); 300 301 302 *dev->sci_mode &= ~SCI_MODE_DMA; 303 return 0; 304 } 305 306 int 307 ivsc_intr(arg) 308 void *arg; 309 { 310 struct sci_softc *dev = arg; 311 u_char stat; 312 313 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 314 return(0); 315 stat = *dev->sci_iack; 316 /* XXXX is: something is missing here, at least a: */ 317 return(1); 318 } 319
Indexes created Tue Sep 23 14:10:03 GMT 2025