ivsc.c revision 1.28
1 /* $NetBSD: ivsc.c,v 1.28 2001/04/25 17:53:07 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/scireg.h> 49 #include <amiga/dev/scivar.h> 50 #include <amiga/dev/zbusvar.h> 51 52 void ivscattach __P((struct device *, struct device *, void *)); 53 int ivscmatch __P((struct device *, struct cfdata *, void *)); 54 55 int ivsc_intr __P((void *)); 56 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 59 register u_char *buf, int phase)); 60 61 62 #ifdef DEBUG 63 extern int sci_debug; 64 #define QPRINTF(a) if (sci_debug > 1) printf a 65 #else 66 #define QPRINTF(a) 67 #endif 68 69 extern int sci_data_wait; 70 71 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 72 73 struct cfattach ivsc_ca = { 74 sizeof(struct sci_softc), ivscmatch, ivscattach 75 }; 76 77 /* 78 * if this is an IVS board 79 */ 80 int 81 ivscmatch(pdp, cfp, auxp) 82 struct device *pdp; 83 struct cfdata *cfp; 84 void *auxp; 85 { 86 struct zbus_args *zap; 87 88 zap = auxp; 89 90 /* 91 * Check manufacturer and product id. 92 */ 93 if (zap->manid != 2112 || /* If manufacturer is IVS */ 94 (zap->prodid != 48 && /* product = Trumpcard 500 */ 95 zap->prodid != 52 && /* product = Trumpcard */ 96 zap->prodid != 243)) /* product = Vector SCSI */ 97 return(0); /* didn't match */ 98 return(1); 99 } 100 101 void 102 ivscattach(pdp, dp, auxp) 103 struct device *pdp, *dp; 104 void *auxp; 105 { 106 volatile u_char *rp; 107 struct sci_softc *sc = (struct sci_softc *)dp; 108 struct zbus_args *zap; 109 struct scsipi_adapter *adapt = &sc->sc_adapter; 110 struct scsipi_channel *chan = &sc->sc_channel; 111 112 printf("\n"); 113 114 zap = auxp; 115 116 rp = (u_char *)zap->va + 0x40; 117 sc->sci_data = rp; 118 sc->sci_odata = rp; 119 sc->sci_icmd = rp + 2; 120 sc->sci_mode = rp + 4; 121 sc->sci_tcmd = rp + 6; 122 sc->sci_bus_csr = rp + 8; 123 sc->sci_sel_enb = rp + 8; 124 sc->sci_csr = rp + 10; 125 sc->sci_dma_send = rp + 10; 126 sc->sci_idata = rp + 12; 127 sc->sci_trecv = rp + 12; 128 sc->sci_iack = rp + 14; 129 sc->sci_irecv = rp + 14; 130 131 if (ivsdma_pseudo == 1) { 132 sc->dma_xfer_in = ivsc_dma_xfer_in; 133 sc->dma_xfer_out = ivsc_dma_xfer_out; 134 } 135 136 sc->sc_isr.isr_intr = ivsc_intr; 137 sc->sc_isr.isr_arg = sc; 138 sc->sc_isr.isr_ipl = 2; 139 add_isr(&sc->sc_isr); 140 141 scireset(sc); 142 143 /* 144 * Fill in the scsipi_adapter. 145 */ 146 memset(adapt, 0, sizeof(*adapt)); 147 adapt->adapt_dev = &sc->sc_dev; 148 adapt->adapt_nchannels = 1; 149 adapt->adapt_openings = 7; 150 adapt->adapt_max_periph = 1; 151 adapt->adapt_request = sci_scsipi_request; 152 adapt->adapt_minphys = sci_minphys; 153 154 /* 155 * Fill in the scsipi_channel. 156 */ 157 memset(chan, 0, sizeof(*chan)); 158 chan->chan_adapter = adapt; 159 chan->chan_bustype = &scsi_bustype; 160 chan->chan_channel = 0; 161 chan->chan_ntargets = 8; 162 chan->chan_nluns = 8; 163 chan->chan_id = 7; 164 165 /* 166 * attach all scsi units on us 167 */ 168 config_found(dp, chan, scsiprint); 169 } 170 171 int 172 ivsc_dma_xfer_in (dev, len, buf, phase) 173 struct sci_softc *dev; 174 int len; 175 register u_char *buf; 176 int phase; 177 { 178 int wait = sci_data_wait; 179 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 180 volatile register u_char *sci_csr = dev->sci_csr; 181 #ifdef DEBUG 182 u_char *obp = buf; 183 #endif 184 185 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 186 187 *dev->sci_tcmd = phase; 188 *dev->sci_mode |= SCI_MODE_DMA; 189 *dev->sci_irecv = 0; 190 191 while (len >= 128) { 192 wait = sci_data_wait; 193 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 194 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 195 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 196 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 197 || --wait < 0) { 198 #ifdef DEBUG 199 if (sci_debug) 200 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 201 len, *dev->sci_bus_csr, wait); 202 #endif 203 *dev->sci_mode &= ~SCI_MODE_DMA; 204 return 0; 205 } 206 } 207 208 #define R1 (*buf++ = *sci_dma) 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 len -= 128; 226 } 227 228 while (len > 0) { 229 wait = sci_data_wait; 230 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 231 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 232 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 233 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 234 || --wait < 0) { 235 #ifdef DEBUG 236 if (sci_debug) 237 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 238 len, *dev->sci_bus_csr, wait); 239 #endif 240 *dev->sci_mode &= ~SCI_MODE_DMA; 241 return 0; 242 } 243 } 244 245 *buf++ = *sci_dma; 246 len--; 247 } 248 249 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 250 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 251 obp[6], obp[7], obp[8], obp[9])); 252 253 *dev->sci_mode &= ~SCI_MODE_DMA; 254 return 0; 255 } 256 257 int 258 ivsc_dma_xfer_out (dev, len, buf, phase) 259 struct sci_softc *dev; 260 int len; 261 register u_char *buf; 262 int phase; 263 { 264 int wait = sci_data_wait; 265 volatile register u_char *sci_dma = dev->sci_data + 0x20; 266 volatile register u_char *sci_csr = dev->sci_csr; 267 268 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 269 270 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 271 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 272 buf[6], buf[7], buf[8], buf[9])); 273 274 *dev->sci_tcmd = phase; 275 *dev->sci_mode |= SCI_MODE_DMA; 276 *dev->sci_icmd |= SCI_ICMD_DATA; 277 *dev->sci_dma_send = 0; 278 while (len > 0) { 279 wait = sci_data_wait; 280 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 281 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 282 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 283 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 284 || --wait < 0) { 285 #ifdef DEBUG 286 if (sci_debug) 287 printf("ivsc_dma_out fail: l%d i%x w%d\n", 288 len, *dev->sci_bus_csr, wait); 289 #endif 290 *dev->sci_mode &= ~SCI_MODE_DMA; 291 return 0; 292 } 293 } 294 295 *sci_dma = *buf++; 296 len--; 297 } 298 299 wait = sci_data_wait; 300 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 301 SCI_CSR_PHASE_MATCH && --wait); 302 303 304 *dev->sci_mode &= ~SCI_MODE_DMA; 305 return 0; 306 } 307 308 int 309 ivsc_intr(arg) 310 void *arg; 311 { 312 struct sci_softc *dev = arg; 313 u_char stat; 314 315 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 316 return(0); 317 stat = *dev->sci_iack; 318 /* XXXX is: something is missing here, at least a: */ 319 return(1); 320 } 321
Indexes created Wed Sep 24 14:09:57 GMT 2025