ivsc.c revision 1.29
1 /* $NetBSD: ivsc.c,v 1.29 2002/01/26 13:40:58 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/scireg.h> 49 #include <amiga/dev/scivar.h> 50 #include <amiga/dev/zbusvar.h> 51 52 void ivscattach(struct device *, struct device *, void *); 53 int ivscmatch(struct device *, struct cfdata *, void *); 54 55 int ivsc_intr(void *); 56 int ivsc_dma_xfer_in(struct sci_softc *dev, int len, 57 register u_char *buf, int phase); 58 int ivsc_dma_xfer_out(struct sci_softc *dev, int len, 59 register u_char *buf, int phase); 60 61 62 #ifdef DEBUG 63 extern int sci_debug; 64 #define QPRINTF(a) if (sci_debug > 1) printf a 65 #else 66 #define QPRINTF(a) 67 #endif 68 69 extern int sci_data_wait; 70 71 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 72 73 struct cfattach ivsc_ca = { 74 sizeof(struct sci_softc), ivscmatch, ivscattach 75 }; 76 77 /* 78 * if this is an IVS board 79 */ 80 int 81 ivscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 82 { 83 struct zbus_args *zap; 84 85 zap = auxp; 86 87 /* 88 * Check manufacturer and product id. 89 */ 90 if (zap->manid != 2112 || /* If manufacturer is IVS */ 91 (zap->prodid != 48 && /* product = Trumpcard 500 */ 92 zap->prodid != 52 && /* product = Trumpcard */ 93 zap->prodid != 243)) /* product = Vector SCSI */ 94 return(0); /* didn't match */ 95 return(1); 96 } 97 98 void 99 ivscattach(struct device *pdp, struct device *dp, void *auxp) 100 { 101 volatile u_char *rp; 102 struct sci_softc *sc = (struct sci_softc *)dp; 103 struct zbus_args *zap; 104 struct scsipi_adapter *adapt = &sc->sc_adapter; 105 struct scsipi_channel *chan = &sc->sc_channel; 106 107 printf("\n"); 108 109 zap = auxp; 110 111 rp = (u_char *)zap->va + 0x40; 112 sc->sci_data = rp; 113 sc->sci_odata = rp; 114 sc->sci_icmd = rp + 2; 115 sc->sci_mode = rp + 4; 116 sc->sci_tcmd = rp + 6; 117 sc->sci_bus_csr = rp + 8; 118 sc->sci_sel_enb = rp + 8; 119 sc->sci_csr = rp + 10; 120 sc->sci_dma_send = rp + 10; 121 sc->sci_idata = rp + 12; 122 sc->sci_trecv = rp + 12; 123 sc->sci_iack = rp + 14; 124 sc->sci_irecv = rp + 14; 125 126 if (ivsdma_pseudo == 1) { 127 sc->dma_xfer_in = ivsc_dma_xfer_in; 128 sc->dma_xfer_out = ivsc_dma_xfer_out; 129 } 130 131 sc->sc_isr.isr_intr = ivsc_intr; 132 sc->sc_isr.isr_arg = sc; 133 sc->sc_isr.isr_ipl = 2; 134 add_isr(&sc->sc_isr); 135 136 scireset(sc); 137 138 /* 139 * Fill in the scsipi_adapter. 140 */ 141 memset(adapt, 0, sizeof(*adapt)); 142 adapt->adapt_dev = &sc->sc_dev; 143 adapt->adapt_nchannels = 1; 144 adapt->adapt_openings = 7; 145 adapt->adapt_max_periph = 1; 146 adapt->adapt_request = sci_scsipi_request; 147 adapt->adapt_minphys = sci_minphys; 148 149 /* 150 * Fill in the scsipi_channel. 151 */ 152 memset(chan, 0, sizeof(*chan)); 153 chan->chan_adapter = adapt; 154 chan->chan_bustype = &scsi_bustype; 155 chan->chan_channel = 0; 156 chan->chan_ntargets = 8; 157 chan->chan_nluns = 8; 158 chan->chan_id = 7; 159 160 /* 161 * attach all scsi units on us 162 */ 163 config_found(dp, chan, scsiprint); 164 } 165 166 int 167 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 168 int phase) 169 { 170 int wait = sci_data_wait; 171 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 172 volatile register u_char *sci_csr = dev->sci_csr; 173 #ifdef DEBUG 174 u_char *obp = buf; 175 #endif 176 177 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 178 179 *dev->sci_tcmd = phase; 180 *dev->sci_mode |= SCI_MODE_DMA; 181 *dev->sci_irecv = 0; 182 183 while (len >= 128) { 184 wait = sci_data_wait; 185 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 186 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 187 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 188 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 189 || --wait < 0) { 190 #ifdef DEBUG 191 if (sci_debug) 192 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 193 len, *dev->sci_bus_csr, wait); 194 #endif 195 *dev->sci_mode &= ~SCI_MODE_DMA; 196 return 0; 197 } 198 } 199 200 #define R1 (*buf++ = *sci_dma) 201 R1; R1; R1; R1; R1; R1; R1; R1; 202 R1; R1; R1; R1; R1; R1; R1; R1; 203 R1; R1; R1; R1; R1; R1; R1; R1; 204 R1; R1; R1; R1; R1; R1; R1; R1; 205 R1; R1; R1; R1; R1; R1; R1; R1; 206 R1; R1; R1; R1; R1; R1; R1; R1; 207 R1; R1; R1; R1; R1; R1; R1; R1; 208 R1; R1; R1; R1; R1; R1; R1; R1; 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 len -= 128; 218 } 219 220 while (len > 0) { 221 wait = sci_data_wait; 222 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 223 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 224 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 225 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 226 || --wait < 0) { 227 #ifdef DEBUG 228 if (sci_debug) 229 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 230 len, *dev->sci_bus_csr, wait); 231 #endif 232 *dev->sci_mode &= ~SCI_MODE_DMA; 233 return 0; 234 } 235 } 236 237 *buf++ = *sci_dma; 238 len--; 239 } 240 241 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 242 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 243 obp[6], obp[7], obp[8], obp[9])); 244 245 *dev->sci_mode &= ~SCI_MODE_DMA; 246 return 0; 247 } 248 249 int 250 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 251 int phase) 252 { 253 int wait = sci_data_wait; 254 volatile register u_char *sci_dma = dev->sci_data + 0x20; 255 volatile register u_char *sci_csr = dev->sci_csr; 256 257 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 258 259 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 260 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 261 buf[6], buf[7], buf[8], buf[9])); 262 263 *dev->sci_tcmd = phase; 264 *dev->sci_mode |= SCI_MODE_DMA; 265 *dev->sci_icmd |= SCI_ICMD_DATA; 266 *dev->sci_dma_send = 0; 267 while (len > 0) { 268 wait = sci_data_wait; 269 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 270 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 271 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 272 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 273 || --wait < 0) { 274 #ifdef DEBUG 275 if (sci_debug) 276 printf("ivsc_dma_out fail: l%d i%x w%d\n", 277 len, *dev->sci_bus_csr, wait); 278 #endif 279 *dev->sci_mode &= ~SCI_MODE_DMA; 280 return 0; 281 } 282 } 283 284 *sci_dma = *buf++; 285 len--; 286 } 287 288 wait = sci_data_wait; 289 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 290 SCI_CSR_PHASE_MATCH && --wait); 291 292 293 *dev->sci_mode &= ~SCI_MODE_DMA; 294 return 0; 295 } 296 297 int 298 ivsc_intr(void *arg) 299 { 300 struct sci_softc *dev = arg; 301 u_char stat; 302 303 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 304 return(0); 305 stat = *dev->sci_iack; 306 /* XXXX is: something is missing here, at least a: */ 307 return(1); 308 } 309
Indexes created Mon Sep 22 05:09:51 GMT 2025