ivsc.c revision 1.30
1 /* $NetBSD: ivsc.c,v 1.30 2002/01/28 09:57:00 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ivsc.c,v 1.30 2002/01/28 09:57:00 aymeric Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <dev/scsipi/scsi_all.h> 47 #include <dev/scsipi/scsipi_all.h> 48 #include <dev/scsipi/scsiconf.h> 49 #include <amiga/amiga/custom.h> 50 #include <amiga/amiga/device.h> 51 #include <amiga/amiga/isr.h> 52 #include <amiga/dev/scireg.h> 53 #include <amiga/dev/scivar.h> 54 #include <amiga/dev/zbusvar.h> 55 56 void ivscattach(struct device *, struct device *, void *); 57 int ivscmatch(struct device *, struct cfdata *, void *); 58 59 int ivsc_intr(void *); 60 int ivsc_dma_xfer_in(struct sci_softc *dev, int len, 61 register u_char *buf, int phase); 62 int ivsc_dma_xfer_out(struct sci_softc *dev, int len, 63 register u_char *buf, int phase); 64 65 66 #ifdef DEBUG 67 extern int sci_debug; 68 #define QPRINTF(a) if (sci_debug > 1) printf a 69 #else 70 #define QPRINTF(a) 71 #endif 72 73 extern int sci_data_wait; 74 75 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 76 77 struct cfattach ivsc_ca = { 78 sizeof(struct sci_softc), ivscmatch, ivscattach 79 }; 80 81 /* 82 * if this is an IVS board 83 */ 84 int 85 ivscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 86 { 87 struct zbus_args *zap; 88 89 zap = auxp; 90 91 /* 92 * Check manufacturer and product id. 93 */ 94 if (zap->manid != 2112 || /* If manufacturer is IVS */ 95 (zap->prodid != 48 && /* product = Trumpcard 500 */ 96 zap->prodid != 52 && /* product = Trumpcard */ 97 zap->prodid != 243)) /* product = Vector SCSI */ 98 return(0); /* didn't match */ 99 return(1); 100 } 101 102 void 103 ivscattach(struct device *pdp, struct device *dp, void *auxp) 104 { 105 volatile u_char *rp; 106 struct sci_softc *sc = (struct sci_softc *)dp; 107 struct zbus_args *zap; 108 struct scsipi_adapter *adapt = &sc->sc_adapter; 109 struct scsipi_channel *chan = &sc->sc_channel; 110 111 printf("\n"); 112 113 zap = auxp; 114 115 rp = (u_char *)zap->va + 0x40; 116 sc->sci_data = rp; 117 sc->sci_odata = rp; 118 sc->sci_icmd = rp + 2; 119 sc->sci_mode = rp + 4; 120 sc->sci_tcmd = rp + 6; 121 sc->sci_bus_csr = rp + 8; 122 sc->sci_sel_enb = rp + 8; 123 sc->sci_csr = rp + 10; 124 sc->sci_dma_send = rp + 10; 125 sc->sci_idata = rp + 12; 126 sc->sci_trecv = rp + 12; 127 sc->sci_iack = rp + 14; 128 sc->sci_irecv = rp + 14; 129 130 if (ivsdma_pseudo == 1) { 131 sc->dma_xfer_in = ivsc_dma_xfer_in; 132 sc->dma_xfer_out = ivsc_dma_xfer_out; 133 } 134 135 sc->sc_isr.isr_intr = ivsc_intr; 136 sc->sc_isr.isr_arg = sc; 137 sc->sc_isr.isr_ipl = 2; 138 add_isr(&sc->sc_isr); 139 140 scireset(sc); 141 142 /* 143 * Fill in the scsipi_adapter. 144 */ 145 memset(adapt, 0, sizeof(*adapt)); 146 adapt->adapt_dev = &sc->sc_dev; 147 adapt->adapt_nchannels = 1; 148 adapt->adapt_openings = 7; 149 adapt->adapt_max_periph = 1; 150 adapt->adapt_request = sci_scsipi_request; 151 adapt->adapt_minphys = sci_minphys; 152 153 /* 154 * Fill in the scsipi_channel. 155 */ 156 memset(chan, 0, sizeof(*chan)); 157 chan->chan_adapter = adapt; 158 chan->chan_bustype = &scsi_bustype; 159 chan->chan_channel = 0; 160 chan->chan_ntargets = 8; 161 chan->chan_nluns = 8; 162 chan->chan_id = 7; 163 164 /* 165 * attach all scsi units on us 166 */ 167 config_found(dp, chan, scsiprint); 168 } 169 170 int 171 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 172 int phase) 173 { 174 int wait = sci_data_wait; 175 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 176 volatile register u_char *sci_csr = dev->sci_csr; 177 #ifdef DEBUG 178 u_char *obp = buf; 179 #endif 180 181 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 182 183 *dev->sci_tcmd = phase; 184 *dev->sci_mode |= SCI_MODE_DMA; 185 *dev->sci_irecv = 0; 186 187 while (len >= 128) { 188 wait = sci_data_wait; 189 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 190 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 191 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 192 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 193 || --wait < 0) { 194 #ifdef DEBUG 195 if (sci_debug) 196 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 197 len, *dev->sci_bus_csr, wait); 198 #endif 199 *dev->sci_mode &= ~SCI_MODE_DMA; 200 return 0; 201 } 202 } 203 204 #define R1 (*buf++ = *sci_dma) 205 R1; R1; R1; R1; R1; R1; R1; R1; 206 R1; R1; R1; R1; R1; R1; R1; R1; 207 R1; R1; R1; R1; R1; R1; R1; R1; 208 R1; R1; R1; R1; R1; R1; R1; R1; 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 len -= 128; 222 } 223 224 while (len > 0) { 225 wait = sci_data_wait; 226 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 227 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 228 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 229 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 230 || --wait < 0) { 231 #ifdef DEBUG 232 if (sci_debug) 233 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 234 len, *dev->sci_bus_csr, wait); 235 #endif 236 *dev->sci_mode &= ~SCI_MODE_DMA; 237 return 0; 238 } 239 } 240 241 *buf++ = *sci_dma; 242 len--; 243 } 244 245 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 246 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 247 obp[6], obp[7], obp[8], obp[9])); 248 249 *dev->sci_mode &= ~SCI_MODE_DMA; 250 return 0; 251 } 252 253 int 254 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 255 int phase) 256 { 257 int wait = sci_data_wait; 258 volatile register u_char *sci_dma = dev->sci_data + 0x20; 259 volatile register u_char *sci_csr = dev->sci_csr; 260 261 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 262 263 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 264 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 265 buf[6], buf[7], buf[8], buf[9])); 266 267 *dev->sci_tcmd = phase; 268 *dev->sci_mode |= SCI_MODE_DMA; 269 *dev->sci_icmd |= SCI_ICMD_DATA; 270 *dev->sci_dma_send = 0; 271 while (len > 0) { 272 wait = sci_data_wait; 273 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 274 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 275 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 276 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 277 || --wait < 0) { 278 #ifdef DEBUG 279 if (sci_debug) 280 printf("ivsc_dma_out fail: l%d i%x w%d\n", 281 len, *dev->sci_bus_csr, wait); 282 #endif 283 *dev->sci_mode &= ~SCI_MODE_DMA; 284 return 0; 285 } 286 } 287 288 *sci_dma = *buf++; 289 len--; 290 } 291 292 wait = sci_data_wait; 293 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 294 SCI_CSR_PHASE_MATCH && --wait); 295 296 297 *dev->sci_mode &= ~SCI_MODE_DMA; 298 return 0; 299 } 300 301 int 302 ivsc_intr(void *arg) 303 { 304 struct sci_softc *dev = arg; 305 u_char stat; 306 307 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 308 return(0); 309 stat = *dev->sci_iack; 310 /* XXXX is: something is missing here, at least a: */ 311 return(1); 312 } 313
Indexes created Tue Sep 23 21:09:50 GMT 2025