ivsc.c revision 1.33
1 /* $NetBSD: ivsc.c,v 1.33 2003/08/07 16:26:42 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)ivsdma.c 32 */ 33 34 /* 35 * Copyright (c) 1994 Michael L. Hitch 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by the University of 48 * California, Berkeley and its contributors. 49 * 4. Neither the name of the University nor the names of its contributors 50 * may be used to endorse or promote products derived from this software 51 * without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * @(#)ivsdma.c 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ivsc.c,v 1.33 2003/08/07 16:26:42 agc Exp $"); 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <dev/scsipi/scsi_all.h> 76 #include <dev/scsipi/scsipi_all.h> 77 #include <dev/scsipi/scsiconf.h> 78 #include <amiga/amiga/custom.h> 79 #include <amiga/amiga/device.h> 80 #include <amiga/amiga/isr.h> 81 #include <amiga/dev/scireg.h> 82 #include <amiga/dev/scivar.h> 83 #include <amiga/dev/zbusvar.h> 84 85 void ivscattach(struct device *, struct device *, void *); 86 int ivscmatch(struct device *, struct cfdata *, void *); 87 88 int ivsc_intr(void *); 89 int ivsc_dma_xfer_in(struct sci_softc *dev, int len, 90 register u_char *buf, int phase); 91 int ivsc_dma_xfer_out(struct sci_softc *dev, int len, 92 register u_char *buf, int phase); 93 94 95 #ifdef DEBUG 96 extern int sci_debug; 97 #define QPRINTF(a) if (sci_debug > 1) printf a 98 #else 99 #define QPRINTF(a) 100 #endif 101 102 extern int sci_data_wait; 103 104 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 105 106 CFATTACH_DECL(ivsc, sizeof(struct sci_softc), 107 ivscmatch, ivscattach, NULL, NULL); 108 109 /* 110 * if this is an IVS board 111 */ 112 int 113 ivscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 114 { 115 struct zbus_args *zap; 116 117 zap = auxp; 118 119 /* 120 * Check manufacturer and product id. 121 */ 122 if (zap->manid != 2112 || /* If manufacturer is IVS */ 123 (zap->prodid != 48 && /* product = Trumpcard 500 */ 124 zap->prodid != 52 && /* product = Trumpcard */ 125 zap->prodid != 243)) /* product = Vector SCSI */ 126 return(0); /* didn't match */ 127 return(1); 128 } 129 130 void 131 ivscattach(struct device *pdp, struct device *dp, void *auxp) 132 { 133 volatile u_char *rp; 134 struct sci_softc *sc = (struct sci_softc *)dp; 135 struct zbus_args *zap; 136 struct scsipi_adapter *adapt = &sc->sc_adapter; 137 struct scsipi_channel *chan = &sc->sc_channel; 138 139 printf("\n"); 140 141 zap = auxp; 142 143 rp = (u_char *)zap->va + 0x40; 144 sc->sci_data = rp; 145 sc->sci_odata = rp; 146 sc->sci_icmd = rp + 2; 147 sc->sci_mode = rp + 4; 148 sc->sci_tcmd = rp + 6; 149 sc->sci_bus_csr = rp + 8; 150 sc->sci_sel_enb = rp + 8; 151 sc->sci_csr = rp + 10; 152 sc->sci_dma_send = rp + 10; 153 sc->sci_idata = rp + 12; 154 sc->sci_trecv = rp + 12; 155 sc->sci_iack = rp + 14; 156 sc->sci_irecv = rp + 14; 157 158 if (ivsdma_pseudo == 1) { 159 sc->dma_xfer_in = ivsc_dma_xfer_in; 160 sc->dma_xfer_out = ivsc_dma_xfer_out; 161 } 162 163 sc->sc_isr.isr_intr = ivsc_intr; 164 sc->sc_isr.isr_arg = sc; 165 sc->sc_isr.isr_ipl = 2; 166 add_isr(&sc->sc_isr); 167 168 scireset(sc); 169 170 /* 171 * Fill in the scsipi_adapter. 172 */ 173 memset(adapt, 0, sizeof(*adapt)); 174 adapt->adapt_dev = &sc->sc_dev; 175 adapt->adapt_nchannels = 1; 176 adapt->adapt_openings = 7; 177 adapt->adapt_max_periph = 1; 178 adapt->adapt_request = sci_scsipi_request; 179 adapt->adapt_minphys = sci_minphys; 180 181 /* 182 * Fill in the scsipi_channel. 183 */ 184 memset(chan, 0, sizeof(*chan)); 185 chan->chan_adapter = adapt; 186 chan->chan_bustype = &scsi_bustype; 187 chan->chan_channel = 0; 188 chan->chan_ntargets = 8; 189 chan->chan_nluns = 8; 190 chan->chan_id = 7; 191 192 /* 193 * attach all scsi units on us 194 */ 195 config_found(dp, chan, scsiprint); 196 } 197 198 int 199 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 200 int phase) 201 { 202 int wait = sci_data_wait; 203 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 204 volatile register u_char *sci_csr = dev->sci_csr; 205 #ifdef DEBUG 206 u_char *obp = buf; 207 #endif 208 209 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 210 211 *dev->sci_tcmd = phase; 212 *dev->sci_mode |= SCI_MODE_DMA; 213 *dev->sci_irecv = 0; 214 215 while (len >= 128) { 216 wait = sci_data_wait; 217 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 218 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 219 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 220 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 221 || --wait < 0) { 222 #ifdef DEBUG 223 if (sci_debug) 224 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 225 len, *dev->sci_bus_csr, wait); 226 #endif 227 *dev->sci_mode &= ~SCI_MODE_DMA; 228 return 0; 229 } 230 } 231 232 #define R1 (*buf++ = *sci_dma) 233 R1; R1; R1; R1; R1; R1; R1; R1; 234 R1; R1; R1; R1; R1; R1; R1; R1; 235 R1; R1; R1; R1; R1; R1; R1; R1; 236 R1; R1; R1; R1; R1; R1; R1; R1; 237 R1; R1; R1; R1; R1; R1; R1; R1; 238 R1; R1; R1; R1; R1; R1; R1; R1; 239 R1; R1; R1; R1; R1; R1; R1; R1; 240 R1; R1; R1; R1; R1; R1; R1; R1; 241 R1; R1; R1; R1; R1; R1; R1; R1; 242 R1; R1; R1; R1; R1; R1; R1; R1; 243 R1; R1; R1; R1; R1; R1; R1; R1; 244 R1; R1; R1; R1; R1; R1; R1; R1; 245 R1; R1; R1; R1; R1; R1; R1; R1; 246 R1; R1; R1; R1; R1; R1; R1; R1; 247 R1; R1; R1; R1; R1; R1; R1; R1; 248 R1; R1; R1; R1; R1; R1; R1; R1; 249 len -= 128; 250 } 251 252 while (len > 0) { 253 wait = sci_data_wait; 254 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 255 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 256 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 257 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 258 || --wait < 0) { 259 #ifdef DEBUG 260 if (sci_debug) 261 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 262 len, *dev->sci_bus_csr, wait); 263 #endif 264 *dev->sci_mode &= ~SCI_MODE_DMA; 265 return 0; 266 } 267 } 268 269 *buf++ = *sci_dma; 270 len--; 271 } 272 273 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 274 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 275 obp[6], obp[7], obp[8], obp[9])); 276 277 *dev->sci_mode &= ~SCI_MODE_DMA; 278 return 0; 279 } 280 281 int 282 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 283 int phase) 284 { 285 int wait = sci_data_wait; 286 volatile register u_char *sci_dma = dev->sci_data + 0x20; 287 volatile register u_char *sci_csr = dev->sci_csr; 288 289 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 290 291 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 292 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 293 buf[6], buf[7], buf[8], buf[9])); 294 295 *dev->sci_tcmd = phase; 296 *dev->sci_mode |= SCI_MODE_DMA; 297 *dev->sci_icmd |= SCI_ICMD_DATA; 298 *dev->sci_dma_send = 0; 299 while (len > 0) { 300 wait = sci_data_wait; 301 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 302 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 303 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 304 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 305 || --wait < 0) { 306 #ifdef DEBUG 307 if (sci_debug) 308 printf("ivsc_dma_out fail: l%d i%x w%d\n", 309 len, *dev->sci_bus_csr, wait); 310 #endif 311 *dev->sci_mode &= ~SCI_MODE_DMA; 312 return 0; 313 } 314 } 315 316 *sci_dma = *buf++; 317 len--; 318 } 319 320 wait = sci_data_wait; 321 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 322 SCI_CSR_PHASE_MATCH && --wait); 323 324 325 *dev->sci_mode &= ~SCI_MODE_DMA; 326 return 0; 327 } 328 329 int 330 ivsc_intr(void *arg) 331 { 332 struct sci_softc *dev = arg; 333 u_char stat; 334 335 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 336 return(0); 337 stat = *dev->sci_iack; 338 /* XXXX is: something is missing here, at least a: */ 339 return(1); 340 } 341
Indexes created Tue Sep 23 21:09:50 GMT 2025