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ivsc.c revision 1.34
      1 /*	$NetBSD: ivsc.c,v 1.34 2004/03/28 18:59:39 mhitch Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1982, 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. Neither the name of the University nor the names of its contributors
     16  *    may be used to endorse or promote products derived from this software
     17  *    without specific prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  *
     31  *	@(#)ivsdma.c
     32  */
     33 
     34 /*
     35  * Copyright (c) 1994 Michael L. Hitch
     36  *
     37  * Redistribution and use in source and binary forms, with or without
     38  * modification, are permitted provided that the following conditions
     39  * are met:
     40  * 1. Redistributions of source code must retain the above copyright
     41  *    notice, this list of conditions and the following disclaimer.
     42  * 2. Redistributions in binary form must reproduce the above copyright
     43  *    notice, this list of conditions and the following disclaimer in the
     44  *    documentation and/or other materials provided with the distribution.
     45  *
     46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56  *
     57  *	@(#)ivsdma.c
     58  */
     59 
     60 #include <sys/cdefs.h>
     61 __KERNEL_RCSID(0, "$NetBSD: ivsc.c,v 1.34 2004/03/28 18:59:39 mhitch Exp $");
     62 
     63 #include <sys/param.h>
     64 #include <sys/systm.h>
     65 #include <sys/kernel.h>
     66 #include <sys/device.h>
     67 #include <dev/scsipi/scsi_all.h>
     68 #include <dev/scsipi/scsipi_all.h>
     69 #include <dev/scsipi/scsiconf.h>
     70 #include <amiga/amiga/custom.h>
     71 #include <amiga/amiga/device.h>
     72 #include <amiga/amiga/isr.h>
     73 #include <amiga/dev/scireg.h>
     74 #include <amiga/dev/scivar.h>
     75 #include <amiga/dev/zbusvar.h>
     76 
     77 void ivscattach(struct device *, struct device *, void *);
     78 int ivscmatch(struct device *, struct cfdata *, void *);
     79 
     80 int ivsc_intr(void *);
     81 int ivsc_dma_xfer_in(struct sci_softc *dev, int len,
     82     register u_char *buf, int phase);
     83 int ivsc_dma_xfer_out(struct sci_softc *dev, int len,
     84     register u_char *buf, int phase);
     85 
     86 
     87 #ifdef DEBUG
     88 extern int sci_debug;
     89 #define QPRINTF(a) if (sci_debug > 1) printf a
     90 #else
     91 #define QPRINTF(a)
     92 #endif
     93 
     94 extern int sci_data_wait;
     95 
     96 int ivsdma_pseudo = 1;		/* 0=off, 1=on */
     97 
     98 CFATTACH_DECL(ivsc, sizeof(struct sci_softc),
     99     ivscmatch, ivscattach, NULL, NULL);
    100 
    101 /*
    102  * if this is an IVS board
    103  */
    104 int
    105 ivscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
    106 {
    107 	struct zbus_args *zap;
    108 
    109 	zap = auxp;
    110 
    111 	/*
    112 	 * Check manufacturer and product id.
    113 	 */
    114 	if (zap->manid != 2112 ||	/* If manufacturer is IVS */
    115 	    (zap->prodid != 48 &&	/*   product = Trumpcard 500 */
    116 	    zap->prodid != 52 &&	/*   product = Trumpcard */
    117 	    zap->prodid != 243))	/*   product = Vector SCSI */
    118 		return(0);		/* didn't match */
    119 	return(1);
    120 }
    121 
    122 void
    123 ivscattach(struct device *pdp, struct device *dp, void *auxp)
    124 {
    125 	volatile u_char *rp;
    126 	struct sci_softc *sc = (struct sci_softc *)dp;
    127 	struct zbus_args *zap;
    128 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    129 	struct scsipi_channel *chan = &sc->sc_channel;
    130 
    131 	printf("\n");
    132 
    133 	zap = auxp;
    134 
    135 	rp = (u_char *)zap->va + 0x40;
    136 	sc->sci_data = rp;
    137 	sc->sci_odata = rp;
    138 	sc->sci_icmd = rp + 2;
    139 	sc->sci_mode = rp + 4;
    140 	sc->sci_tcmd = rp + 6;
    141 	sc->sci_bus_csr = rp + 8;
    142 	sc->sci_sel_enb = rp + 8;
    143 	sc->sci_csr = rp + 10;
    144 	sc->sci_dma_send = rp + 10;
    145 	sc->sci_idata = rp + 12;
    146 	sc->sci_trecv = rp + 12;
    147 	sc->sci_iack = rp + 14;
    148 	sc->sci_irecv = rp + 14;
    149 
    150 	if (ivsdma_pseudo == 1) {
    151 		sc->dma_xfer_in = ivsc_dma_xfer_in;
    152 		sc->dma_xfer_out = ivsc_dma_xfer_out;
    153 	}
    154 
    155 	sc->sc_isr.isr_intr = ivsc_intr;
    156 	sc->sc_isr.isr_arg = sc;
    157 	sc->sc_isr.isr_ipl = 2;
    158 	add_isr(&sc->sc_isr);
    159 
    160 	scireset(sc);
    161 
    162 	/*
    163 	 * Fill in the scsipi_adapter.
    164 	 */
    165 	memset(adapt, 0, sizeof(*adapt));
    166 	adapt->adapt_dev = &sc->sc_dev;
    167 	adapt->adapt_nchannels = 1;
    168 	adapt->adapt_openings = 7;
    169 	adapt->adapt_max_periph = 1;
    170 	adapt->adapt_request = sci_scsipi_request;
    171 	adapt->adapt_minphys = sci_minphys;
    172 
    173 	/*
    174 	 * Fill in the scsipi_channel.
    175 	 */
    176 	memset(chan, 0, sizeof(*chan));
    177 	chan->chan_adapter = adapt;
    178 	chan->chan_bustype = &scsi_bustype;
    179 	chan->chan_channel = 0;
    180 	chan->chan_ntargets = 8;
    181 	chan->chan_nluns = 8;
    182 	chan->chan_id = 7;
    183 
    184 	/*
    185 	 * attach all scsi units on us
    186 	 */
    187 	config_found(dp, chan, scsiprint);
    188 }
    189 
    190 int
    191 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
    192                  int phase)
    193 {
    194 	int wait = sci_data_wait;
    195 	volatile register u_char *sci_dma = dev->sci_idata + 0x20;
    196 	volatile register u_char *sci_csr = dev->sci_csr;
    197 #ifdef DEBUG
    198 	u_char *obp = buf;
    199 #endif
    200 
    201 	QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    202 
    203 	*dev->sci_tcmd = phase;
    204 	*dev->sci_mode |= SCI_MODE_DMA;
    205 	*dev->sci_irecv = 0;
    206 
    207 	while (len >= 128) {
    208 		wait = sci_data_wait;
    209 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    210 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    211 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    212 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    213 			  || --wait < 0) {
    214 #ifdef DEBUG
    215 				if (sci_debug)
    216 					printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
    217 					len, *dev->sci_bus_csr, wait);
    218 #endif
    219 				*dev->sci_mode &= ~SCI_MODE_DMA;
    220 				return 0;
    221 			}
    222 		}
    223 
    224 #define	R1	(*buf++ = *sci_dma)
    225 		R1; R1; R1; R1; R1; R1; R1; R1;
    226 		R1; R1; R1; R1; R1; R1; R1; R1;
    227 		R1; R1; R1; R1; R1; R1; R1; R1;
    228 		R1; R1; R1; R1; R1; R1; R1; R1;
    229 		R1; R1; R1; R1; R1; R1; R1; R1;
    230 		R1; R1; R1; R1; R1; R1; R1; R1;
    231 		R1; R1; R1; R1; R1; R1; R1; R1;
    232 		R1; R1; R1; R1; R1; R1; R1; R1;
    233 		R1; R1; R1; R1; R1; R1; R1; R1;
    234 		R1; R1; R1; R1; R1; R1; R1; R1;
    235 		R1; R1; R1; R1; R1; R1; R1; R1;
    236 		R1; R1; R1; R1; R1; R1; R1; R1;
    237 		R1; R1; R1; R1; R1; R1; R1; R1;
    238 		R1; R1; R1; R1; R1; R1; R1; R1;
    239 		R1; R1; R1; R1; R1; R1; R1; R1;
    240 		R1; R1; R1; R1; R1; R1; R1; R1;
    241 		len -= 128;
    242 	}
    243 
    244   	while (len > 0) {
    245 		wait = sci_data_wait;
    246 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    247 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    248 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    249 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    250 			  || --wait < 0) {
    251 #ifdef DEBUG
    252 				if (sci_debug)
    253 					printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
    254 					len, *dev->sci_bus_csr, wait);
    255 #endif
    256 				*dev->sci_mode &= ~SCI_MODE_DMA;
    257 				return 0;
    258 			}
    259 		}
    260 
    261 		*buf++ = *sci_dma;
    262 		len--;
    263 	}
    264 
    265 	QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    266 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    267 	  obp[6], obp[7], obp[8], obp[9]));
    268 
    269 	*dev->sci_mode &= ~SCI_MODE_DMA;
    270 	return 0;
    271 }
    272 
    273 int
    274 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
    275                   int phase)
    276 {
    277 	int wait = sci_data_wait;
    278 	volatile register u_char *sci_dma = dev->sci_data + 0x20;
    279 	volatile register u_char *sci_csr = dev->sci_csr;
    280 
    281 	QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    282 
    283 	QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    284   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    285 	 buf[6], buf[7], buf[8], buf[9]));
    286 
    287 	*dev->sci_tcmd = phase;
    288 	*dev->sci_mode |= SCI_MODE_DMA;
    289 	*dev->sci_icmd |= SCI_ICMD_DATA;
    290 	*dev->sci_dma_send = 0;
    291 	while (len > 0) {
    292 		wait = sci_data_wait;
    293 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    294 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    295 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    296 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    297 			  || --wait < 0) {
    298 #ifdef DEBUG
    299 				if (sci_debug)
    300 					printf("ivsc_dma_out fail: l%d i%x w%d\n",
    301 					len, *dev->sci_bus_csr, wait);
    302 #endif
    303 				*dev->sci_mode &= ~SCI_MODE_DMA;
    304 				return 0;
    305 			}
    306 		}
    307 
    308 		*sci_dma = *buf++;
    309 		len--;
    310 	}
    311 
    312 	wait = sci_data_wait;
    313 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    314 	  SCI_CSR_PHASE_MATCH && --wait);
    315 
    316 
    317 	*dev->sci_mode &= ~SCI_MODE_DMA;
    318 	return 0;
    319 }
    320 
    321 int
    322 ivsc_intr(void *arg)
    323 {
    324 	struct sci_softc *dev = arg;
    325 	u_char stat;
    326 
    327 	if ((*dev->sci_csr & SCI_CSR_INT) == 0)
    328 		return(0);
    329 	stat = *dev->sci_iack;
    330 	/* XXXX is: something is missing here, at least a: */
    331 	return(1);
    332 }
    333