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ivsc.c revision 1.37
      1 /*	$NetBSD: ivsc.c,v 1.37 2014/01/22 00:25:16 christos Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1982, 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. Neither the name of the University nor the names of its contributors
     16  *    may be used to endorse or promote products derived from this software
     17  *    without specific prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  *
     31  *	@(#)ivsdma.c
     32  */
     33 
     34 /*
     35  * Copyright (c) 1994 Michael L. Hitch
     36  *
     37  * Redistribution and use in source and binary forms, with or without
     38  * modification, are permitted provided that the following conditions
     39  * are met:
     40  * 1. Redistributions of source code must retain the above copyright
     41  *    notice, this list of conditions and the following disclaimer.
     42  * 2. Redistributions in binary form must reproduce the above copyright
     43  *    notice, this list of conditions and the following disclaimer in the
     44  *    documentation and/or other materials provided with the distribution.
     45  *
     46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56  *
     57  *	@(#)ivsdma.c
     58  */
     59 
     60 #include <sys/cdefs.h>
     61 __KERNEL_RCSID(0, "$NetBSD: ivsc.c,v 1.37 2014/01/22 00:25:16 christos Exp $");
     62 
     63 #include <sys/param.h>
     64 #include <sys/systm.h>
     65 #include <sys/kernel.h>
     66 #include <sys/device.h>
     67 #include <dev/scsipi/scsi_all.h>
     68 #include <dev/scsipi/scsipi_all.h>
     69 #include <dev/scsipi/scsiconf.h>
     70 #include <amiga/amiga/custom.h>
     71 #include <amiga/amiga/device.h>
     72 #include <amiga/amiga/isr.h>
     73 #include <amiga/dev/scireg.h>
     74 #include <amiga/dev/scivar.h>
     75 #include <amiga/dev/zbusvar.h>
     76 
     77 void ivscattach(device_t, device_t, void *);
     78 int ivscmatch(device_t, cfdata_t, void *);
     79 
     80 int ivsc_intr(void *);
     81 int ivsc_dma_xfer_in(struct sci_softc *dev, int len,
     82     register u_char *buf, int phase);
     83 int ivsc_dma_xfer_out(struct sci_softc *dev, int len,
     84     register u_char *buf, int phase);
     85 
     86 
     87 #ifdef DEBUG
     88 extern int sci_debug;
     89 #define QPRINTF(a) if (sci_debug > 1) printf a
     90 #else
     91 #define QPRINTF(a)
     92 #endif
     93 
     94 extern int sci_data_wait;
     95 
     96 int ivsdma_pseudo = 1;		/* 0=off, 1=on */
     97 
     98 CFATTACH_DECL_NEW(ivsc, sizeof(struct sci_softc),
     99     ivscmatch, ivscattach, NULL, NULL);
    100 
    101 /*
    102  * if this is an IVS board
    103  */
    104 int
    105 ivscmatch(device_t parent, cfdata_t cf, void *aux)
    106 {
    107 	struct zbus_args *zap;
    108 
    109 	zap = aux;
    110 
    111 	/*
    112 	 * Check manufacturer and product id.
    113 	 */
    114 	if (zap->manid != 2112 ||	/* If manufacturer is IVS */
    115 	    (zap->prodid != 48 &&	/*   product = Trumpcard 500 */
    116 	    zap->prodid != 52 &&	/*   product = Trumpcard */
    117 	    zap->prodid != 243))	/*   product = Vector SCSI */
    118 		return(0);		/* didn't match */
    119 	return(1);
    120 }
    121 
    122 void
    123 ivscattach(device_t parent, device_t self, void *aux)
    124 {
    125 	volatile u_char *rp;
    126 	struct sci_softc *sc = device_private(self);
    127 	struct zbus_args *zap;
    128 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    129 	struct scsipi_channel *chan = &sc->sc_channel;
    130 
    131 	sc->sc_dev = self;
    132 
    133 	printf("\n");
    134 
    135 	zap = aux;
    136 
    137 	rp = (u_char *)zap->va + 0x40;
    138 	sc->sci_data = rp;
    139 	sc->sci_odata = rp;
    140 	sc->sci_icmd = rp + 2;
    141 	sc->sci_mode = rp + 4;
    142 	sc->sci_tcmd = rp + 6;
    143 	sc->sci_bus_csr = rp + 8;
    144 	sc->sci_sel_enb = rp + 8;
    145 	sc->sci_csr = rp + 10;
    146 	sc->sci_dma_send = rp + 10;
    147 	sc->sci_idata = rp + 12;
    148 	sc->sci_trecv = rp + 12;
    149 	sc->sci_iack = rp + 14;
    150 	sc->sci_irecv = rp + 14;
    151 
    152 	if (ivsdma_pseudo == 1) {
    153 		sc->dma_xfer_in = ivsc_dma_xfer_in;
    154 		sc->dma_xfer_out = ivsc_dma_xfer_out;
    155 	}
    156 
    157 	sc->sc_isr.isr_intr = ivsc_intr;
    158 	sc->sc_isr.isr_arg = sc;
    159 	sc->sc_isr.isr_ipl = 2;
    160 	add_isr(&sc->sc_isr);
    161 
    162 	scireset(sc);
    163 
    164 	/*
    165 	 * Fill in the scsipi_adapter.
    166 	 */
    167 	memset(adapt, 0, sizeof(*adapt));
    168 	adapt->adapt_dev = self;
    169 	adapt->adapt_nchannels = 1;
    170 	adapt->adapt_openings = 7;
    171 	adapt->adapt_max_periph = 1;
    172 	adapt->adapt_request = sci_scsipi_request;
    173 	adapt->adapt_minphys = sci_minphys;
    174 
    175 	/*
    176 	 * Fill in the scsipi_channel.
    177 	 */
    178 	memset(chan, 0, sizeof(*chan));
    179 	chan->chan_adapter = adapt;
    180 	chan->chan_bustype = &scsi_bustype;
    181 	chan->chan_channel = 0;
    182 	chan->chan_ntargets = 8;
    183 	chan->chan_nluns = 8;
    184 	chan->chan_id = 7;
    185 
    186 	/*
    187 	 * attach all scsi units on us
    188 	 */
    189 	config_found(self, chan, scsiprint);
    190 }
    191 
    192 int
    193 ivsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
    194                  int phase)
    195 {
    196 	int wait = sci_data_wait;
    197 	volatile register u_char *sci_dma = dev->sci_idata + 0x20;
    198 	volatile register u_char *sci_csr = dev->sci_csr;
    199 #ifdef DEBUG
    200 	u_char *obp = buf;
    201 #endif
    202 
    203 	QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    204 
    205 	*dev->sci_tcmd = phase;
    206 	*dev->sci_mode |= SCI_MODE_DMA;
    207 	*dev->sci_irecv = 0;
    208 
    209 	while (len >= 128) {
    210 		wait = sci_data_wait;
    211 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    212 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    213 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    214 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    215 			  || --wait < 0) {
    216 #ifdef DEBUG
    217 				if (sci_debug)
    218 					printf("ivsc_dma_in2 fail: l%d i%x w%d\n",
    219 					len, *dev->sci_bus_csr, wait);
    220 #endif
    221 				*dev->sci_mode &= ~SCI_MODE_DMA;
    222 				return 0;
    223 			}
    224 		}
    225 
    226 #define	R1	(*buf++ = *sci_dma)
    227 		R1; R1; R1; R1; R1; R1; R1; R1;
    228 		R1; R1; R1; R1; R1; R1; R1; R1;
    229 		R1; R1; R1; R1; R1; R1; R1; R1;
    230 		R1; R1; R1; R1; R1; R1; R1; R1;
    231 		R1; R1; R1; R1; R1; R1; R1; R1;
    232 		R1; R1; R1; R1; R1; R1; R1; R1;
    233 		R1; R1; R1; R1; R1; R1; R1; R1;
    234 		R1; R1; R1; R1; R1; R1; R1; R1;
    235 		R1; R1; R1; R1; R1; R1; R1; R1;
    236 		R1; R1; R1; R1; R1; R1; R1; R1;
    237 		R1; R1; R1; R1; R1; R1; R1; R1;
    238 		R1; R1; R1; R1; R1; R1; R1; R1;
    239 		R1; R1; R1; R1; R1; R1; R1; R1;
    240 		R1; R1; R1; R1; R1; R1; R1; R1;
    241 		R1; R1; R1; R1; R1; R1; R1; R1;
    242 		R1; R1; R1; R1; R1; R1; R1; R1;
    243 		len -= 128;
    244 	}
    245 
    246   	while (len > 0) {
    247 		wait = sci_data_wait;
    248 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    249 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    250 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    251 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    252 			  || --wait < 0) {
    253 #ifdef DEBUG
    254 				if (sci_debug)
    255 					printf("ivsc_dma_in1 fail: l%d i%x w%d\n",
    256 					len, *dev->sci_bus_csr, wait);
    257 #endif
    258 				*dev->sci_mode &= ~SCI_MODE_DMA;
    259 				return 0;
    260 			}
    261 		}
    262 
    263 		*buf++ = *sci_dma;
    264 		len--;
    265 	}
    266 
    267 	QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    268 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    269 	  obp[6], obp[7], obp[8], obp[9]));
    270 
    271 	*dev->sci_mode &= ~SCI_MODE_DMA;
    272 	return 0;
    273 }
    274 
    275 int
    276 ivsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
    277                   int phase)
    278 {
    279 	int wait = sci_data_wait;
    280 	volatile register u_char *sci_dma = dev->sci_data + 0x20;
    281 	volatile register u_char *sci_csr = dev->sci_csr;
    282 
    283 	QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    284 
    285 	QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    286   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    287 	 buf[6], buf[7], buf[8], buf[9]));
    288 
    289 	*dev->sci_tcmd = phase;
    290 	*dev->sci_mode |= SCI_MODE_DMA;
    291 	*dev->sci_icmd |= SCI_ICMD_DATA;
    292 	*dev->sci_dma_send = 0;
    293 	while (len > 0) {
    294 		wait = sci_data_wait;
    295 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    296 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    297 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    298 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    299 			  || --wait < 0) {
    300 #ifdef DEBUG
    301 				if (sci_debug)
    302 					printf("ivsc_dma_out fail: l%d i%x w%d\n",
    303 					len, *dev->sci_bus_csr, wait);
    304 #endif
    305 				*dev->sci_mode &= ~SCI_MODE_DMA;
    306 				return 0;
    307 			}
    308 		}
    309 
    310 		*sci_dma = *buf++;
    311 		len--;
    312 	}
    313 
    314 	wait = sci_data_wait;
    315 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    316 	  SCI_CSR_PHASE_MATCH && --wait);
    317 
    318 
    319 	*dev->sci_mode &= ~SCI_MODE_DMA;
    320 	return 0;
    321 }
    322 
    323 int
    324 ivsc_intr(void *arg)
    325 {
    326 	struct sci_softc *dev = arg;
    327 	u_char stat;
    328 
    329 	if ((*dev->sci_csr & SCI_CSR_INT) == 0)
    330 		return(0);
    331 	stat = *dev->sci_iack;
    332 	__USE(stat);
    333 	/* XXXX is: something is missing here, at least a: */
    334 	return(1);
    335 }
    336