mfc.c revision 1.24.8.2 1 1.24.8.2 nathanw /* $NetBSD: mfc.c,v 1.24.8.2 2002/02/28 04:06:52 nathanw Exp $ */
2 1.24.8.2 nathanw
3 1.24.8.2 nathanw /*
4 1.24.8.2 nathanw * Copyright (c) 1994 Michael L. Hitch
5 1.24.8.2 nathanw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.24.8.2 nathanw * All rights reserved.
7 1.24.8.2 nathanw *
8 1.24.8.2 nathanw * Redistribution and use in source and binary forms, with or without
9 1.24.8.2 nathanw * modification, are permitted provided that the following conditions
10 1.24.8.2 nathanw * are met:
11 1.24.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
12 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer.
13 1.24.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
14 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
15 1.24.8.2 nathanw * documentation and/or other materials provided with the distribution.
16 1.24.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
17 1.24.8.2 nathanw * must display the following acknowledgement:
18 1.24.8.2 nathanw * This product includes software developed by the University of
19 1.24.8.2 nathanw * California, Berkeley and its contributors.
20 1.24.8.2 nathanw * 4. Neither the name of the University nor the names of its contributors
21 1.24.8.2 nathanw * may be used to endorse or promote products derived from this software
22 1.24.8.2 nathanw * without specific prior written permission.
23 1.24.8.2 nathanw *
24 1.24.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.24.8.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.24.8.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.24.8.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.24.8.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.24.8.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.24.8.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.24.8.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.24.8.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.24.8.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.24.8.2 nathanw * SUCH DAMAGE.
35 1.24.8.2 nathanw */
36 1.24.8.2 nathanw
37 1.24.8.2 nathanw #include "opt_kgdb.h"
38 1.24.8.2 nathanw
39 1.24.8.2 nathanw #include <sys/cdefs.h>
40 1.24.8.2 nathanw __KERNEL_RCSID(0, "$NetBSD: mfc.c,v 1.24.8.2 2002/02/28 04:06:52 nathanw Exp $");
41 1.24.8.2 nathanw
42 1.24.8.2 nathanw #include <sys/param.h>
43 1.24.8.2 nathanw #include <sys/systm.h>
44 1.24.8.2 nathanw #include <sys/kernel.h>
45 1.24.8.2 nathanw #include <sys/device.h>
46 1.24.8.2 nathanw #include <sys/tty.h>
47 1.24.8.2 nathanw #include <sys/proc.h>
48 1.24.8.2 nathanw #include <sys/file.h>
49 1.24.8.2 nathanw #include <sys/malloc.h>
50 1.24.8.2 nathanw #include <sys/uio.h>
51 1.24.8.2 nathanw #include <sys/kernel.h>
52 1.24.8.2 nathanw #include <sys/syslog.h>
53 1.24.8.2 nathanw #include <sys/queue.h>
54 1.24.8.2 nathanw #include <machine/cpu.h>
55 1.24.8.2 nathanw #include <amiga/amiga/device.h>
56 1.24.8.2 nathanw #include <amiga/amiga/isr.h>
57 1.24.8.2 nathanw #include <amiga/amiga/custom.h>
58 1.24.8.2 nathanw #include <amiga/amiga/cia.h>
59 1.24.8.2 nathanw #include <amiga/amiga/cc.h>
60 1.24.8.2 nathanw #include <amiga/dev/zbusvar.h>
61 1.24.8.2 nathanw
62 1.24.8.2 nathanw #include <dev/cons.h>
63 1.24.8.2 nathanw
64 1.24.8.2 nathanw #include <sys/conf.h>
65 1.24.8.2 nathanw #include <machine/conf.h>
66 1.24.8.2 nathanw
67 1.24.8.2 nathanw #include "mfcs.h"
68 1.24.8.2 nathanw
69 1.24.8.2 nathanw #ifndef SEROBUF_SIZE
70 1.24.8.2 nathanw #define SEROBUF_SIZE 128
71 1.24.8.2 nathanw #endif
72 1.24.8.2 nathanw #ifndef SERIBUF_SIZE
73 1.24.8.2 nathanw #define SERIBUF_SIZE 1024
74 1.24.8.2 nathanw #endif
75 1.24.8.2 nathanw
76 1.24.8.2 nathanw #define splser() spl6()
77 1.24.8.2 nathanw
78 1.24.8.2 nathanw /*
79 1.24.8.2 nathanw * 68581 DUART registers
80 1.24.8.2 nathanw */
81 1.24.8.2 nathanw struct mfc_regs {
82 1.24.8.2 nathanw volatile u_char du_mr1a;
83 1.24.8.2 nathanw #define du_mr2a du_mr1a
84 1.24.8.2 nathanw u_char pad0;
85 1.24.8.2 nathanw volatile u_char du_csra;
86 1.24.8.2 nathanw #define du_sra du_csra
87 1.24.8.2 nathanw u_char pad2;
88 1.24.8.2 nathanw volatile u_char du_cra;
89 1.24.8.2 nathanw u_char pad4;
90 1.24.8.2 nathanw volatile u_char du_tba;
91 1.24.8.2 nathanw #define du_rba du_tba
92 1.24.8.2 nathanw u_char pad6;
93 1.24.8.2 nathanw volatile u_char du_acr;
94 1.24.8.2 nathanw #define du_ipcr du_acr
95 1.24.8.2 nathanw u_char pad8;
96 1.24.8.2 nathanw volatile u_char du_imr;
97 1.24.8.2 nathanw #define du_isr du_imr
98 1.24.8.2 nathanw u_char pad10;
99 1.24.8.2 nathanw volatile u_char du_ctur;
100 1.24.8.2 nathanw #define du_cmsb du_ctur
101 1.24.8.2 nathanw u_char pad12;
102 1.24.8.2 nathanw volatile u_char du_ctlr;
103 1.24.8.2 nathanw #define du_clsb du_ctlr
104 1.24.8.2 nathanw u_char pad14;
105 1.24.8.2 nathanw volatile u_char du_mr1b;
106 1.24.8.2 nathanw #define du_mr2b du_mr1b
107 1.24.8.2 nathanw u_char pad16;
108 1.24.8.2 nathanw volatile u_char du_csrb;
109 1.24.8.2 nathanw #define du_srb du_csrb
110 1.24.8.2 nathanw u_char pad18;
111 1.24.8.2 nathanw volatile u_char du_crb;
112 1.24.8.2 nathanw u_char pad20;
113 1.24.8.2 nathanw volatile u_char du_tbb;
114 1.24.8.2 nathanw #define du_rbb du_tbb
115 1.24.8.2 nathanw u_char pad22;
116 1.24.8.2 nathanw volatile u_char du_ivr;
117 1.24.8.2 nathanw u_char pad24;
118 1.24.8.2 nathanw volatile u_char du_opcr;
119 1.24.8.2 nathanw #define du_ip du_opcr
120 1.24.8.2 nathanw u_char pad26;
121 1.24.8.2 nathanw volatile u_char du_btst;
122 1.24.8.2 nathanw #define du_strc du_btst
123 1.24.8.2 nathanw u_char pad28;
124 1.24.8.2 nathanw volatile u_char du_btrst;
125 1.24.8.2 nathanw #define du_stpc du_btrst
126 1.24.8.2 nathanw u_char pad30;
127 1.24.8.2 nathanw };
128 1.24.8.2 nathanw
129 1.24.8.2 nathanw /*
130 1.24.8.2 nathanw * 68681 DUART serial port registers
131 1.24.8.2 nathanw */
132 1.24.8.2 nathanw struct duart_regs {
133 1.24.8.2 nathanw volatile u_char ch_mr1;
134 1.24.8.2 nathanw #define ch_mr2 ch_mr1
135 1.24.8.2 nathanw u_char pad0;
136 1.24.8.2 nathanw volatile u_char ch_csr;
137 1.24.8.2 nathanw #define ch_sr ch_csr
138 1.24.8.2 nathanw u_char pad1;
139 1.24.8.2 nathanw volatile u_char ch_cr;
140 1.24.8.2 nathanw u_char pad2;
141 1.24.8.2 nathanw volatile u_char ch_tb;
142 1.24.8.2 nathanw #define ch_rb ch_tb
143 1.24.8.2 nathanw u_char pad3;
144 1.24.8.2 nathanw };
145 1.24.8.2 nathanw
146 1.24.8.2 nathanw struct mfc_softc {
147 1.24.8.2 nathanw struct device sc_dev;
148 1.24.8.2 nathanw struct isr sc_isr;
149 1.24.8.2 nathanw struct mfc_regs *sc_regs;
150 1.24.8.2 nathanw u_long clk_frq;
151 1.24.8.2 nathanw u_short ct_val;
152 1.24.8.2 nathanw u_char ct_usecnt;
153 1.24.8.2 nathanw u_char imask;
154 1.24.8.2 nathanw u_char mfc_iii;
155 1.24.8.2 nathanw u_char last_ip;
156 1.24.8.2 nathanw };
157 1.24.8.2 nathanw
158 1.24.8.2 nathanw #if NMFCS > 0
159 1.24.8.2 nathanw struct mfcs_softc {
160 1.24.8.2 nathanw struct device sc_dev;
161 1.24.8.2 nathanw struct tty *sc_tty;
162 1.24.8.2 nathanw struct duart_regs *sc_duart;
163 1.24.8.2 nathanw struct mfc_regs *sc_regs;
164 1.24.8.2 nathanw struct mfc_softc *sc_mfc;
165 1.24.8.2 nathanw int swflags;
166 1.24.8.2 nathanw long flags; /* XXX */
167 1.24.8.2 nathanw #define CT_USED 1 /* CT in use */
168 1.24.8.2 nathanw u_short *rptr, *wptr, incnt, ovfl;
169 1.24.8.2 nathanw u_short inbuf[SERIBUF_SIZE];
170 1.24.8.2 nathanw char *ptr, *end;
171 1.24.8.2 nathanw char outbuf[SEROBUF_SIZE];
172 1.24.8.2 nathanw struct vbl_node vbl_node;
173 1.24.8.2 nathanw };
174 1.24.8.2 nathanw #endif
175 1.24.8.2 nathanw
176 1.24.8.2 nathanw #if NMFCP > 0
177 1.24.8.2 nathanw struct mfcp_softc {
178 1.24.8.2 nathanw };
179 1.24.8.2 nathanw #endif
180 1.24.8.2 nathanw
181 1.24.8.2 nathanw struct mfc_args {
182 1.24.8.2 nathanw struct zbus_args zargs;
183 1.24.8.2 nathanw char *subdev;
184 1.24.8.2 nathanw char unit;
185 1.24.8.2 nathanw };
186 1.24.8.2 nathanw
187 1.24.8.2 nathanw int mfcprint(void *auxp, const char *);
188 1.24.8.2 nathanw void mfcattach(struct device *, struct device *, void *);
189 1.24.8.2 nathanw int mfcmatch(struct device *, struct cfdata *, void *);
190 1.24.8.2 nathanw
191 1.24.8.2 nathanw #if NMFCS > 0
192 1.24.8.2 nathanw int mfcsmatch(struct device *, struct cfdata *, void *);
193 1.24.8.2 nathanw void mfcsattach(struct device *, struct device *, void *);
194 1.24.8.2 nathanw int mfcsparam( struct tty *, struct termios *);
195 1.24.8.2 nathanw int mfcshwiflow(struct tty *, int);
196 1.24.8.2 nathanw void mfcsstart(struct tty *);
197 1.24.8.2 nathanw int mfcsmctl(dev_t, int, int);
198 1.24.8.2 nathanw void mfcsxintr(int);
199 1.24.8.2 nathanw void mfcseint(int, int);
200 1.24.8.2 nathanw void mfcsmint(register int);
201 1.24.8.2 nathanw #endif
202 1.24.8.2 nathanw
203 1.24.8.2 nathanw #if NMFCP > 0
204 1.24.8.2 nathanw void mfcpattach(struct device *, struct device *, void *);
205 1.24.8.2 nathanw int mfcpmatch(struct device *, struct cfdata *, void *);
206 1.24.8.2 nathanw #endif
207 1.24.8.2 nathanw int mfcintr(void *);
208 1.24.8.2 nathanw
209 1.24.8.2 nathanw struct cfattach mfc_ca = {
210 1.24.8.2 nathanw sizeof(struct mfc_softc), mfcmatch, mfcattach
211 1.24.8.2 nathanw };
212 1.24.8.2 nathanw
213 1.24.8.2 nathanw #if NMFCS > 0
214 1.24.8.2 nathanw struct cfattach mfcs_ca = {
215 1.24.8.2 nathanw sizeof(struct mfcs_softc), mfcsmatch, mfcsattach
216 1.24.8.2 nathanw };
217 1.24.8.2 nathanw
218 1.24.8.2 nathanw extern struct cfdriver mfcs_cd;
219 1.24.8.2 nathanw #endif
220 1.24.8.2 nathanw
221 1.24.8.2 nathanw #if NMFCP > 0
222 1.24.8.2 nathanw struct cfattach mfcp_ca = {
223 1.24.8.2 nathanw sizeof(struct mfcp_softc), mfcpmatch, mfcpattach
224 1.24.8.2 nathanw };
225 1.24.8.2 nathanw #endif
226 1.24.8.2 nathanw
227 1.24.8.2 nathanw
228 1.24.8.2 nathanw int mfcs_active;
229 1.24.8.2 nathanw int mfcsdefaultrate = 38400 /*TTYDEF_SPEED*/;
230 1.24.8.2 nathanw #define SWFLAGS(dev) (sc->swflags | (((dev) & 0x80) == 0 ? TIOCFLAG_SOFTCAR : 0))
231 1.24.8.2 nathanw
232 1.24.8.2 nathanw #ifdef notyet
233 1.24.8.2 nathanw /*
234 1.24.8.2 nathanw * MultiFaceCard III, II+ (not supported yet), and
235 1.24.8.2 nathanw * SerialMaster 500+ (not supported yet)
236 1.24.8.2 nathanw * baud rate tables for BRG set 1 [not used yet]
237 1.24.8.2 nathanw */
238 1.24.8.2 nathanw
239 1.24.8.2 nathanw struct speedtab mfcs3speedtab1[] = {
240 1.24.8.2 nathanw { 0, 0 },
241 1.24.8.2 nathanw { 100, 0x00 },
242 1.24.8.2 nathanw { 220, 0x11 },
243 1.24.8.2 nathanw { 600, 0x44 },
244 1.24.8.2 nathanw { 1200, 0x55 },
245 1.24.8.2 nathanw { 2400, 0x66 },
246 1.24.8.2 nathanw { 4800, 0x88 },
247 1.24.8.2 nathanw { 9600, 0x99 },
248 1.24.8.2 nathanw { 19200, 0xbb },
249 1.24.8.2 nathanw { 115200, 0xcc },
250 1.24.8.2 nathanw { -1, -1 }
251 1.24.8.2 nathanw };
252 1.24.8.2 nathanw
253 1.24.8.2 nathanw /*
254 1.24.8.2 nathanw * MultiFaceCard II, I, and SerialMaster 500
255 1.24.8.2 nathanw * baud rate tables for BRG set 1 [not used yet]
256 1.24.8.2 nathanw */
257 1.24.8.2 nathanw
258 1.24.8.2 nathanw struct speedtab mfcs2speedtab1[] = {
259 1.24.8.2 nathanw { 0, 0 },
260 1.24.8.2 nathanw { 50, 0x00 },
261 1.24.8.2 nathanw { 110, 0x11 },
262 1.24.8.2 nathanw { 300, 0x44 },
263 1.24.8.2 nathanw { 600, 0x55 },
264 1.24.8.2 nathanw { 1200, 0x66 },
265 1.24.8.2 nathanw { 2400, 0x88 },
266 1.24.8.2 nathanw { 4800, 0x99 },
267 1.24.8.2 nathanw { 9600, 0xbb },
268 1.24.8.2 nathanw { 38400, 0xcc },
269 1.24.8.2 nathanw { -1, -1 }
270 1.24.8.2 nathanw };
271 1.24.8.2 nathanw #endif
272 1.24.8.2 nathanw
273 1.24.8.2 nathanw /*
274 1.24.8.2 nathanw * MultiFaceCard III, II+ (not supported yet), and
275 1.24.8.2 nathanw * SerialMaster 500+ (not supported yet)
276 1.24.8.2 nathanw * baud rate tables for BRG set 2
277 1.24.8.2 nathanw */
278 1.24.8.2 nathanw
279 1.24.8.2 nathanw struct speedtab mfcs3speedtab2[] = {
280 1.24.8.2 nathanw { 0, 0 },
281 1.24.8.2 nathanw { 150, 0x00 },
282 1.24.8.2 nathanw { 200, 0x11 },
283 1.24.8.2 nathanw { 300, 0x33 },
284 1.24.8.2 nathanw { 600, 0x44 },
285 1.24.8.2 nathanw { 1200, 0x55 },
286 1.24.8.2 nathanw { 2400, 0x66 },
287 1.24.8.2 nathanw { 4800, 0x88 },
288 1.24.8.2 nathanw { 9600, 0x99 },
289 1.24.8.2 nathanw { 19200, 0xbb },
290 1.24.8.2 nathanw { 38400, 0xcc },
291 1.24.8.2 nathanw { -1, -1 }
292 1.24.8.2 nathanw };
293 1.24.8.2 nathanw
294 1.24.8.2 nathanw /*
295 1.24.8.2 nathanw * MultiFaceCard II, I, and SerialMaster 500
296 1.24.8.2 nathanw * baud rate tables for BRG set 2
297 1.24.8.2 nathanw */
298 1.24.8.2 nathanw
299 1.24.8.2 nathanw struct speedtab mfcs2speedtab2[] = {
300 1.24.8.2 nathanw { 0, 0 },
301 1.24.8.2 nathanw { 75, 0x00 },
302 1.24.8.2 nathanw { 100, 0x11 },
303 1.24.8.2 nathanw { 150, 0x33 },
304 1.24.8.2 nathanw { 300, 0x44 },
305 1.24.8.2 nathanw { 600, 0x55 },
306 1.24.8.2 nathanw { 1200, 0x66 },
307 1.24.8.2 nathanw { 2400, 0x88 },
308 1.24.8.2 nathanw { 4800, 0x99 },
309 1.24.8.2 nathanw { 9600, 0xbb },
310 1.24.8.2 nathanw { 19200, 0xcc },
311 1.24.8.2 nathanw { -1, -1 }
312 1.24.8.2 nathanw };
313 1.24.8.2 nathanw
314 1.24.8.2 nathanw /*
315 1.24.8.2 nathanw * if we are an bsc/Alf Data MultFaceCard (I, II, and III)
316 1.24.8.2 nathanw */
317 1.24.8.2 nathanw int
318 1.24.8.2 nathanw mfcmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
319 1.24.8.2 nathanw {
320 1.24.8.2 nathanw struct zbus_args *zap;
321 1.24.8.2 nathanw
322 1.24.8.2 nathanw zap = auxp;
323 1.24.8.2 nathanw if (zap->manid == 2092 &&
324 1.24.8.2 nathanw (zap->prodid == 16 || zap->prodid == 17 || zap->prodid == 18))
325 1.24.8.2 nathanw
326 1.24.8.2 nathanw return(1);
327 1.24.8.2 nathanw return(0);
328 1.24.8.2 nathanw }
329 1.24.8.2 nathanw
330 1.24.8.2 nathanw void
331 1.24.8.2 nathanw mfcattach(struct device *pdp, struct device *dp, void *auxp)
332 1.24.8.2 nathanw {
333 1.24.8.2 nathanw struct mfc_softc *scc;
334 1.24.8.2 nathanw struct zbus_args *zap;
335 1.24.8.2 nathanw struct mfc_args ma;
336 1.24.8.2 nathanw int unit;
337 1.24.8.2 nathanw struct mfc_regs *rp;
338 1.24.8.2 nathanw
339 1.24.8.2 nathanw zap = auxp;
340 1.24.8.2 nathanw
341 1.24.8.2 nathanw printf ("\n");
342 1.24.8.2 nathanw
343 1.24.8.2 nathanw scc = (struct mfc_softc *)dp;
344 1.24.8.2 nathanw unit = scc->sc_dev.dv_unit;
345 1.24.8.2 nathanw scc->sc_regs = rp = zap->va;
346 1.24.8.2 nathanw if (zap->prodid == 18)
347 1.24.8.2 nathanw scc->mfc_iii = 3;
348 1.24.8.2 nathanw scc->clk_frq = scc->mfc_iii ? 230400 : 115200;
349 1.24.8.2 nathanw
350 1.24.8.2 nathanw rp->du_opcr = 0x00; /* configure output port? */
351 1.24.8.2 nathanw rp->du_btrst = 0x0f; /* clear modem lines */
352 1.24.8.2 nathanw rp->du_ivr = 0; /* IVR */
353 1.24.8.2 nathanw rp->du_imr = 0; /* IMR */
354 1.24.8.2 nathanw rp->du_acr = 0xe0; /* baud rate generate set 2 */
355 1.24.8.2 nathanw rp->du_ctur = 0;
356 1.24.8.2 nathanw rp->du_ctlr = 4;
357 1.24.8.2 nathanw rp->du_csra = 0xcc; /* clock select = 38400 */
358 1.24.8.2 nathanw rp->du_cra = 0x10; /* reset mode register ptr */
359 1.24.8.2 nathanw rp->du_cra = 0x20;
360 1.24.8.2 nathanw rp->du_cra = 0x30;
361 1.24.8.2 nathanw rp->du_cra = 0x40;
362 1.24.8.2 nathanw rp->du_mr1a = 0x93; /* MRA1 */
363 1.24.8.2 nathanw rp->du_mr2a = 0x17; /* MRA2 */
364 1.24.8.2 nathanw rp->du_csrb = 0xcc; /* clock select = 38400 */
365 1.24.8.2 nathanw rp->du_crb = 0x10; /* reset mode register ptr */
366 1.24.8.2 nathanw rp->du_crb = 0x20;
367 1.24.8.2 nathanw rp->du_crb = 0x30;
368 1.24.8.2 nathanw rp->du_crb = 0x40;
369 1.24.8.2 nathanw rp->du_mr1b = 0x93; /* MRB1 */
370 1.24.8.2 nathanw rp->du_mr2b = 0x17; /* MRB2 */
371 1.24.8.2 nathanw rp->du_cra = 0x05; /* enable A Rx & Tx */
372 1.24.8.2 nathanw rp->du_crb = 0x05; /* enable B Rx & Tx */
373 1.24.8.2 nathanw
374 1.24.8.2 nathanw scc->sc_isr.isr_intr = mfcintr;
375 1.24.8.2 nathanw scc->sc_isr.isr_arg = scc;
376 1.24.8.2 nathanw scc->sc_isr.isr_ipl = 6;
377 1.24.8.2 nathanw add_isr(&scc->sc_isr);
378 1.24.8.2 nathanw
379 1.24.8.2 nathanw /* configure ports */
380 1.24.8.2 nathanw bcopy(zap, &ma.zargs, sizeof(struct zbus_args));
381 1.24.8.2 nathanw ma.subdev = "mfcs";
382 1.24.8.2 nathanw ma.unit = unit * 2;
383 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
384 1.24.8.2 nathanw ma.unit = unit * 2 + 1;
385 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
386 1.24.8.2 nathanw ma.subdev = "mfcp";
387 1.24.8.2 nathanw ma.unit = unit;
388 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
389 1.24.8.2 nathanw }
390 1.24.8.2 nathanw
391 1.24.8.2 nathanw /*
392 1.24.8.2 nathanw *
393 1.24.8.2 nathanw */
394 1.24.8.2 nathanw int
395 1.24.8.2 nathanw mfcsmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
396 1.24.8.2 nathanw {
397 1.24.8.2 nathanw struct mfc_args *ma;
398 1.24.8.2 nathanw
399 1.24.8.2 nathanw ma = auxp;
400 1.24.8.2 nathanw if (strcmp(ma->subdev, "mfcs") == 0)
401 1.24.8.2 nathanw return (1);
402 1.24.8.2 nathanw return (0);
403 1.24.8.2 nathanw }
404 1.24.8.2 nathanw
405 1.24.8.2 nathanw void
406 1.24.8.2 nathanw mfcsattach(struct device *pdp, struct device *dp, void *auxp)
407 1.24.8.2 nathanw {
408 1.24.8.2 nathanw int unit;
409 1.24.8.2 nathanw struct mfcs_softc *sc;
410 1.24.8.2 nathanw struct mfc_softc *scc;
411 1.24.8.2 nathanw struct mfc_args *ma;
412 1.24.8.2 nathanw struct mfc_regs *rp;
413 1.24.8.2 nathanw
414 1.24.8.2 nathanw sc = (struct mfcs_softc *) dp;
415 1.24.8.2 nathanw scc = (struct mfc_softc *) pdp;
416 1.24.8.2 nathanw ma = auxp;
417 1.24.8.2 nathanw
418 1.24.8.2 nathanw if (dp) {
419 1.24.8.2 nathanw printf (": input fifo %d output fifo %d\n", SERIBUF_SIZE,
420 1.24.8.2 nathanw SEROBUF_SIZE);
421 1.24.8.2 nathanw alloc_sicallback();
422 1.24.8.2 nathanw }
423 1.24.8.2 nathanw
424 1.24.8.2 nathanw unit = ma->unit;
425 1.24.8.2 nathanw mfcs_active |= 1 << unit;
426 1.24.8.2 nathanw sc->rptr = sc->wptr = sc->inbuf;
427 1.24.8.2 nathanw sc->sc_mfc = scc;
428 1.24.8.2 nathanw sc->sc_regs = rp = scc->sc_regs;
429 1.24.8.2 nathanw sc->sc_duart = (struct duart_regs *) ((unit & 1) ? &rp->du_mr1b :
430 1.24.8.2 nathanw &rp->du_mr1a);
431 1.24.8.2 nathanw /*
432 1.24.8.2 nathanw * should have only one vbl routine to handle all ports?
433 1.24.8.2 nathanw */
434 1.24.8.2 nathanw sc->vbl_node.function = (void (*) (void *)) mfcsmint;
435 1.24.8.2 nathanw sc->vbl_node.data = (void *) unit;
436 1.24.8.2 nathanw add_vbl_function(&sc->vbl_node, 1, (void *) unit);
437 1.24.8.2 nathanw }
438 1.24.8.2 nathanw
439 1.24.8.2 nathanw /*
440 1.24.8.2 nathanw * print diag if pnp is NULL else just extra
441 1.24.8.2 nathanw */
442 1.24.8.2 nathanw int
443 1.24.8.2 nathanw mfcprint(void *auxp, const char *pnp)
444 1.24.8.2 nathanw {
445 1.24.8.2 nathanw if (pnp == NULL)
446 1.24.8.2 nathanw return(UNCONF);
447 1.24.8.2 nathanw return(QUIET);
448 1.24.8.2 nathanw }
449 1.24.8.2 nathanw
450 1.24.8.2 nathanw int
451 1.24.8.2 nathanw mfcsopen(dev_t dev, int flag, int mode, struct proc *p)
452 1.24.8.2 nathanw {
453 1.24.8.2 nathanw struct tty *tp;
454 1.24.8.2 nathanw struct mfcs_softc *sc;
455 1.24.8.2 nathanw int unit, error, s;
456 1.24.8.2 nathanw
457 1.24.8.2 nathanw error = 0;
458 1.24.8.2 nathanw unit = dev & 0x1f;
459 1.24.8.2 nathanw
460 1.24.8.2 nathanw if (unit >= mfcs_cd.cd_ndevs || (mfcs_active & (1 << unit)) == 0)
461 1.24.8.2 nathanw return (ENXIO);
462 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
463 1.24.8.2 nathanw
464 1.24.8.2 nathanw s = spltty();
465 1.24.8.2 nathanw
466 1.24.8.2 nathanw if (sc->sc_tty)
467 1.24.8.2 nathanw tp = sc->sc_tty;
468 1.24.8.2 nathanw else {
469 1.24.8.2 nathanw tp = sc->sc_tty = ttymalloc();
470 1.24.8.2 nathanw tty_attach(tp);
471 1.24.8.2 nathanw }
472 1.24.8.2 nathanw
473 1.24.8.2 nathanw tp->t_oproc = (void (*) (struct tty *)) mfcsstart;
474 1.24.8.2 nathanw tp->t_param = mfcsparam;
475 1.24.8.2 nathanw tp->t_dev = dev;
476 1.24.8.2 nathanw tp->t_hwiflow = mfcshwiflow;
477 1.24.8.2 nathanw
478 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
479 1.24.8.2 nathanw ttychars(tp);
480 1.24.8.2 nathanw if (tp->t_ispeed == 0) {
481 1.24.8.2 nathanw /*
482 1.24.8.2 nathanw * only when cleared do we reset to defaults.
483 1.24.8.2 nathanw */
484 1.24.8.2 nathanw tp->t_iflag = TTYDEF_IFLAG;
485 1.24.8.2 nathanw tp->t_oflag = TTYDEF_OFLAG;
486 1.24.8.2 nathanw tp->t_cflag = TTYDEF_CFLAG;
487 1.24.8.2 nathanw tp->t_lflag = TTYDEF_LFLAG;
488 1.24.8.2 nathanw tp->t_ispeed = tp->t_ospeed = mfcsdefaultrate;
489 1.24.8.2 nathanw }
490 1.24.8.2 nathanw /*
491 1.24.8.2 nathanw * do these all the time
492 1.24.8.2 nathanw */
493 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_CLOCAL)
494 1.24.8.2 nathanw tp->t_cflag |= CLOCAL;
495 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_CRTSCTS)
496 1.24.8.2 nathanw tp->t_cflag |= CRTSCTS;
497 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_MDMBUF)
498 1.24.8.2 nathanw tp->t_cflag |= MDMBUF;
499 1.24.8.2 nathanw mfcsparam(tp, &tp->t_termios);
500 1.24.8.2 nathanw ttsetwater(tp);
501 1.24.8.2 nathanw
502 1.24.8.2 nathanw (void)mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMSET);
503 1.24.8.2 nathanw if ((SWFLAGS(dev) & TIOCFLAG_SOFTCAR) ||
504 1.24.8.2 nathanw (mfcsmctl(dev, 0, DMGET) & TIOCM_CD))
505 1.24.8.2 nathanw tp->t_state |= TS_CARR_ON;
506 1.24.8.2 nathanw else
507 1.24.8.2 nathanw tp->t_state &= ~TS_CARR_ON;
508 1.24.8.2 nathanw } else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0) {
509 1.24.8.2 nathanw splx(s);
510 1.24.8.2 nathanw return(EBUSY);
511 1.24.8.2 nathanw }
512 1.24.8.2 nathanw
513 1.24.8.2 nathanw /*
514 1.24.8.2 nathanw * if NONBLOCK requested, ignore carrier
515 1.24.8.2 nathanw */
516 1.24.8.2 nathanw if (flag & O_NONBLOCK)
517 1.24.8.2 nathanw goto done;
518 1.24.8.2 nathanw
519 1.24.8.2 nathanw /*
520 1.24.8.2 nathanw * block waiting for carrier
521 1.24.8.2 nathanw */
522 1.24.8.2 nathanw while ((tp->t_state & TS_CARR_ON) == 0 && (tp->t_cflag & CLOCAL) == 0) {
523 1.24.8.2 nathanw tp->t_wopen++;
524 1.24.8.2 nathanw error = ttysleep(tp, (caddr_t)&tp->t_rawq,
525 1.24.8.2 nathanw TTIPRI | PCATCH, ttopen, 0);
526 1.24.8.2 nathanw tp->t_wopen--;
527 1.24.8.2 nathanw if (error) {
528 1.24.8.2 nathanw splx(s);
529 1.24.8.2 nathanw return(error);
530 1.24.8.2 nathanw }
531 1.24.8.2 nathanw }
532 1.24.8.2 nathanw done:
533 1.24.8.2 nathanw /* This is a way to handle lost XON characters */
534 1.24.8.2 nathanw if ((flag & O_TRUNC) && (tp->t_state & TS_TTSTOP)) {
535 1.24.8.2 nathanw tp->t_state &= ~TS_TTSTOP;
536 1.24.8.2 nathanw ttstart (tp);
537 1.24.8.2 nathanw }
538 1.24.8.2 nathanw
539 1.24.8.2 nathanw splx(s);
540 1.24.8.2 nathanw /*
541 1.24.8.2 nathanw * Reset the tty pointer, as there could have been a dialout
542 1.24.8.2 nathanw * use of the tty with a dialin open waiting.
543 1.24.8.2 nathanw */
544 1.24.8.2 nathanw tp->t_dev = dev;
545 1.24.8.2 nathanw return tp->t_linesw->l_open(dev, tp);
546 1.24.8.2 nathanw }
547 1.24.8.2 nathanw
548 1.24.8.2 nathanw /*ARGSUSED*/
549 1.24.8.2 nathanw int
550 1.24.8.2 nathanw mfcsclose(dev_t dev, int flag, int mode, struct proc *p)
551 1.24.8.2 nathanw {
552 1.24.8.2 nathanw struct tty *tp;
553 1.24.8.2 nathanw int unit;
554 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
555 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
556 1.24.8.2 nathanw
557 1.24.8.2 nathanw unit = dev & 31;
558 1.24.8.2 nathanw
559 1.24.8.2 nathanw tp = sc->sc_tty;
560 1.24.8.2 nathanw tp->t_linesw->l_close(tp, flag);
561 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x70; /* stop break */
562 1.24.8.2 nathanw
563 1.24.8.2 nathanw scc->imask &= ~(0x7 << ((unit & 1) * 4));
564 1.24.8.2 nathanw scc->sc_regs->du_imr = scc->imask;
565 1.24.8.2 nathanw if (sc->flags & CT_USED) {
566 1.24.8.2 nathanw --scc->ct_usecnt;
567 1.24.8.2 nathanw sc->flags &= ~CT_USED;
568 1.24.8.2 nathanw }
569 1.24.8.2 nathanw
570 1.24.8.2 nathanw /*
571 1.24.8.2 nathanw * If the device is closed, it's close, no matter whether we deal with
572 1.24.8.2 nathanw * modem control signals nor not.
573 1.24.8.2 nathanw */
574 1.24.8.2 nathanw #if 0
575 1.24.8.2 nathanw if (tp->t_cflag & HUPCL || tp->t_wopen != 0 ||
576 1.24.8.2 nathanw (tp->t_state & TS_ISOPEN) == 0)
577 1.24.8.2 nathanw #endif
578 1.24.8.2 nathanw (void) mfcsmctl(dev, 0, DMSET);
579 1.24.8.2 nathanw ttyclose(tp);
580 1.24.8.2 nathanw #if not_yet
581 1.24.8.2 nathanw if (tp != &mfcs_cons) {
582 1.24.8.2 nathanw remove_vbl_function(&sc->vbl_node);
583 1.24.8.2 nathanw ttyfree(tp);
584 1.24.8.2 nathanw sc->sc_tty = (struct tty *) NULL;
585 1.24.8.2 nathanw }
586 1.24.8.2 nathanw #endif
587 1.24.8.2 nathanw return (0);
588 1.24.8.2 nathanw }
589 1.24.8.2 nathanw
590 1.24.8.2 nathanw int
591 1.24.8.2 nathanw mfcsread(dev_t dev, struct uio *uio, int flag)
592 1.24.8.2 nathanw {
593 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
594 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
595 1.24.8.2 nathanw if (tp == NULL)
596 1.24.8.2 nathanw return(ENXIO);
597 1.24.8.2 nathanw return tp->t_linesw->l_read(tp, uio, flag);
598 1.24.8.2 nathanw }
599 1.24.8.2 nathanw
600 1.24.8.2 nathanw int
601 1.24.8.2 nathanw mfcswrite(dev_t dev, struct uio *uio, int flag)
602 1.24.8.2 nathanw {
603 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
604 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
605 1.24.8.2 nathanw
606 1.24.8.2 nathanw if (tp == NULL)
607 1.24.8.2 nathanw return(ENXIO);
608 1.24.8.2 nathanw return tp->t_linesw->l_write(tp, uio, flag);
609 1.24.8.2 nathanw }
610 1.24.8.2 nathanw
611 1.24.8.2 nathanw int
612 1.24.8.2 nathanw mfcspoll(dev_t dev, int events, struct proc *p)
613 1.24.8.2 nathanw {
614 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
615 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
616 1.24.8.2 nathanw
617 1.24.8.2 nathanw if (tp == NULL)
618 1.24.8.2 nathanw return(ENXIO);
619 1.24.8.2 nathanw return ((*tp->t_linesw->l_poll)(tp, events, p));
620 1.24.8.2 nathanw }
621 1.24.8.2 nathanw
622 1.24.8.2 nathanw struct tty *
623 1.24.8.2 nathanw mfcstty(dev_t dev)
624 1.24.8.2 nathanw {
625 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
626 1.24.8.2 nathanw
627 1.24.8.2 nathanw return (sc->sc_tty);
628 1.24.8.2 nathanw }
629 1.24.8.2 nathanw
630 1.24.8.2 nathanw int
631 1.24.8.2 nathanw mfcsioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
632 1.24.8.2 nathanw {
633 1.24.8.2 nathanw register struct tty *tp;
634 1.24.8.2 nathanw register int error;
635 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
636 1.24.8.2 nathanw
637 1.24.8.2 nathanw tp = sc->sc_tty;
638 1.24.8.2 nathanw if (!tp)
639 1.24.8.2 nathanw return ENXIO;
640 1.24.8.2 nathanw
641 1.24.8.2 nathanw error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, p);
642 1.24.8.2 nathanw if (error >= 0)
643 1.24.8.2 nathanw return(error);
644 1.24.8.2 nathanw
645 1.24.8.2 nathanw error = ttioctl(tp, cmd, data, flag, p);
646 1.24.8.2 nathanw if (error >= 0)
647 1.24.8.2 nathanw return(error);
648 1.24.8.2 nathanw
649 1.24.8.2 nathanw switch (cmd) {
650 1.24.8.2 nathanw case TIOCSBRK:
651 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x60; /* start break */
652 1.24.8.2 nathanw break;
653 1.24.8.2 nathanw
654 1.24.8.2 nathanw case TIOCCBRK:
655 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x70; /* stop break */
656 1.24.8.2 nathanw break;
657 1.24.8.2 nathanw
658 1.24.8.2 nathanw case TIOCSDTR:
659 1.24.8.2 nathanw (void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIS);
660 1.24.8.2 nathanw break;
661 1.24.8.2 nathanw
662 1.24.8.2 nathanw case TIOCCDTR:
663 1.24.8.2 nathanw (void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIC);
664 1.24.8.2 nathanw break;
665 1.24.8.2 nathanw
666 1.24.8.2 nathanw case TIOCMSET:
667 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMSET);
668 1.24.8.2 nathanw break;
669 1.24.8.2 nathanw
670 1.24.8.2 nathanw case TIOCMBIS:
671 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMBIS);
672 1.24.8.2 nathanw break;
673 1.24.8.2 nathanw
674 1.24.8.2 nathanw case TIOCMBIC:
675 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMBIC);
676 1.24.8.2 nathanw break;
677 1.24.8.2 nathanw
678 1.24.8.2 nathanw case TIOCMGET:
679 1.24.8.2 nathanw *(int *)data = mfcsmctl(dev, 0, DMGET);
680 1.24.8.2 nathanw break;
681 1.24.8.2 nathanw case TIOCGFLAGS:
682 1.24.8.2 nathanw *(int *)data = SWFLAGS(dev);
683 1.24.8.2 nathanw break;
684 1.24.8.2 nathanw case TIOCSFLAGS:
685 1.24.8.2 nathanw error = suser(p->p_ucred, &p->p_acflag);
686 1.24.8.2 nathanw if (error != 0)
687 1.24.8.2 nathanw return(EPERM);
688 1.24.8.2 nathanw
689 1.24.8.2 nathanw sc->swflags = *(int *)data;
690 1.24.8.2 nathanw sc->swflags &= /* only allow valid flags */
691 1.24.8.2 nathanw (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | TIOCFLAG_CRTSCTS);
692 1.24.8.2 nathanw /* XXXX need to change duart parameters? */
693 1.24.8.2 nathanw break;
694 1.24.8.2 nathanw default:
695 1.24.8.2 nathanw return(ENOTTY);
696 1.24.8.2 nathanw }
697 1.24.8.2 nathanw
698 1.24.8.2 nathanw return(0);
699 1.24.8.2 nathanw }
700 1.24.8.2 nathanw
701 1.24.8.2 nathanw int
702 1.24.8.2 nathanw mfcsparam(struct tty *tp, struct termios *t)
703 1.24.8.2 nathanw {
704 1.24.8.2 nathanw int cflag, unit, ospeed;
705 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
706 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
707 1.24.8.2 nathanw
708 1.24.8.2 nathanw cflag = t->c_cflag;
709 1.24.8.2 nathanw unit = tp->t_dev & 31;
710 1.24.8.2 nathanw if (sc->flags & CT_USED) {
711 1.24.8.2 nathanw --scc->ct_usecnt;
712 1.24.8.2 nathanw sc->flags &= ~CT_USED;
713 1.24.8.2 nathanw }
714 1.24.8.2 nathanw ospeed = ttspeedtab(t->c_ospeed, scc->mfc_iii ? mfcs3speedtab2 :
715 1.24.8.2 nathanw mfcs2speedtab2);
716 1.24.8.2 nathanw
717 1.24.8.2 nathanw /*
718 1.24.8.2 nathanw * If Baud Rate Generator can't generate requested speed,
719 1.24.8.2 nathanw * try to use the counter/timer.
720 1.24.8.2 nathanw */
721 1.24.8.2 nathanw if (ospeed < 0 && (scc->clk_frq % t->c_ospeed) == 0) {
722 1.24.8.2 nathanw ospeed = scc->clk_frq / t->c_ospeed; /* divisor */
723 1.24.8.2 nathanw if (scc->ct_usecnt > 0 && scc->ct_val != ospeed)
724 1.24.8.2 nathanw ospeed = -1;
725 1.24.8.2 nathanw else {
726 1.24.8.2 nathanw scc->sc_regs->du_ctur = ospeed >> 8;
727 1.24.8.2 nathanw scc->sc_regs->du_ctlr = ospeed;
728 1.24.8.2 nathanw scc->ct_val = ospeed;
729 1.24.8.2 nathanw ++scc->ct_usecnt;
730 1.24.8.2 nathanw sc->flags |= CT_USED;
731 1.24.8.2 nathanw ospeed = 0xdd;
732 1.24.8.2 nathanw }
733 1.24.8.2 nathanw }
734 1.24.8.2 nathanw /* XXXX 68681 duart could handle split speeds */
735 1.24.8.2 nathanw if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
736 1.24.8.2 nathanw return(EINVAL);
737 1.24.8.2 nathanw
738 1.24.8.2 nathanw /* XXXX handle parity, character size, stop bits, flow control */
739 1.24.8.2 nathanw
740 1.24.8.2 nathanw /*
741 1.24.8.2 nathanw * copy to tty
742 1.24.8.2 nathanw */
743 1.24.8.2 nathanw tp->t_ispeed = t->c_ispeed;
744 1.24.8.2 nathanw tp->t_ospeed = t->c_ospeed;
745 1.24.8.2 nathanw tp->t_cflag = cflag;
746 1.24.8.2 nathanw
747 1.24.8.2 nathanw /*
748 1.24.8.2 nathanw * enable interrupts
749 1.24.8.2 nathanw */
750 1.24.8.2 nathanw scc->imask |= (0x2 << ((unit & 1) * 4)) | 0x80;
751 1.24.8.2 nathanw scc->sc_regs->du_imr = scc->imask;
752 1.24.8.2 nathanw #if defined(DEBUG) && 0
753 1.24.8.2 nathanw printf("mfcsparam: speed %d => %x ct %d imask %x cflag %x\n",
754 1.24.8.2 nathanw t->c_ospeed, ospeed, scc->ct_val, scc->imask, cflag);
755 1.24.8.2 nathanw #endif
756 1.24.8.2 nathanw if (ospeed == 0)
757 1.24.8.2 nathanw (void)mfcsmctl(tp->t_dev, 0, DMSET); /* hang up line */
758 1.24.8.2 nathanw else {
759 1.24.8.2 nathanw /*
760 1.24.8.2 nathanw * (re)enable DTR
761 1.24.8.2 nathanw * and set baud rate. (8 bit mode)
762 1.24.8.2 nathanw */
763 1.24.8.2 nathanw (void)mfcsmctl(tp->t_dev, TIOCM_DTR | TIOCM_RTS, DMSET);
764 1.24.8.2 nathanw sc->sc_duart->ch_csr = ospeed;
765 1.24.8.2 nathanw }
766 1.24.8.2 nathanw return(0);
767 1.24.8.2 nathanw }
768 1.24.8.2 nathanw
769 1.24.8.2 nathanw int
770 1.24.8.2 nathanw mfcshwiflow(struct tty *tp, int flag)
771 1.24.8.2 nathanw {
772 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
773 1.24.8.2 nathanw int unit = tp->t_dev & 1;
774 1.24.8.2 nathanw
775 1.24.8.2 nathanw if (flag)
776 1.24.8.2 nathanw sc->sc_regs->du_btrst = 1 << unit;
777 1.24.8.2 nathanw else
778 1.24.8.2 nathanw sc->sc_regs->du_btst = 1 << unit;
779 1.24.8.2 nathanw return 1;
780 1.24.8.2 nathanw }
781 1.24.8.2 nathanw
782 1.24.8.2 nathanw void
783 1.24.8.2 nathanw mfcsstart(struct tty *tp)
784 1.24.8.2 nathanw {
785 1.24.8.2 nathanw int cc, s, unit;
786 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
787 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
788 1.24.8.2 nathanw
789 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0)
790 1.24.8.2 nathanw return;
791 1.24.8.2 nathanw
792 1.24.8.2 nathanw unit = tp->t_dev & 1;
793 1.24.8.2 nathanw
794 1.24.8.2 nathanw s = splser();
795 1.24.8.2 nathanw if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP))
796 1.24.8.2 nathanw goto out;
797 1.24.8.2 nathanw
798 1.24.8.2 nathanw cc = tp->t_outq.c_cc;
799 1.24.8.2 nathanw if (cc <= tp->t_lowat) {
800 1.24.8.2 nathanw if (tp->t_state & TS_ASLEEP) {
801 1.24.8.2 nathanw tp->t_state &= ~TS_ASLEEP;
802 1.24.8.2 nathanw wakeup((caddr_t) & tp->t_outq);
803 1.24.8.2 nathanw }
804 1.24.8.2 nathanw selwakeup(&tp->t_wsel);
805 1.24.8.2 nathanw }
806 1.24.8.2 nathanw if (cc == 0 || (tp->t_state & TS_BUSY))
807 1.24.8.2 nathanw goto out;
808 1.24.8.2 nathanw
809 1.24.8.2 nathanw /*
810 1.24.8.2 nathanw * We only do bulk transfers if using CTSRTS flow control, not for
811 1.24.8.2 nathanw * (probably sloooow) ixon/ixoff devices.
812 1.24.8.2 nathanw */
813 1.24.8.2 nathanw if ((tp->t_cflag & CRTSCTS) == 0)
814 1.24.8.2 nathanw cc = 1;
815 1.24.8.2 nathanw
816 1.24.8.2 nathanw /*
817 1.24.8.2 nathanw * Limit the amount of output we do in one burst
818 1.24.8.2 nathanw * to prevent hogging the CPU.
819 1.24.8.2 nathanw */
820 1.24.8.2 nathanw if (cc > SEROBUF_SIZE)
821 1.24.8.2 nathanw cc = SEROBUF_SIZE;
822 1.24.8.2 nathanw cc = q_to_b(&tp->t_outq, sc->outbuf, cc);
823 1.24.8.2 nathanw if (cc > 0) {
824 1.24.8.2 nathanw tp->t_state |= TS_BUSY;
825 1.24.8.2 nathanw
826 1.24.8.2 nathanw sc->ptr = sc->outbuf;
827 1.24.8.2 nathanw sc->end = sc->outbuf + cc;
828 1.24.8.2 nathanw
829 1.24.8.2 nathanw /*
830 1.24.8.2 nathanw * Get first character out, then have TBE-interrupts blow out
831 1.24.8.2 nathanw * further characters, until buffer is empty, and TS_BUSY gets
832 1.24.8.2 nathanw * cleared.
833 1.24.8.2 nathanw */
834 1.24.8.2 nathanw sc->sc_duart->ch_tb = *sc->ptr++;
835 1.24.8.2 nathanw scc->imask |= 1 << (unit * 4);
836 1.24.8.2 nathanw sc->sc_regs->du_imr = scc->imask;
837 1.24.8.2 nathanw }
838 1.24.8.2 nathanw out:
839 1.24.8.2 nathanw splx(s);
840 1.24.8.2 nathanw }
841 1.24.8.2 nathanw
842 1.24.8.2 nathanw /*
843 1.24.8.2 nathanw * Stop output on a line.
844 1.24.8.2 nathanw */
845 1.24.8.2 nathanw /*ARGSUSED*/
846 1.24.8.2 nathanw void
847 1.24.8.2 nathanw mfcsstop(struct tty *tp, int flag)
848 1.24.8.2 nathanw {
849 1.24.8.2 nathanw int s;
850 1.24.8.2 nathanw
851 1.24.8.2 nathanw s = splser();
852 1.24.8.2 nathanw if (tp->t_state & TS_BUSY) {
853 1.24.8.2 nathanw if ((tp->t_state & TS_TTSTOP) == 0)
854 1.24.8.2 nathanw tp->t_state |= TS_FLUSH;
855 1.24.8.2 nathanw }
856 1.24.8.2 nathanw splx(s);
857 1.24.8.2 nathanw }
858 1.24.8.2 nathanw
859 1.24.8.2 nathanw int
860 1.24.8.2 nathanw mfcsmctl(dev_t dev, int bits, int how)
861 1.24.8.2 nathanw {
862 1.24.8.2 nathanw int unit, s;
863 1.24.8.2 nathanw u_char ub = 0;
864 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
865 1.24.8.2 nathanw
866 1.24.8.2 nathanw unit = dev & 1;
867 1.24.8.2 nathanw
868 1.24.8.2 nathanw /*
869 1.24.8.2 nathanw * convert TIOCM* mask into CIA mask
870 1.24.8.2 nathanw * which is active low
871 1.24.8.2 nathanw */
872 1.24.8.2 nathanw if (how != DMGET) {
873 1.24.8.2 nathanw /*
874 1.24.8.2 nathanw * need to save current state of DTR & RTS ?
875 1.24.8.2 nathanw */
876 1.24.8.2 nathanw if (bits & TIOCM_DTR)
877 1.24.8.2 nathanw ub |= 0x04 << unit;
878 1.24.8.2 nathanw if (bits & TIOCM_RTS)
879 1.24.8.2 nathanw ub |= 0x01 << unit;
880 1.24.8.2 nathanw }
881 1.24.8.2 nathanw s = splser();
882 1.24.8.2 nathanw switch (how) {
883 1.24.8.2 nathanw case DMSET:
884 1.24.8.2 nathanw sc->sc_regs->du_btst = ub;
885 1.24.8.2 nathanw sc->sc_regs->du_btrst = ub ^ (0x05 << unit);
886 1.24.8.2 nathanw break;
887 1.24.8.2 nathanw
888 1.24.8.2 nathanw case DMBIC:
889 1.24.8.2 nathanw sc->sc_regs->du_btrst = ub;
890 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
891 1.24.8.2 nathanw break;
892 1.24.8.2 nathanw
893 1.24.8.2 nathanw case DMBIS:
894 1.24.8.2 nathanw sc->sc_regs->du_btst = ub;
895 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
896 1.24.8.2 nathanw break;
897 1.24.8.2 nathanw
898 1.24.8.2 nathanw case DMGET:
899 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
900 1.24.8.2 nathanw break;
901 1.24.8.2 nathanw }
902 1.24.8.2 nathanw (void)splx(s);
903 1.24.8.2 nathanw
904 1.24.8.2 nathanw /* XXXX should keep DTR & RTS states in softc? */
905 1.24.8.2 nathanw bits = TIOCM_DTR | TIOCM_RTS;
906 1.24.8.2 nathanw if (ub & (1 << unit))
907 1.24.8.2 nathanw bits |= TIOCM_CTS;
908 1.24.8.2 nathanw if (ub & (4 << unit))
909 1.24.8.2 nathanw bits |= TIOCM_DSR;
910 1.24.8.2 nathanw if (ub & (0x10 << unit))
911 1.24.8.2 nathanw bits |= TIOCM_CD;
912 1.24.8.2 nathanw /* XXXX RI is not supported on all boards */
913 1.24.8.2 nathanw if (sc->sc_regs->pad26 & (1 << unit))
914 1.24.8.2 nathanw bits |= TIOCM_RI;
915 1.24.8.2 nathanw
916 1.24.8.2 nathanw return(bits);
917 1.24.8.2 nathanw }
918 1.24.8.2 nathanw
919 1.24.8.2 nathanw /*
920 1.24.8.2 nathanw * Level 6 interrupt processing for the MultiFaceCard 68681 DUART
921 1.24.8.2 nathanw */
922 1.24.8.2 nathanw
923 1.24.8.2 nathanw int
924 1.24.8.2 nathanw mfcintr(void *arg)
925 1.24.8.2 nathanw {
926 1.24.8.2 nathanw struct mfc_softc *scc = arg;
927 1.24.8.2 nathanw struct mfcs_softc *sc;
928 1.24.8.2 nathanw struct mfc_regs *regs;
929 1.24.8.2 nathanw struct tty *tp;
930 1.24.8.2 nathanw int istat, unit;
931 1.24.8.2 nathanw u_short c;
932 1.24.8.2 nathanw
933 1.24.8.2 nathanw regs = scc->sc_regs;
934 1.24.8.2 nathanw istat = regs->du_isr & scc->imask;
935 1.24.8.2 nathanw if (istat == 0)
936 1.24.8.2 nathanw return (0);
937 1.24.8.2 nathanw unit = scc->sc_dev.dv_unit * 2;
938 1.24.8.2 nathanw if (istat & 0x02) { /* channel A receive interrupt */
939 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
940 1.24.8.2 nathanw while (1) {
941 1.24.8.2 nathanw c = regs->du_sra << 8;
942 1.24.8.2 nathanw if ((c & 0x0100) == 0)
943 1.24.8.2 nathanw break;
944 1.24.8.2 nathanw c |= regs->du_rba;
945 1.24.8.2 nathanw if (sc->incnt == SERIBUF_SIZE)
946 1.24.8.2 nathanw ++sc->ovfl;
947 1.24.8.2 nathanw else {
948 1.24.8.2 nathanw *sc->wptr++ = c;
949 1.24.8.2 nathanw if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
950 1.24.8.2 nathanw sc->wptr = sc->inbuf;
951 1.24.8.2 nathanw ++sc->incnt;
952 1.24.8.2 nathanw if (sc->incnt > SERIBUF_SIZE - 16)
953 1.24.8.2 nathanw regs->du_btrst = 1;
954 1.24.8.2 nathanw }
955 1.24.8.2 nathanw if (c & 0x1000)
956 1.24.8.2 nathanw regs->du_cra = 0x40;
957 1.24.8.2 nathanw }
958 1.24.8.2 nathanw }
959 1.24.8.2 nathanw if (istat & 0x20) { /* channel B receive interrupt */
960 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit + 1];
961 1.24.8.2 nathanw while (1) {
962 1.24.8.2 nathanw c = regs->du_srb << 8;
963 1.24.8.2 nathanw if ((c & 0x0100) == 0)
964 1.24.8.2 nathanw break;
965 1.24.8.2 nathanw c |= regs->du_rbb;
966 1.24.8.2 nathanw if (sc->incnt == SERIBUF_SIZE)
967 1.24.8.2 nathanw ++sc->ovfl;
968 1.24.8.2 nathanw else {
969 1.24.8.2 nathanw *sc->wptr++ = c;
970 1.24.8.2 nathanw if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
971 1.24.8.2 nathanw sc->wptr = sc->inbuf;
972 1.24.8.2 nathanw ++sc->incnt;
973 1.24.8.2 nathanw if (sc->incnt > SERIBUF_SIZE - 16)
974 1.24.8.2 nathanw regs->du_btrst = 2;
975 1.24.8.2 nathanw }
976 1.24.8.2 nathanw if (c & 0x1000)
977 1.24.8.2 nathanw regs->du_crb = 0x40;
978 1.24.8.2 nathanw }
979 1.24.8.2 nathanw }
980 1.24.8.2 nathanw if (istat & 0x01) { /* channel A transmit interrupt */
981 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
982 1.24.8.2 nathanw tp = sc->sc_tty;
983 1.24.8.2 nathanw if (sc->ptr == sc->end) {
984 1.24.8.2 nathanw tp->t_state &= ~(TS_BUSY | TS_FLUSH);
985 1.24.8.2 nathanw scc->imask &= ~0x01;
986 1.24.8.2 nathanw regs->du_imr = scc->imask;
987 1.24.8.2 nathanw add_sicallback (tp->t_linesw ?
988 1.24.8.2 nathanw (sifunc_t)tp->t_linesw->l_start
989 1.24.8.2 nathanw : (sifunc_t)mfcsstart, tp, NULL);
990 1.24.8.2 nathanw
991 1.24.8.2 nathanw }
992 1.24.8.2 nathanw else
993 1.24.8.2 nathanw regs->du_tba = *sc->ptr++;
994 1.24.8.2 nathanw }
995 1.24.8.2 nathanw if (istat & 0x10) { /* channel B transmit interrupt */
996 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit + 1];
997 1.24.8.2 nathanw tp = sc->sc_tty;
998 1.24.8.2 nathanw if (sc->ptr == sc->end) {
999 1.24.8.2 nathanw tp->t_state &= ~(TS_BUSY | TS_FLUSH);
1000 1.24.8.2 nathanw scc->imask &= ~0x10;
1001 1.24.8.2 nathanw regs->du_imr = scc->imask;
1002 1.24.8.2 nathanw add_sicallback (tp->t_linesw ?
1003 1.24.8.2 nathanw (sifunc_t)tp->t_linesw->l_start
1004 1.24.8.2 nathanw : (sifunc_t)mfcsstart, tp, NULL);
1005 1.24.8.2 nathanw }
1006 1.24.8.2 nathanw else
1007 1.24.8.2 nathanw regs->du_tbb = *sc->ptr++;
1008 1.24.8.2 nathanw }
1009 1.24.8.2 nathanw if (istat & 0x80) { /* input port change interrupt */
1010 1.24.8.2 nathanw c = regs->du_ipcr;
1011 1.24.8.2 nathanw printf ("%s: ipcr %02x", scc->sc_dev.dv_xname, c);
1012 1.24.8.2 nathanw }
1013 1.24.8.2 nathanw return(1);
1014 1.24.8.2 nathanw }
1015 1.24.8.2 nathanw
1016 1.24.8.2 nathanw void
1017 1.24.8.2 nathanw mfcsxintr(int unit)
1018 1.24.8.2 nathanw {
1019 1.24.8.2 nathanw int s1, s2, ovfl;
1020 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1021 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
1022 1.24.8.2 nathanw
1023 1.24.8.2 nathanw /*
1024 1.24.8.2 nathanw * Make sure we're not interrupted by another
1025 1.24.8.2 nathanw * vbl, but allow level6 ints
1026 1.24.8.2 nathanw */
1027 1.24.8.2 nathanw s1 = spltty();
1028 1.24.8.2 nathanw
1029 1.24.8.2 nathanw /*
1030 1.24.8.2 nathanw * pass along any acumulated information
1031 1.24.8.2 nathanw * while input is not blocked
1032 1.24.8.2 nathanw */
1033 1.24.8.2 nathanw while (sc->incnt && (tp->t_state & TS_TBLOCK) == 0) {
1034 1.24.8.2 nathanw /*
1035 1.24.8.2 nathanw * no collision with ser_fastint()
1036 1.24.8.2 nathanw */
1037 1.24.8.2 nathanw mfcseint(unit, *sc->rptr++);
1038 1.24.8.2 nathanw
1039 1.24.8.2 nathanw ovfl = 0;
1040 1.24.8.2 nathanw /* lock against mfcs_fastint() */
1041 1.24.8.2 nathanw s2 = splser();
1042 1.24.8.2 nathanw --sc->incnt;
1043 1.24.8.2 nathanw if (sc->rptr == sc->inbuf + SERIBUF_SIZE)
1044 1.24.8.2 nathanw sc->rptr = sc->inbuf;
1045 1.24.8.2 nathanw if (sc->ovfl != 0) {
1046 1.24.8.2 nathanw ovfl = sc->ovfl;
1047 1.24.8.2 nathanw sc->ovfl = 0;
1048 1.24.8.2 nathanw }
1049 1.24.8.2 nathanw splx(s2);
1050 1.24.8.2 nathanw if (ovfl != 0)
1051 1.24.8.2 nathanw log(LOG_WARNING, "%s: %d buffer overflow!\n",
1052 1.24.8.2 nathanw sc->sc_dev.dv_xname, ovfl);
1053 1.24.8.2 nathanw }
1054 1.24.8.2 nathanw if (sc->incnt == 0 && (tp->t_state & TS_TBLOCK) == 0) {
1055 1.24.8.2 nathanw sc->sc_regs->du_btst = 1 << unit; /* XXXX */
1056 1.24.8.2 nathanw }
1057 1.24.8.2 nathanw splx(s1);
1058 1.24.8.2 nathanw }
1059 1.24.8.2 nathanw
1060 1.24.8.2 nathanw void
1061 1.24.8.2 nathanw mfcseint(int unit, int stat)
1062 1.24.8.2 nathanw {
1063 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1064 1.24.8.2 nathanw struct tty *tp;
1065 1.24.8.2 nathanw u_char ch;
1066 1.24.8.2 nathanw int c;
1067 1.24.8.2 nathanw
1068 1.24.8.2 nathanw tp = sc->sc_tty;
1069 1.24.8.2 nathanw ch = stat & 0xff;
1070 1.24.8.2 nathanw c = ch;
1071 1.24.8.2 nathanw
1072 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0) {
1073 1.24.8.2 nathanw #ifdef KGDB
1074 1.24.8.2 nathanw /* we don't care about parity errors */
1075 1.24.8.2 nathanw if (kgdb_dev == makedev(sermajor, unit) && c == FRAME_END)
1076 1.24.8.2 nathanw kgdb_connect(0); /* trap into kgdb */
1077 1.24.8.2 nathanw #endif
1078 1.24.8.2 nathanw return;
1079 1.24.8.2 nathanw }
1080 1.24.8.2 nathanw
1081 1.24.8.2 nathanw /*
1082 1.24.8.2 nathanw * Check for break and (if enabled) parity error.
1083 1.24.8.2 nathanw */
1084 1.24.8.2 nathanw if (stat & 0xc000)
1085 1.24.8.2 nathanw c |= TTY_FE;
1086 1.24.8.2 nathanw else if (stat & 0x2000)
1087 1.24.8.2 nathanw c |= TTY_PE;
1088 1.24.8.2 nathanw
1089 1.24.8.2 nathanw if (stat & 0x1000)
1090 1.24.8.2 nathanw log(LOG_WARNING, "%s: fifo overflow\n",
1091 1.24.8.2 nathanw ((struct mfcs_softc *)mfcs_cd.cd_devs[unit])->sc_dev.dv_xname);
1092 1.24.8.2 nathanw
1093 1.24.8.2 nathanw tp->t_linesw->l_rint(c, tp);
1094 1.24.8.2 nathanw }
1095 1.24.8.2 nathanw
1096 1.24.8.2 nathanw /*
1097 1.24.8.2 nathanw * This interrupt is periodically invoked in the vertical blank
1098 1.24.8.2 nathanw * interrupt. It's used to keep track of the modem control lines
1099 1.24.8.2 nathanw * and (new with the fast_int code) to move accumulated data
1100 1.24.8.2 nathanw * up into the tty layer.
1101 1.24.8.2 nathanw */
1102 1.24.8.2 nathanw void
1103 1.24.8.2 nathanw mfcsmint(int unit)
1104 1.24.8.2 nathanw {
1105 1.24.8.2 nathanw struct tty *tp;
1106 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1107 1.24.8.2 nathanw u_char stat, last, istat;
1108 1.24.8.2 nathanw
1109 1.24.8.2 nathanw tp = sc->sc_tty;
1110 1.24.8.2 nathanw if (!tp)
1111 1.24.8.2 nathanw return;
1112 1.24.8.2 nathanw
1113 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
1114 1.24.8.2 nathanw sc->rptr = sc->wptr = sc->inbuf;
1115 1.24.8.2 nathanw sc->incnt = 0;
1116 1.24.8.2 nathanw return;
1117 1.24.8.2 nathanw }
1118 1.24.8.2 nathanw /*
1119 1.24.8.2 nathanw * empty buffer
1120 1.24.8.2 nathanw */
1121 1.24.8.2 nathanw mfcsxintr(unit);
1122 1.24.8.2 nathanw
1123 1.24.8.2 nathanw stat = ~sc->sc_regs->du_ip;
1124 1.24.8.2 nathanw last = sc->sc_mfc->last_ip;
1125 1.24.8.2 nathanw sc->sc_mfc->last_ip = stat;
1126 1.24.8.2 nathanw
1127 1.24.8.2 nathanw /*
1128 1.24.8.2 nathanw * check whether any interesting signal changed state
1129 1.24.8.2 nathanw */
1130 1.24.8.2 nathanw istat = stat ^ last;
1131 1.24.8.2 nathanw
1132 1.24.8.2 nathanw if ((istat & (0x10 << (unit & 1))) && /* CD changed */
1133 1.24.8.2 nathanw (SWFLAGS(tp->t_dev) & TIOCFLAG_SOFTCAR) == 0) {
1134 1.24.8.2 nathanw if (stat & (0x10 << (unit & 1)))
1135 1.24.8.2 nathanw tp->t_linesw->l_modem(tp, 1);
1136 1.24.8.2 nathanw else if (tp->t_linesw->l_modem(tp, 0) == 0) {
1137 1.24.8.2 nathanw sc->sc_regs->du_btrst = 0x0a << (unit & 1);
1138 1.24.8.2 nathanw }
1139 1.24.8.2 nathanw }
1140 1.24.8.2 nathanw }
1141