mfc.c revision 1.24.8.6 1 1.24.8.6 nathanw /* $NetBSD: mfc.c,v 1.24.8.6 2002/11/11 21:56:19 nathanw Exp $ */
2 1.24.8.2 nathanw
3 1.24.8.2 nathanw /*
4 1.24.8.2 nathanw * Copyright (c) 1994 Michael L. Hitch
5 1.24.8.2 nathanw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.24.8.2 nathanw * All rights reserved.
7 1.24.8.2 nathanw *
8 1.24.8.2 nathanw * Redistribution and use in source and binary forms, with or without
9 1.24.8.2 nathanw * modification, are permitted provided that the following conditions
10 1.24.8.2 nathanw * are met:
11 1.24.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
12 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer.
13 1.24.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
14 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
15 1.24.8.2 nathanw * documentation and/or other materials provided with the distribution.
16 1.24.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
17 1.24.8.2 nathanw * must display the following acknowledgement:
18 1.24.8.2 nathanw * This product includes software developed by the University of
19 1.24.8.2 nathanw * California, Berkeley and its contributors.
20 1.24.8.2 nathanw * 4. Neither the name of the University nor the names of its contributors
21 1.24.8.2 nathanw * may be used to endorse or promote products derived from this software
22 1.24.8.2 nathanw * without specific prior written permission.
23 1.24.8.2 nathanw *
24 1.24.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.24.8.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.24.8.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.24.8.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.24.8.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.24.8.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.24.8.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.24.8.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.24.8.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.24.8.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.24.8.2 nathanw * SUCH DAMAGE.
35 1.24.8.2 nathanw */
36 1.24.8.2 nathanw
37 1.24.8.2 nathanw #include "opt_kgdb.h"
38 1.24.8.2 nathanw
39 1.24.8.2 nathanw #include <sys/cdefs.h>
40 1.24.8.6 nathanw __KERNEL_RCSID(0, "$NetBSD: mfc.c,v 1.24.8.6 2002/11/11 21:56:19 nathanw Exp $");
41 1.24.8.2 nathanw
42 1.24.8.2 nathanw #include <sys/param.h>
43 1.24.8.2 nathanw #include <sys/systm.h>
44 1.24.8.2 nathanw #include <sys/kernel.h>
45 1.24.8.2 nathanw #include <sys/device.h>
46 1.24.8.2 nathanw #include <sys/tty.h>
47 1.24.8.2 nathanw #include <sys/proc.h>
48 1.24.8.2 nathanw #include <sys/file.h>
49 1.24.8.2 nathanw #include <sys/malloc.h>
50 1.24.8.2 nathanw #include <sys/uio.h>
51 1.24.8.2 nathanw #include <sys/kernel.h>
52 1.24.8.2 nathanw #include <sys/syslog.h>
53 1.24.8.2 nathanw #include <sys/queue.h>
54 1.24.8.4 nathanw #include <sys/conf.h>
55 1.24.8.2 nathanw #include <machine/cpu.h>
56 1.24.8.2 nathanw #include <amiga/amiga/device.h>
57 1.24.8.2 nathanw #include <amiga/amiga/isr.h>
58 1.24.8.2 nathanw #include <amiga/amiga/custom.h>
59 1.24.8.2 nathanw #include <amiga/amiga/cia.h>
60 1.24.8.2 nathanw #include <amiga/amiga/cc.h>
61 1.24.8.2 nathanw #include <amiga/dev/zbusvar.h>
62 1.24.8.2 nathanw
63 1.24.8.2 nathanw #include <dev/cons.h>
64 1.24.8.2 nathanw
65 1.24.8.2 nathanw #include "mfcs.h"
66 1.24.8.2 nathanw
67 1.24.8.2 nathanw #ifndef SEROBUF_SIZE
68 1.24.8.2 nathanw #define SEROBUF_SIZE 128
69 1.24.8.2 nathanw #endif
70 1.24.8.2 nathanw #ifndef SERIBUF_SIZE
71 1.24.8.2 nathanw #define SERIBUF_SIZE 1024
72 1.24.8.2 nathanw #endif
73 1.24.8.2 nathanw
74 1.24.8.2 nathanw #define splser() spl6()
75 1.24.8.2 nathanw
76 1.24.8.2 nathanw /*
77 1.24.8.2 nathanw * 68581 DUART registers
78 1.24.8.2 nathanw */
79 1.24.8.2 nathanw struct mfc_regs {
80 1.24.8.2 nathanw volatile u_char du_mr1a;
81 1.24.8.2 nathanw #define du_mr2a du_mr1a
82 1.24.8.2 nathanw u_char pad0;
83 1.24.8.2 nathanw volatile u_char du_csra;
84 1.24.8.2 nathanw #define du_sra du_csra
85 1.24.8.2 nathanw u_char pad2;
86 1.24.8.2 nathanw volatile u_char du_cra;
87 1.24.8.2 nathanw u_char pad4;
88 1.24.8.2 nathanw volatile u_char du_tba;
89 1.24.8.2 nathanw #define du_rba du_tba
90 1.24.8.2 nathanw u_char pad6;
91 1.24.8.2 nathanw volatile u_char du_acr;
92 1.24.8.2 nathanw #define du_ipcr du_acr
93 1.24.8.2 nathanw u_char pad8;
94 1.24.8.2 nathanw volatile u_char du_imr;
95 1.24.8.2 nathanw #define du_isr du_imr
96 1.24.8.2 nathanw u_char pad10;
97 1.24.8.2 nathanw volatile u_char du_ctur;
98 1.24.8.2 nathanw #define du_cmsb du_ctur
99 1.24.8.2 nathanw u_char pad12;
100 1.24.8.2 nathanw volatile u_char du_ctlr;
101 1.24.8.2 nathanw #define du_clsb du_ctlr
102 1.24.8.2 nathanw u_char pad14;
103 1.24.8.2 nathanw volatile u_char du_mr1b;
104 1.24.8.2 nathanw #define du_mr2b du_mr1b
105 1.24.8.2 nathanw u_char pad16;
106 1.24.8.2 nathanw volatile u_char du_csrb;
107 1.24.8.2 nathanw #define du_srb du_csrb
108 1.24.8.2 nathanw u_char pad18;
109 1.24.8.2 nathanw volatile u_char du_crb;
110 1.24.8.2 nathanw u_char pad20;
111 1.24.8.2 nathanw volatile u_char du_tbb;
112 1.24.8.2 nathanw #define du_rbb du_tbb
113 1.24.8.2 nathanw u_char pad22;
114 1.24.8.2 nathanw volatile u_char du_ivr;
115 1.24.8.2 nathanw u_char pad24;
116 1.24.8.2 nathanw volatile u_char du_opcr;
117 1.24.8.2 nathanw #define du_ip du_opcr
118 1.24.8.2 nathanw u_char pad26;
119 1.24.8.2 nathanw volatile u_char du_btst;
120 1.24.8.2 nathanw #define du_strc du_btst
121 1.24.8.2 nathanw u_char pad28;
122 1.24.8.2 nathanw volatile u_char du_btrst;
123 1.24.8.2 nathanw #define du_stpc du_btrst
124 1.24.8.2 nathanw u_char pad30;
125 1.24.8.2 nathanw };
126 1.24.8.2 nathanw
127 1.24.8.2 nathanw /*
128 1.24.8.2 nathanw * 68681 DUART serial port registers
129 1.24.8.2 nathanw */
130 1.24.8.2 nathanw struct duart_regs {
131 1.24.8.2 nathanw volatile u_char ch_mr1;
132 1.24.8.2 nathanw #define ch_mr2 ch_mr1
133 1.24.8.2 nathanw u_char pad0;
134 1.24.8.2 nathanw volatile u_char ch_csr;
135 1.24.8.2 nathanw #define ch_sr ch_csr
136 1.24.8.2 nathanw u_char pad1;
137 1.24.8.2 nathanw volatile u_char ch_cr;
138 1.24.8.2 nathanw u_char pad2;
139 1.24.8.2 nathanw volatile u_char ch_tb;
140 1.24.8.2 nathanw #define ch_rb ch_tb
141 1.24.8.2 nathanw u_char pad3;
142 1.24.8.2 nathanw };
143 1.24.8.2 nathanw
144 1.24.8.2 nathanw struct mfc_softc {
145 1.24.8.2 nathanw struct device sc_dev;
146 1.24.8.2 nathanw struct isr sc_isr;
147 1.24.8.2 nathanw struct mfc_regs *sc_regs;
148 1.24.8.2 nathanw u_long clk_frq;
149 1.24.8.2 nathanw u_short ct_val;
150 1.24.8.2 nathanw u_char ct_usecnt;
151 1.24.8.2 nathanw u_char imask;
152 1.24.8.2 nathanw u_char mfc_iii;
153 1.24.8.2 nathanw u_char last_ip;
154 1.24.8.2 nathanw };
155 1.24.8.2 nathanw
156 1.24.8.2 nathanw #if NMFCS > 0
157 1.24.8.2 nathanw struct mfcs_softc {
158 1.24.8.2 nathanw struct device sc_dev;
159 1.24.8.2 nathanw struct tty *sc_tty;
160 1.24.8.2 nathanw struct duart_regs *sc_duart;
161 1.24.8.2 nathanw struct mfc_regs *sc_regs;
162 1.24.8.2 nathanw struct mfc_softc *sc_mfc;
163 1.24.8.2 nathanw int swflags;
164 1.24.8.2 nathanw long flags; /* XXX */
165 1.24.8.2 nathanw #define CT_USED 1 /* CT in use */
166 1.24.8.2 nathanw u_short *rptr, *wptr, incnt, ovfl;
167 1.24.8.2 nathanw u_short inbuf[SERIBUF_SIZE];
168 1.24.8.2 nathanw char *ptr, *end;
169 1.24.8.2 nathanw char outbuf[SEROBUF_SIZE];
170 1.24.8.2 nathanw struct vbl_node vbl_node;
171 1.24.8.2 nathanw };
172 1.24.8.2 nathanw #endif
173 1.24.8.2 nathanw
174 1.24.8.2 nathanw #if NMFCP > 0
175 1.24.8.2 nathanw struct mfcp_softc {
176 1.24.8.2 nathanw };
177 1.24.8.2 nathanw #endif
178 1.24.8.2 nathanw
179 1.24.8.2 nathanw struct mfc_args {
180 1.24.8.2 nathanw struct zbus_args zargs;
181 1.24.8.2 nathanw char *subdev;
182 1.24.8.2 nathanw char unit;
183 1.24.8.2 nathanw };
184 1.24.8.2 nathanw
185 1.24.8.2 nathanw int mfcprint(void *auxp, const char *);
186 1.24.8.2 nathanw void mfcattach(struct device *, struct device *, void *);
187 1.24.8.2 nathanw int mfcmatch(struct device *, struct cfdata *, void *);
188 1.24.8.2 nathanw
189 1.24.8.2 nathanw #if NMFCS > 0
190 1.24.8.2 nathanw int mfcsmatch(struct device *, struct cfdata *, void *);
191 1.24.8.2 nathanw void mfcsattach(struct device *, struct device *, void *);
192 1.24.8.2 nathanw int mfcsparam( struct tty *, struct termios *);
193 1.24.8.2 nathanw int mfcshwiflow(struct tty *, int);
194 1.24.8.2 nathanw void mfcsstart(struct tty *);
195 1.24.8.2 nathanw int mfcsmctl(dev_t, int, int);
196 1.24.8.2 nathanw void mfcsxintr(int);
197 1.24.8.2 nathanw void mfcseint(int, int);
198 1.24.8.2 nathanw void mfcsmint(register int);
199 1.24.8.2 nathanw #endif
200 1.24.8.2 nathanw
201 1.24.8.2 nathanw #if NMFCP > 0
202 1.24.8.2 nathanw void mfcpattach(struct device *, struct device *, void *);
203 1.24.8.2 nathanw int mfcpmatch(struct device *, struct cfdata *, void *);
204 1.24.8.2 nathanw #endif
205 1.24.8.2 nathanw int mfcintr(void *);
206 1.24.8.2 nathanw
207 1.24.8.5 nathanw CFATTACH_DECL(mfc, sizeof(struct mfc_softc),
208 1.24.8.5 nathanw mfcmatch, mfcattach, NULL, NULL);
209 1.24.8.2 nathanw
210 1.24.8.2 nathanw #if NMFCS > 0
211 1.24.8.5 nathanw CFATTACH_DECL(mfcs, sizeof(struct mfcs_softc),
212 1.24.8.5 nathanw mfcsmatch, mfcsattach, NULL, NULL);
213 1.24.8.2 nathanw
214 1.24.8.2 nathanw extern struct cfdriver mfcs_cd;
215 1.24.8.2 nathanw #endif
216 1.24.8.2 nathanw
217 1.24.8.2 nathanw #if NMFCP > 0
218 1.24.8.5 nathanw CFATTACH_DECL(mfcp, sizeof(struct mfcp_softc),
219 1.24.8.5 nathanw mfcpmatch, mfcpattach, NULL, NULL);
220 1.24.8.2 nathanw #endif
221 1.24.8.2 nathanw
222 1.24.8.4 nathanw dev_type_open(mfcsopen);
223 1.24.8.4 nathanw dev_type_close(mfcsclose);
224 1.24.8.4 nathanw dev_type_read(mfcsread);
225 1.24.8.4 nathanw dev_type_write(mfcswrite);
226 1.24.8.4 nathanw dev_type_ioctl(mfcsioctl);
227 1.24.8.4 nathanw dev_type_stop(mfcsstop);
228 1.24.8.4 nathanw dev_type_tty(mfcstty);
229 1.24.8.4 nathanw dev_type_poll(mfcspoll);
230 1.24.8.4 nathanw
231 1.24.8.4 nathanw const struct cdevsw mfcs_cdevsw = {
232 1.24.8.4 nathanw mfcsopen, mfcsclose, mfcsread, mfcswrite, mfcsioctl,
233 1.24.8.6 nathanw mfcsstop, mfcstty, mfcspoll, nommap, ttykqfilter, D_TTY
234 1.24.8.4 nathanw };
235 1.24.8.2 nathanw
236 1.24.8.2 nathanw int mfcs_active;
237 1.24.8.2 nathanw int mfcsdefaultrate = 38400 /*TTYDEF_SPEED*/;
238 1.24.8.2 nathanw #define SWFLAGS(dev) (sc->swflags | (((dev) & 0x80) == 0 ? TIOCFLAG_SOFTCAR : 0))
239 1.24.8.2 nathanw
240 1.24.8.2 nathanw #ifdef notyet
241 1.24.8.2 nathanw /*
242 1.24.8.2 nathanw * MultiFaceCard III, II+ (not supported yet), and
243 1.24.8.2 nathanw * SerialMaster 500+ (not supported yet)
244 1.24.8.2 nathanw * baud rate tables for BRG set 1 [not used yet]
245 1.24.8.2 nathanw */
246 1.24.8.2 nathanw
247 1.24.8.2 nathanw struct speedtab mfcs3speedtab1[] = {
248 1.24.8.2 nathanw { 0, 0 },
249 1.24.8.2 nathanw { 100, 0x00 },
250 1.24.8.2 nathanw { 220, 0x11 },
251 1.24.8.2 nathanw { 600, 0x44 },
252 1.24.8.2 nathanw { 1200, 0x55 },
253 1.24.8.2 nathanw { 2400, 0x66 },
254 1.24.8.2 nathanw { 4800, 0x88 },
255 1.24.8.2 nathanw { 9600, 0x99 },
256 1.24.8.2 nathanw { 19200, 0xbb },
257 1.24.8.2 nathanw { 115200, 0xcc },
258 1.24.8.2 nathanw { -1, -1 }
259 1.24.8.2 nathanw };
260 1.24.8.2 nathanw
261 1.24.8.2 nathanw /*
262 1.24.8.2 nathanw * MultiFaceCard II, I, and SerialMaster 500
263 1.24.8.2 nathanw * baud rate tables for BRG set 1 [not used yet]
264 1.24.8.2 nathanw */
265 1.24.8.2 nathanw
266 1.24.8.2 nathanw struct speedtab mfcs2speedtab1[] = {
267 1.24.8.2 nathanw { 0, 0 },
268 1.24.8.2 nathanw { 50, 0x00 },
269 1.24.8.2 nathanw { 110, 0x11 },
270 1.24.8.2 nathanw { 300, 0x44 },
271 1.24.8.2 nathanw { 600, 0x55 },
272 1.24.8.2 nathanw { 1200, 0x66 },
273 1.24.8.2 nathanw { 2400, 0x88 },
274 1.24.8.2 nathanw { 4800, 0x99 },
275 1.24.8.2 nathanw { 9600, 0xbb },
276 1.24.8.2 nathanw { 38400, 0xcc },
277 1.24.8.2 nathanw { -1, -1 }
278 1.24.8.2 nathanw };
279 1.24.8.2 nathanw #endif
280 1.24.8.2 nathanw
281 1.24.8.2 nathanw /*
282 1.24.8.2 nathanw * MultiFaceCard III, II+ (not supported yet), and
283 1.24.8.2 nathanw * SerialMaster 500+ (not supported yet)
284 1.24.8.2 nathanw * baud rate tables for BRG set 2
285 1.24.8.2 nathanw */
286 1.24.8.2 nathanw
287 1.24.8.2 nathanw struct speedtab mfcs3speedtab2[] = {
288 1.24.8.2 nathanw { 0, 0 },
289 1.24.8.2 nathanw { 150, 0x00 },
290 1.24.8.2 nathanw { 200, 0x11 },
291 1.24.8.2 nathanw { 300, 0x33 },
292 1.24.8.2 nathanw { 600, 0x44 },
293 1.24.8.2 nathanw { 1200, 0x55 },
294 1.24.8.2 nathanw { 2400, 0x66 },
295 1.24.8.2 nathanw { 4800, 0x88 },
296 1.24.8.2 nathanw { 9600, 0x99 },
297 1.24.8.2 nathanw { 19200, 0xbb },
298 1.24.8.2 nathanw { 38400, 0xcc },
299 1.24.8.2 nathanw { -1, -1 }
300 1.24.8.2 nathanw };
301 1.24.8.2 nathanw
302 1.24.8.2 nathanw /*
303 1.24.8.2 nathanw * MultiFaceCard II, I, and SerialMaster 500
304 1.24.8.2 nathanw * baud rate tables for BRG set 2
305 1.24.8.2 nathanw */
306 1.24.8.2 nathanw
307 1.24.8.2 nathanw struct speedtab mfcs2speedtab2[] = {
308 1.24.8.2 nathanw { 0, 0 },
309 1.24.8.2 nathanw { 75, 0x00 },
310 1.24.8.2 nathanw { 100, 0x11 },
311 1.24.8.2 nathanw { 150, 0x33 },
312 1.24.8.2 nathanw { 300, 0x44 },
313 1.24.8.2 nathanw { 600, 0x55 },
314 1.24.8.2 nathanw { 1200, 0x66 },
315 1.24.8.2 nathanw { 2400, 0x88 },
316 1.24.8.2 nathanw { 4800, 0x99 },
317 1.24.8.2 nathanw { 9600, 0xbb },
318 1.24.8.2 nathanw { 19200, 0xcc },
319 1.24.8.2 nathanw { -1, -1 }
320 1.24.8.2 nathanw };
321 1.24.8.2 nathanw
322 1.24.8.2 nathanw /*
323 1.24.8.2 nathanw * if we are an bsc/Alf Data MultFaceCard (I, II, and III)
324 1.24.8.2 nathanw */
325 1.24.8.2 nathanw int
326 1.24.8.2 nathanw mfcmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
327 1.24.8.2 nathanw {
328 1.24.8.2 nathanw struct zbus_args *zap;
329 1.24.8.2 nathanw
330 1.24.8.2 nathanw zap = auxp;
331 1.24.8.2 nathanw if (zap->manid == 2092 &&
332 1.24.8.2 nathanw (zap->prodid == 16 || zap->prodid == 17 || zap->prodid == 18))
333 1.24.8.2 nathanw
334 1.24.8.2 nathanw return(1);
335 1.24.8.2 nathanw return(0);
336 1.24.8.2 nathanw }
337 1.24.8.2 nathanw
338 1.24.8.2 nathanw void
339 1.24.8.2 nathanw mfcattach(struct device *pdp, struct device *dp, void *auxp)
340 1.24.8.2 nathanw {
341 1.24.8.2 nathanw struct mfc_softc *scc;
342 1.24.8.2 nathanw struct zbus_args *zap;
343 1.24.8.2 nathanw struct mfc_args ma;
344 1.24.8.2 nathanw int unit;
345 1.24.8.2 nathanw struct mfc_regs *rp;
346 1.24.8.2 nathanw
347 1.24.8.2 nathanw zap = auxp;
348 1.24.8.2 nathanw
349 1.24.8.2 nathanw printf ("\n");
350 1.24.8.2 nathanw
351 1.24.8.2 nathanw scc = (struct mfc_softc *)dp;
352 1.24.8.2 nathanw unit = scc->sc_dev.dv_unit;
353 1.24.8.2 nathanw scc->sc_regs = rp = zap->va;
354 1.24.8.2 nathanw if (zap->prodid == 18)
355 1.24.8.2 nathanw scc->mfc_iii = 3;
356 1.24.8.2 nathanw scc->clk_frq = scc->mfc_iii ? 230400 : 115200;
357 1.24.8.2 nathanw
358 1.24.8.2 nathanw rp->du_opcr = 0x00; /* configure output port? */
359 1.24.8.2 nathanw rp->du_btrst = 0x0f; /* clear modem lines */
360 1.24.8.2 nathanw rp->du_ivr = 0; /* IVR */
361 1.24.8.2 nathanw rp->du_imr = 0; /* IMR */
362 1.24.8.2 nathanw rp->du_acr = 0xe0; /* baud rate generate set 2 */
363 1.24.8.2 nathanw rp->du_ctur = 0;
364 1.24.8.2 nathanw rp->du_ctlr = 4;
365 1.24.8.2 nathanw rp->du_csra = 0xcc; /* clock select = 38400 */
366 1.24.8.2 nathanw rp->du_cra = 0x10; /* reset mode register ptr */
367 1.24.8.2 nathanw rp->du_cra = 0x20;
368 1.24.8.2 nathanw rp->du_cra = 0x30;
369 1.24.8.2 nathanw rp->du_cra = 0x40;
370 1.24.8.2 nathanw rp->du_mr1a = 0x93; /* MRA1 */
371 1.24.8.2 nathanw rp->du_mr2a = 0x17; /* MRA2 */
372 1.24.8.2 nathanw rp->du_csrb = 0xcc; /* clock select = 38400 */
373 1.24.8.2 nathanw rp->du_crb = 0x10; /* reset mode register ptr */
374 1.24.8.2 nathanw rp->du_crb = 0x20;
375 1.24.8.2 nathanw rp->du_crb = 0x30;
376 1.24.8.2 nathanw rp->du_crb = 0x40;
377 1.24.8.2 nathanw rp->du_mr1b = 0x93; /* MRB1 */
378 1.24.8.2 nathanw rp->du_mr2b = 0x17; /* MRB2 */
379 1.24.8.2 nathanw rp->du_cra = 0x05; /* enable A Rx & Tx */
380 1.24.8.2 nathanw rp->du_crb = 0x05; /* enable B Rx & Tx */
381 1.24.8.2 nathanw
382 1.24.8.2 nathanw scc->sc_isr.isr_intr = mfcintr;
383 1.24.8.2 nathanw scc->sc_isr.isr_arg = scc;
384 1.24.8.2 nathanw scc->sc_isr.isr_ipl = 6;
385 1.24.8.2 nathanw add_isr(&scc->sc_isr);
386 1.24.8.2 nathanw
387 1.24.8.2 nathanw /* configure ports */
388 1.24.8.2 nathanw bcopy(zap, &ma.zargs, sizeof(struct zbus_args));
389 1.24.8.2 nathanw ma.subdev = "mfcs";
390 1.24.8.2 nathanw ma.unit = unit * 2;
391 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
392 1.24.8.2 nathanw ma.unit = unit * 2 + 1;
393 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
394 1.24.8.2 nathanw ma.subdev = "mfcp";
395 1.24.8.2 nathanw ma.unit = unit;
396 1.24.8.2 nathanw config_found(dp, &ma, mfcprint);
397 1.24.8.2 nathanw }
398 1.24.8.2 nathanw
399 1.24.8.2 nathanw /*
400 1.24.8.2 nathanw *
401 1.24.8.2 nathanw */
402 1.24.8.2 nathanw int
403 1.24.8.2 nathanw mfcsmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
404 1.24.8.2 nathanw {
405 1.24.8.2 nathanw struct mfc_args *ma;
406 1.24.8.2 nathanw
407 1.24.8.2 nathanw ma = auxp;
408 1.24.8.2 nathanw if (strcmp(ma->subdev, "mfcs") == 0)
409 1.24.8.2 nathanw return (1);
410 1.24.8.2 nathanw return (0);
411 1.24.8.2 nathanw }
412 1.24.8.2 nathanw
413 1.24.8.2 nathanw void
414 1.24.8.2 nathanw mfcsattach(struct device *pdp, struct device *dp, void *auxp)
415 1.24.8.2 nathanw {
416 1.24.8.2 nathanw int unit;
417 1.24.8.2 nathanw struct mfcs_softc *sc;
418 1.24.8.2 nathanw struct mfc_softc *scc;
419 1.24.8.2 nathanw struct mfc_args *ma;
420 1.24.8.2 nathanw struct mfc_regs *rp;
421 1.24.8.2 nathanw
422 1.24.8.2 nathanw sc = (struct mfcs_softc *) dp;
423 1.24.8.2 nathanw scc = (struct mfc_softc *) pdp;
424 1.24.8.2 nathanw ma = auxp;
425 1.24.8.2 nathanw
426 1.24.8.2 nathanw if (dp) {
427 1.24.8.2 nathanw printf (": input fifo %d output fifo %d\n", SERIBUF_SIZE,
428 1.24.8.2 nathanw SEROBUF_SIZE);
429 1.24.8.2 nathanw alloc_sicallback();
430 1.24.8.2 nathanw }
431 1.24.8.2 nathanw
432 1.24.8.2 nathanw unit = ma->unit;
433 1.24.8.2 nathanw mfcs_active |= 1 << unit;
434 1.24.8.2 nathanw sc->rptr = sc->wptr = sc->inbuf;
435 1.24.8.2 nathanw sc->sc_mfc = scc;
436 1.24.8.2 nathanw sc->sc_regs = rp = scc->sc_regs;
437 1.24.8.2 nathanw sc->sc_duart = (struct duart_regs *) ((unit & 1) ? &rp->du_mr1b :
438 1.24.8.2 nathanw &rp->du_mr1a);
439 1.24.8.2 nathanw /*
440 1.24.8.2 nathanw * should have only one vbl routine to handle all ports?
441 1.24.8.2 nathanw */
442 1.24.8.2 nathanw sc->vbl_node.function = (void (*) (void *)) mfcsmint;
443 1.24.8.2 nathanw sc->vbl_node.data = (void *) unit;
444 1.24.8.2 nathanw add_vbl_function(&sc->vbl_node, 1, (void *) unit);
445 1.24.8.2 nathanw }
446 1.24.8.2 nathanw
447 1.24.8.2 nathanw /*
448 1.24.8.2 nathanw * print diag if pnp is NULL else just extra
449 1.24.8.2 nathanw */
450 1.24.8.2 nathanw int
451 1.24.8.2 nathanw mfcprint(void *auxp, const char *pnp)
452 1.24.8.2 nathanw {
453 1.24.8.2 nathanw if (pnp == NULL)
454 1.24.8.2 nathanw return(UNCONF);
455 1.24.8.2 nathanw return(QUIET);
456 1.24.8.2 nathanw }
457 1.24.8.2 nathanw
458 1.24.8.2 nathanw int
459 1.24.8.2 nathanw mfcsopen(dev_t dev, int flag, int mode, struct proc *p)
460 1.24.8.2 nathanw {
461 1.24.8.2 nathanw struct tty *tp;
462 1.24.8.2 nathanw struct mfcs_softc *sc;
463 1.24.8.2 nathanw int unit, error, s;
464 1.24.8.2 nathanw
465 1.24.8.2 nathanw error = 0;
466 1.24.8.2 nathanw unit = dev & 0x1f;
467 1.24.8.2 nathanw
468 1.24.8.2 nathanw if (unit >= mfcs_cd.cd_ndevs || (mfcs_active & (1 << unit)) == 0)
469 1.24.8.2 nathanw return (ENXIO);
470 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
471 1.24.8.2 nathanw
472 1.24.8.2 nathanw s = spltty();
473 1.24.8.2 nathanw
474 1.24.8.2 nathanw if (sc->sc_tty)
475 1.24.8.2 nathanw tp = sc->sc_tty;
476 1.24.8.2 nathanw else {
477 1.24.8.2 nathanw tp = sc->sc_tty = ttymalloc();
478 1.24.8.2 nathanw tty_attach(tp);
479 1.24.8.2 nathanw }
480 1.24.8.2 nathanw
481 1.24.8.2 nathanw tp->t_oproc = (void (*) (struct tty *)) mfcsstart;
482 1.24.8.2 nathanw tp->t_param = mfcsparam;
483 1.24.8.2 nathanw tp->t_dev = dev;
484 1.24.8.2 nathanw tp->t_hwiflow = mfcshwiflow;
485 1.24.8.2 nathanw
486 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
487 1.24.8.2 nathanw ttychars(tp);
488 1.24.8.2 nathanw if (tp->t_ispeed == 0) {
489 1.24.8.2 nathanw /*
490 1.24.8.2 nathanw * only when cleared do we reset to defaults.
491 1.24.8.2 nathanw */
492 1.24.8.2 nathanw tp->t_iflag = TTYDEF_IFLAG;
493 1.24.8.2 nathanw tp->t_oflag = TTYDEF_OFLAG;
494 1.24.8.2 nathanw tp->t_cflag = TTYDEF_CFLAG;
495 1.24.8.2 nathanw tp->t_lflag = TTYDEF_LFLAG;
496 1.24.8.2 nathanw tp->t_ispeed = tp->t_ospeed = mfcsdefaultrate;
497 1.24.8.2 nathanw }
498 1.24.8.2 nathanw /*
499 1.24.8.2 nathanw * do these all the time
500 1.24.8.2 nathanw */
501 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_CLOCAL)
502 1.24.8.2 nathanw tp->t_cflag |= CLOCAL;
503 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_CRTSCTS)
504 1.24.8.2 nathanw tp->t_cflag |= CRTSCTS;
505 1.24.8.2 nathanw if (sc->swflags & TIOCFLAG_MDMBUF)
506 1.24.8.2 nathanw tp->t_cflag |= MDMBUF;
507 1.24.8.2 nathanw mfcsparam(tp, &tp->t_termios);
508 1.24.8.2 nathanw ttsetwater(tp);
509 1.24.8.2 nathanw
510 1.24.8.2 nathanw (void)mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMSET);
511 1.24.8.2 nathanw if ((SWFLAGS(dev) & TIOCFLAG_SOFTCAR) ||
512 1.24.8.2 nathanw (mfcsmctl(dev, 0, DMGET) & TIOCM_CD))
513 1.24.8.2 nathanw tp->t_state |= TS_CARR_ON;
514 1.24.8.2 nathanw else
515 1.24.8.2 nathanw tp->t_state &= ~TS_CARR_ON;
516 1.24.8.2 nathanw } else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0) {
517 1.24.8.2 nathanw splx(s);
518 1.24.8.2 nathanw return(EBUSY);
519 1.24.8.2 nathanw }
520 1.24.8.2 nathanw
521 1.24.8.2 nathanw /*
522 1.24.8.2 nathanw * if NONBLOCK requested, ignore carrier
523 1.24.8.2 nathanw */
524 1.24.8.2 nathanw if (flag & O_NONBLOCK)
525 1.24.8.2 nathanw goto done;
526 1.24.8.2 nathanw
527 1.24.8.2 nathanw /*
528 1.24.8.2 nathanw * block waiting for carrier
529 1.24.8.2 nathanw */
530 1.24.8.2 nathanw while ((tp->t_state & TS_CARR_ON) == 0 && (tp->t_cflag & CLOCAL) == 0) {
531 1.24.8.2 nathanw tp->t_wopen++;
532 1.24.8.2 nathanw error = ttysleep(tp, (caddr_t)&tp->t_rawq,
533 1.24.8.2 nathanw TTIPRI | PCATCH, ttopen, 0);
534 1.24.8.2 nathanw tp->t_wopen--;
535 1.24.8.2 nathanw if (error) {
536 1.24.8.2 nathanw splx(s);
537 1.24.8.2 nathanw return(error);
538 1.24.8.2 nathanw }
539 1.24.8.2 nathanw }
540 1.24.8.2 nathanw done:
541 1.24.8.2 nathanw /* This is a way to handle lost XON characters */
542 1.24.8.2 nathanw if ((flag & O_TRUNC) && (tp->t_state & TS_TTSTOP)) {
543 1.24.8.2 nathanw tp->t_state &= ~TS_TTSTOP;
544 1.24.8.2 nathanw ttstart (tp);
545 1.24.8.2 nathanw }
546 1.24.8.2 nathanw
547 1.24.8.2 nathanw splx(s);
548 1.24.8.2 nathanw /*
549 1.24.8.2 nathanw * Reset the tty pointer, as there could have been a dialout
550 1.24.8.2 nathanw * use of the tty with a dialin open waiting.
551 1.24.8.2 nathanw */
552 1.24.8.2 nathanw tp->t_dev = dev;
553 1.24.8.2 nathanw return tp->t_linesw->l_open(dev, tp);
554 1.24.8.2 nathanw }
555 1.24.8.2 nathanw
556 1.24.8.2 nathanw /*ARGSUSED*/
557 1.24.8.2 nathanw int
558 1.24.8.2 nathanw mfcsclose(dev_t dev, int flag, int mode, struct proc *p)
559 1.24.8.2 nathanw {
560 1.24.8.2 nathanw struct tty *tp;
561 1.24.8.2 nathanw int unit;
562 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
563 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
564 1.24.8.2 nathanw
565 1.24.8.2 nathanw unit = dev & 31;
566 1.24.8.2 nathanw
567 1.24.8.2 nathanw tp = sc->sc_tty;
568 1.24.8.2 nathanw tp->t_linesw->l_close(tp, flag);
569 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x70; /* stop break */
570 1.24.8.2 nathanw
571 1.24.8.2 nathanw scc->imask &= ~(0x7 << ((unit & 1) * 4));
572 1.24.8.2 nathanw scc->sc_regs->du_imr = scc->imask;
573 1.24.8.2 nathanw if (sc->flags & CT_USED) {
574 1.24.8.2 nathanw --scc->ct_usecnt;
575 1.24.8.2 nathanw sc->flags &= ~CT_USED;
576 1.24.8.2 nathanw }
577 1.24.8.2 nathanw
578 1.24.8.2 nathanw /*
579 1.24.8.2 nathanw * If the device is closed, it's close, no matter whether we deal with
580 1.24.8.2 nathanw * modem control signals nor not.
581 1.24.8.2 nathanw */
582 1.24.8.2 nathanw #if 0
583 1.24.8.2 nathanw if (tp->t_cflag & HUPCL || tp->t_wopen != 0 ||
584 1.24.8.2 nathanw (tp->t_state & TS_ISOPEN) == 0)
585 1.24.8.2 nathanw #endif
586 1.24.8.2 nathanw (void) mfcsmctl(dev, 0, DMSET);
587 1.24.8.2 nathanw ttyclose(tp);
588 1.24.8.2 nathanw #if not_yet
589 1.24.8.2 nathanw if (tp != &mfcs_cons) {
590 1.24.8.2 nathanw remove_vbl_function(&sc->vbl_node);
591 1.24.8.2 nathanw ttyfree(tp);
592 1.24.8.2 nathanw sc->sc_tty = (struct tty *) NULL;
593 1.24.8.2 nathanw }
594 1.24.8.2 nathanw #endif
595 1.24.8.2 nathanw return (0);
596 1.24.8.2 nathanw }
597 1.24.8.2 nathanw
598 1.24.8.2 nathanw int
599 1.24.8.2 nathanw mfcsread(dev_t dev, struct uio *uio, int flag)
600 1.24.8.2 nathanw {
601 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
602 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
603 1.24.8.2 nathanw if (tp == NULL)
604 1.24.8.2 nathanw return(ENXIO);
605 1.24.8.2 nathanw return tp->t_linesw->l_read(tp, uio, flag);
606 1.24.8.2 nathanw }
607 1.24.8.2 nathanw
608 1.24.8.2 nathanw int
609 1.24.8.2 nathanw mfcswrite(dev_t dev, struct uio *uio, int flag)
610 1.24.8.2 nathanw {
611 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
612 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
613 1.24.8.2 nathanw
614 1.24.8.2 nathanw if (tp == NULL)
615 1.24.8.2 nathanw return(ENXIO);
616 1.24.8.2 nathanw return tp->t_linesw->l_write(tp, uio, flag);
617 1.24.8.2 nathanw }
618 1.24.8.2 nathanw
619 1.24.8.2 nathanw int
620 1.24.8.2 nathanw mfcspoll(dev_t dev, int events, struct proc *p)
621 1.24.8.2 nathanw {
622 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
623 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
624 1.24.8.2 nathanw
625 1.24.8.2 nathanw if (tp == NULL)
626 1.24.8.2 nathanw return(ENXIO);
627 1.24.8.2 nathanw return ((*tp->t_linesw->l_poll)(tp, events, p));
628 1.24.8.2 nathanw }
629 1.24.8.2 nathanw
630 1.24.8.2 nathanw struct tty *
631 1.24.8.2 nathanw mfcstty(dev_t dev)
632 1.24.8.2 nathanw {
633 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
634 1.24.8.2 nathanw
635 1.24.8.2 nathanw return (sc->sc_tty);
636 1.24.8.2 nathanw }
637 1.24.8.2 nathanw
638 1.24.8.2 nathanw int
639 1.24.8.2 nathanw mfcsioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
640 1.24.8.2 nathanw {
641 1.24.8.2 nathanw register struct tty *tp;
642 1.24.8.2 nathanw register int error;
643 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
644 1.24.8.2 nathanw
645 1.24.8.2 nathanw tp = sc->sc_tty;
646 1.24.8.2 nathanw if (!tp)
647 1.24.8.2 nathanw return ENXIO;
648 1.24.8.2 nathanw
649 1.24.8.2 nathanw error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, p);
650 1.24.8.3 nathanw if (error != EPASSTHROUGH)
651 1.24.8.2 nathanw return(error);
652 1.24.8.2 nathanw
653 1.24.8.2 nathanw error = ttioctl(tp, cmd, data, flag, p);
654 1.24.8.3 nathanw if (error != EPASSTHROUGH)
655 1.24.8.2 nathanw return(error);
656 1.24.8.2 nathanw
657 1.24.8.2 nathanw switch (cmd) {
658 1.24.8.2 nathanw case TIOCSBRK:
659 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x60; /* start break */
660 1.24.8.2 nathanw break;
661 1.24.8.2 nathanw
662 1.24.8.2 nathanw case TIOCCBRK:
663 1.24.8.2 nathanw sc->sc_duart->ch_cr = 0x70; /* stop break */
664 1.24.8.2 nathanw break;
665 1.24.8.2 nathanw
666 1.24.8.2 nathanw case TIOCSDTR:
667 1.24.8.2 nathanw (void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIS);
668 1.24.8.2 nathanw break;
669 1.24.8.2 nathanw
670 1.24.8.2 nathanw case TIOCCDTR:
671 1.24.8.2 nathanw (void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIC);
672 1.24.8.2 nathanw break;
673 1.24.8.2 nathanw
674 1.24.8.2 nathanw case TIOCMSET:
675 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMSET);
676 1.24.8.2 nathanw break;
677 1.24.8.2 nathanw
678 1.24.8.2 nathanw case TIOCMBIS:
679 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMBIS);
680 1.24.8.2 nathanw break;
681 1.24.8.2 nathanw
682 1.24.8.2 nathanw case TIOCMBIC:
683 1.24.8.2 nathanw (void) mfcsmctl(dev, *(int *) data, DMBIC);
684 1.24.8.2 nathanw break;
685 1.24.8.2 nathanw
686 1.24.8.2 nathanw case TIOCMGET:
687 1.24.8.2 nathanw *(int *)data = mfcsmctl(dev, 0, DMGET);
688 1.24.8.2 nathanw break;
689 1.24.8.2 nathanw case TIOCGFLAGS:
690 1.24.8.2 nathanw *(int *)data = SWFLAGS(dev);
691 1.24.8.2 nathanw break;
692 1.24.8.2 nathanw case TIOCSFLAGS:
693 1.24.8.2 nathanw error = suser(p->p_ucred, &p->p_acflag);
694 1.24.8.2 nathanw if (error != 0)
695 1.24.8.2 nathanw return(EPERM);
696 1.24.8.2 nathanw
697 1.24.8.2 nathanw sc->swflags = *(int *)data;
698 1.24.8.2 nathanw sc->swflags &= /* only allow valid flags */
699 1.24.8.2 nathanw (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | TIOCFLAG_CRTSCTS);
700 1.24.8.2 nathanw /* XXXX need to change duart parameters? */
701 1.24.8.2 nathanw break;
702 1.24.8.2 nathanw default:
703 1.24.8.3 nathanw return(EPASSTHROUGH);
704 1.24.8.2 nathanw }
705 1.24.8.2 nathanw
706 1.24.8.2 nathanw return(0);
707 1.24.8.2 nathanw }
708 1.24.8.2 nathanw
709 1.24.8.2 nathanw int
710 1.24.8.2 nathanw mfcsparam(struct tty *tp, struct termios *t)
711 1.24.8.2 nathanw {
712 1.24.8.2 nathanw int cflag, unit, ospeed;
713 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
714 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
715 1.24.8.2 nathanw
716 1.24.8.2 nathanw cflag = t->c_cflag;
717 1.24.8.2 nathanw unit = tp->t_dev & 31;
718 1.24.8.2 nathanw if (sc->flags & CT_USED) {
719 1.24.8.2 nathanw --scc->ct_usecnt;
720 1.24.8.2 nathanw sc->flags &= ~CT_USED;
721 1.24.8.2 nathanw }
722 1.24.8.2 nathanw ospeed = ttspeedtab(t->c_ospeed, scc->mfc_iii ? mfcs3speedtab2 :
723 1.24.8.2 nathanw mfcs2speedtab2);
724 1.24.8.2 nathanw
725 1.24.8.2 nathanw /*
726 1.24.8.2 nathanw * If Baud Rate Generator can't generate requested speed,
727 1.24.8.2 nathanw * try to use the counter/timer.
728 1.24.8.2 nathanw */
729 1.24.8.2 nathanw if (ospeed < 0 && (scc->clk_frq % t->c_ospeed) == 0) {
730 1.24.8.2 nathanw ospeed = scc->clk_frq / t->c_ospeed; /* divisor */
731 1.24.8.2 nathanw if (scc->ct_usecnt > 0 && scc->ct_val != ospeed)
732 1.24.8.2 nathanw ospeed = -1;
733 1.24.8.2 nathanw else {
734 1.24.8.2 nathanw scc->sc_regs->du_ctur = ospeed >> 8;
735 1.24.8.2 nathanw scc->sc_regs->du_ctlr = ospeed;
736 1.24.8.2 nathanw scc->ct_val = ospeed;
737 1.24.8.2 nathanw ++scc->ct_usecnt;
738 1.24.8.2 nathanw sc->flags |= CT_USED;
739 1.24.8.2 nathanw ospeed = 0xdd;
740 1.24.8.2 nathanw }
741 1.24.8.2 nathanw }
742 1.24.8.2 nathanw /* XXXX 68681 duart could handle split speeds */
743 1.24.8.2 nathanw if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
744 1.24.8.2 nathanw return(EINVAL);
745 1.24.8.2 nathanw
746 1.24.8.2 nathanw /* XXXX handle parity, character size, stop bits, flow control */
747 1.24.8.2 nathanw
748 1.24.8.2 nathanw /*
749 1.24.8.2 nathanw * copy to tty
750 1.24.8.2 nathanw */
751 1.24.8.2 nathanw tp->t_ispeed = t->c_ispeed;
752 1.24.8.2 nathanw tp->t_ospeed = t->c_ospeed;
753 1.24.8.2 nathanw tp->t_cflag = cflag;
754 1.24.8.2 nathanw
755 1.24.8.2 nathanw /*
756 1.24.8.2 nathanw * enable interrupts
757 1.24.8.2 nathanw */
758 1.24.8.2 nathanw scc->imask |= (0x2 << ((unit & 1) * 4)) | 0x80;
759 1.24.8.2 nathanw scc->sc_regs->du_imr = scc->imask;
760 1.24.8.2 nathanw #if defined(DEBUG) && 0
761 1.24.8.2 nathanw printf("mfcsparam: speed %d => %x ct %d imask %x cflag %x\n",
762 1.24.8.2 nathanw t->c_ospeed, ospeed, scc->ct_val, scc->imask, cflag);
763 1.24.8.2 nathanw #endif
764 1.24.8.2 nathanw if (ospeed == 0)
765 1.24.8.2 nathanw (void)mfcsmctl(tp->t_dev, 0, DMSET); /* hang up line */
766 1.24.8.2 nathanw else {
767 1.24.8.2 nathanw /*
768 1.24.8.2 nathanw * (re)enable DTR
769 1.24.8.2 nathanw * and set baud rate. (8 bit mode)
770 1.24.8.2 nathanw */
771 1.24.8.2 nathanw (void)mfcsmctl(tp->t_dev, TIOCM_DTR | TIOCM_RTS, DMSET);
772 1.24.8.2 nathanw sc->sc_duart->ch_csr = ospeed;
773 1.24.8.2 nathanw }
774 1.24.8.2 nathanw return(0);
775 1.24.8.2 nathanw }
776 1.24.8.2 nathanw
777 1.24.8.2 nathanw int
778 1.24.8.2 nathanw mfcshwiflow(struct tty *tp, int flag)
779 1.24.8.2 nathanw {
780 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
781 1.24.8.2 nathanw int unit = tp->t_dev & 1;
782 1.24.8.2 nathanw
783 1.24.8.2 nathanw if (flag)
784 1.24.8.2 nathanw sc->sc_regs->du_btrst = 1 << unit;
785 1.24.8.2 nathanw else
786 1.24.8.2 nathanw sc->sc_regs->du_btst = 1 << unit;
787 1.24.8.2 nathanw return 1;
788 1.24.8.2 nathanw }
789 1.24.8.2 nathanw
790 1.24.8.2 nathanw void
791 1.24.8.2 nathanw mfcsstart(struct tty *tp)
792 1.24.8.2 nathanw {
793 1.24.8.2 nathanw int cc, s, unit;
794 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
795 1.24.8.2 nathanw struct mfc_softc *scc= sc->sc_mfc;
796 1.24.8.2 nathanw
797 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0)
798 1.24.8.2 nathanw return;
799 1.24.8.2 nathanw
800 1.24.8.2 nathanw unit = tp->t_dev & 1;
801 1.24.8.2 nathanw
802 1.24.8.2 nathanw s = splser();
803 1.24.8.2 nathanw if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP))
804 1.24.8.2 nathanw goto out;
805 1.24.8.2 nathanw
806 1.24.8.2 nathanw cc = tp->t_outq.c_cc;
807 1.24.8.2 nathanw if (cc <= tp->t_lowat) {
808 1.24.8.2 nathanw if (tp->t_state & TS_ASLEEP) {
809 1.24.8.2 nathanw tp->t_state &= ~TS_ASLEEP;
810 1.24.8.2 nathanw wakeup((caddr_t) & tp->t_outq);
811 1.24.8.2 nathanw }
812 1.24.8.2 nathanw selwakeup(&tp->t_wsel);
813 1.24.8.2 nathanw }
814 1.24.8.2 nathanw if (cc == 0 || (tp->t_state & TS_BUSY))
815 1.24.8.2 nathanw goto out;
816 1.24.8.2 nathanw
817 1.24.8.2 nathanw /*
818 1.24.8.2 nathanw * We only do bulk transfers if using CTSRTS flow control, not for
819 1.24.8.2 nathanw * (probably sloooow) ixon/ixoff devices.
820 1.24.8.2 nathanw */
821 1.24.8.2 nathanw if ((tp->t_cflag & CRTSCTS) == 0)
822 1.24.8.2 nathanw cc = 1;
823 1.24.8.2 nathanw
824 1.24.8.2 nathanw /*
825 1.24.8.2 nathanw * Limit the amount of output we do in one burst
826 1.24.8.2 nathanw * to prevent hogging the CPU.
827 1.24.8.2 nathanw */
828 1.24.8.2 nathanw if (cc > SEROBUF_SIZE)
829 1.24.8.2 nathanw cc = SEROBUF_SIZE;
830 1.24.8.2 nathanw cc = q_to_b(&tp->t_outq, sc->outbuf, cc);
831 1.24.8.2 nathanw if (cc > 0) {
832 1.24.8.2 nathanw tp->t_state |= TS_BUSY;
833 1.24.8.2 nathanw
834 1.24.8.2 nathanw sc->ptr = sc->outbuf;
835 1.24.8.2 nathanw sc->end = sc->outbuf + cc;
836 1.24.8.2 nathanw
837 1.24.8.2 nathanw /*
838 1.24.8.2 nathanw * Get first character out, then have TBE-interrupts blow out
839 1.24.8.2 nathanw * further characters, until buffer is empty, and TS_BUSY gets
840 1.24.8.2 nathanw * cleared.
841 1.24.8.2 nathanw */
842 1.24.8.2 nathanw sc->sc_duart->ch_tb = *sc->ptr++;
843 1.24.8.2 nathanw scc->imask |= 1 << (unit * 4);
844 1.24.8.2 nathanw sc->sc_regs->du_imr = scc->imask;
845 1.24.8.2 nathanw }
846 1.24.8.2 nathanw out:
847 1.24.8.2 nathanw splx(s);
848 1.24.8.2 nathanw }
849 1.24.8.2 nathanw
850 1.24.8.2 nathanw /*
851 1.24.8.2 nathanw * Stop output on a line.
852 1.24.8.2 nathanw */
853 1.24.8.2 nathanw /*ARGSUSED*/
854 1.24.8.2 nathanw void
855 1.24.8.2 nathanw mfcsstop(struct tty *tp, int flag)
856 1.24.8.2 nathanw {
857 1.24.8.2 nathanw int s;
858 1.24.8.2 nathanw
859 1.24.8.2 nathanw s = splser();
860 1.24.8.2 nathanw if (tp->t_state & TS_BUSY) {
861 1.24.8.2 nathanw if ((tp->t_state & TS_TTSTOP) == 0)
862 1.24.8.2 nathanw tp->t_state |= TS_FLUSH;
863 1.24.8.2 nathanw }
864 1.24.8.2 nathanw splx(s);
865 1.24.8.2 nathanw }
866 1.24.8.2 nathanw
867 1.24.8.2 nathanw int
868 1.24.8.2 nathanw mfcsmctl(dev_t dev, int bits, int how)
869 1.24.8.2 nathanw {
870 1.24.8.2 nathanw int unit, s;
871 1.24.8.2 nathanw u_char ub = 0;
872 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
873 1.24.8.2 nathanw
874 1.24.8.2 nathanw unit = dev & 1;
875 1.24.8.2 nathanw
876 1.24.8.2 nathanw /*
877 1.24.8.2 nathanw * convert TIOCM* mask into CIA mask
878 1.24.8.2 nathanw * which is active low
879 1.24.8.2 nathanw */
880 1.24.8.2 nathanw if (how != DMGET) {
881 1.24.8.2 nathanw /*
882 1.24.8.2 nathanw * need to save current state of DTR & RTS ?
883 1.24.8.2 nathanw */
884 1.24.8.2 nathanw if (bits & TIOCM_DTR)
885 1.24.8.2 nathanw ub |= 0x04 << unit;
886 1.24.8.2 nathanw if (bits & TIOCM_RTS)
887 1.24.8.2 nathanw ub |= 0x01 << unit;
888 1.24.8.2 nathanw }
889 1.24.8.2 nathanw s = splser();
890 1.24.8.2 nathanw switch (how) {
891 1.24.8.2 nathanw case DMSET:
892 1.24.8.2 nathanw sc->sc_regs->du_btst = ub;
893 1.24.8.2 nathanw sc->sc_regs->du_btrst = ub ^ (0x05 << unit);
894 1.24.8.2 nathanw break;
895 1.24.8.2 nathanw
896 1.24.8.2 nathanw case DMBIC:
897 1.24.8.2 nathanw sc->sc_regs->du_btrst = ub;
898 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
899 1.24.8.2 nathanw break;
900 1.24.8.2 nathanw
901 1.24.8.2 nathanw case DMBIS:
902 1.24.8.2 nathanw sc->sc_regs->du_btst = ub;
903 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
904 1.24.8.2 nathanw break;
905 1.24.8.2 nathanw
906 1.24.8.2 nathanw case DMGET:
907 1.24.8.2 nathanw ub = ~sc->sc_regs->du_ip;
908 1.24.8.2 nathanw break;
909 1.24.8.2 nathanw }
910 1.24.8.2 nathanw (void)splx(s);
911 1.24.8.2 nathanw
912 1.24.8.2 nathanw /* XXXX should keep DTR & RTS states in softc? */
913 1.24.8.2 nathanw bits = TIOCM_DTR | TIOCM_RTS;
914 1.24.8.2 nathanw if (ub & (1 << unit))
915 1.24.8.2 nathanw bits |= TIOCM_CTS;
916 1.24.8.2 nathanw if (ub & (4 << unit))
917 1.24.8.2 nathanw bits |= TIOCM_DSR;
918 1.24.8.2 nathanw if (ub & (0x10 << unit))
919 1.24.8.2 nathanw bits |= TIOCM_CD;
920 1.24.8.2 nathanw /* XXXX RI is not supported on all boards */
921 1.24.8.2 nathanw if (sc->sc_regs->pad26 & (1 << unit))
922 1.24.8.2 nathanw bits |= TIOCM_RI;
923 1.24.8.2 nathanw
924 1.24.8.2 nathanw return(bits);
925 1.24.8.2 nathanw }
926 1.24.8.2 nathanw
927 1.24.8.2 nathanw /*
928 1.24.8.2 nathanw * Level 6 interrupt processing for the MultiFaceCard 68681 DUART
929 1.24.8.2 nathanw */
930 1.24.8.2 nathanw
931 1.24.8.2 nathanw int
932 1.24.8.2 nathanw mfcintr(void *arg)
933 1.24.8.2 nathanw {
934 1.24.8.2 nathanw struct mfc_softc *scc = arg;
935 1.24.8.2 nathanw struct mfcs_softc *sc;
936 1.24.8.2 nathanw struct mfc_regs *regs;
937 1.24.8.2 nathanw struct tty *tp;
938 1.24.8.2 nathanw int istat, unit;
939 1.24.8.2 nathanw u_short c;
940 1.24.8.2 nathanw
941 1.24.8.2 nathanw regs = scc->sc_regs;
942 1.24.8.2 nathanw istat = regs->du_isr & scc->imask;
943 1.24.8.2 nathanw if (istat == 0)
944 1.24.8.2 nathanw return (0);
945 1.24.8.2 nathanw unit = scc->sc_dev.dv_unit * 2;
946 1.24.8.2 nathanw if (istat & 0x02) { /* channel A receive interrupt */
947 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
948 1.24.8.2 nathanw while (1) {
949 1.24.8.2 nathanw c = regs->du_sra << 8;
950 1.24.8.2 nathanw if ((c & 0x0100) == 0)
951 1.24.8.2 nathanw break;
952 1.24.8.2 nathanw c |= regs->du_rba;
953 1.24.8.2 nathanw if (sc->incnt == SERIBUF_SIZE)
954 1.24.8.2 nathanw ++sc->ovfl;
955 1.24.8.2 nathanw else {
956 1.24.8.2 nathanw *sc->wptr++ = c;
957 1.24.8.2 nathanw if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
958 1.24.8.2 nathanw sc->wptr = sc->inbuf;
959 1.24.8.2 nathanw ++sc->incnt;
960 1.24.8.2 nathanw if (sc->incnt > SERIBUF_SIZE - 16)
961 1.24.8.2 nathanw regs->du_btrst = 1;
962 1.24.8.2 nathanw }
963 1.24.8.2 nathanw if (c & 0x1000)
964 1.24.8.2 nathanw regs->du_cra = 0x40;
965 1.24.8.2 nathanw }
966 1.24.8.2 nathanw }
967 1.24.8.2 nathanw if (istat & 0x20) { /* channel B receive interrupt */
968 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit + 1];
969 1.24.8.2 nathanw while (1) {
970 1.24.8.2 nathanw c = regs->du_srb << 8;
971 1.24.8.2 nathanw if ((c & 0x0100) == 0)
972 1.24.8.2 nathanw break;
973 1.24.8.2 nathanw c |= regs->du_rbb;
974 1.24.8.2 nathanw if (sc->incnt == SERIBUF_SIZE)
975 1.24.8.2 nathanw ++sc->ovfl;
976 1.24.8.2 nathanw else {
977 1.24.8.2 nathanw *sc->wptr++ = c;
978 1.24.8.2 nathanw if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
979 1.24.8.2 nathanw sc->wptr = sc->inbuf;
980 1.24.8.2 nathanw ++sc->incnt;
981 1.24.8.2 nathanw if (sc->incnt > SERIBUF_SIZE - 16)
982 1.24.8.2 nathanw regs->du_btrst = 2;
983 1.24.8.2 nathanw }
984 1.24.8.2 nathanw if (c & 0x1000)
985 1.24.8.2 nathanw regs->du_crb = 0x40;
986 1.24.8.2 nathanw }
987 1.24.8.2 nathanw }
988 1.24.8.2 nathanw if (istat & 0x01) { /* channel A transmit interrupt */
989 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit];
990 1.24.8.2 nathanw tp = sc->sc_tty;
991 1.24.8.2 nathanw if (sc->ptr == sc->end) {
992 1.24.8.2 nathanw tp->t_state &= ~(TS_BUSY | TS_FLUSH);
993 1.24.8.2 nathanw scc->imask &= ~0x01;
994 1.24.8.2 nathanw regs->du_imr = scc->imask;
995 1.24.8.2 nathanw add_sicallback (tp->t_linesw ?
996 1.24.8.2 nathanw (sifunc_t)tp->t_linesw->l_start
997 1.24.8.2 nathanw : (sifunc_t)mfcsstart, tp, NULL);
998 1.24.8.2 nathanw
999 1.24.8.2 nathanw }
1000 1.24.8.2 nathanw else
1001 1.24.8.2 nathanw regs->du_tba = *sc->ptr++;
1002 1.24.8.2 nathanw }
1003 1.24.8.2 nathanw if (istat & 0x10) { /* channel B transmit interrupt */
1004 1.24.8.2 nathanw sc = mfcs_cd.cd_devs[unit + 1];
1005 1.24.8.2 nathanw tp = sc->sc_tty;
1006 1.24.8.2 nathanw if (sc->ptr == sc->end) {
1007 1.24.8.2 nathanw tp->t_state &= ~(TS_BUSY | TS_FLUSH);
1008 1.24.8.2 nathanw scc->imask &= ~0x10;
1009 1.24.8.2 nathanw regs->du_imr = scc->imask;
1010 1.24.8.2 nathanw add_sicallback (tp->t_linesw ?
1011 1.24.8.2 nathanw (sifunc_t)tp->t_linesw->l_start
1012 1.24.8.2 nathanw : (sifunc_t)mfcsstart, tp, NULL);
1013 1.24.8.2 nathanw }
1014 1.24.8.2 nathanw else
1015 1.24.8.2 nathanw regs->du_tbb = *sc->ptr++;
1016 1.24.8.2 nathanw }
1017 1.24.8.2 nathanw if (istat & 0x80) { /* input port change interrupt */
1018 1.24.8.2 nathanw c = regs->du_ipcr;
1019 1.24.8.2 nathanw printf ("%s: ipcr %02x", scc->sc_dev.dv_xname, c);
1020 1.24.8.2 nathanw }
1021 1.24.8.2 nathanw return(1);
1022 1.24.8.2 nathanw }
1023 1.24.8.2 nathanw
1024 1.24.8.2 nathanw void
1025 1.24.8.2 nathanw mfcsxintr(int unit)
1026 1.24.8.2 nathanw {
1027 1.24.8.2 nathanw int s1, s2, ovfl;
1028 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1029 1.24.8.2 nathanw struct tty *tp = sc->sc_tty;
1030 1.24.8.2 nathanw
1031 1.24.8.2 nathanw /*
1032 1.24.8.2 nathanw * Make sure we're not interrupted by another
1033 1.24.8.2 nathanw * vbl, but allow level6 ints
1034 1.24.8.2 nathanw */
1035 1.24.8.2 nathanw s1 = spltty();
1036 1.24.8.2 nathanw
1037 1.24.8.2 nathanw /*
1038 1.24.8.2 nathanw * pass along any acumulated information
1039 1.24.8.2 nathanw * while input is not blocked
1040 1.24.8.2 nathanw */
1041 1.24.8.2 nathanw while (sc->incnt && (tp->t_state & TS_TBLOCK) == 0) {
1042 1.24.8.2 nathanw /*
1043 1.24.8.2 nathanw * no collision with ser_fastint()
1044 1.24.8.2 nathanw */
1045 1.24.8.2 nathanw mfcseint(unit, *sc->rptr++);
1046 1.24.8.2 nathanw
1047 1.24.8.2 nathanw ovfl = 0;
1048 1.24.8.2 nathanw /* lock against mfcs_fastint() */
1049 1.24.8.2 nathanw s2 = splser();
1050 1.24.8.2 nathanw --sc->incnt;
1051 1.24.8.2 nathanw if (sc->rptr == sc->inbuf + SERIBUF_SIZE)
1052 1.24.8.2 nathanw sc->rptr = sc->inbuf;
1053 1.24.8.2 nathanw if (sc->ovfl != 0) {
1054 1.24.8.2 nathanw ovfl = sc->ovfl;
1055 1.24.8.2 nathanw sc->ovfl = 0;
1056 1.24.8.2 nathanw }
1057 1.24.8.2 nathanw splx(s2);
1058 1.24.8.2 nathanw if (ovfl != 0)
1059 1.24.8.2 nathanw log(LOG_WARNING, "%s: %d buffer overflow!\n",
1060 1.24.8.2 nathanw sc->sc_dev.dv_xname, ovfl);
1061 1.24.8.2 nathanw }
1062 1.24.8.2 nathanw if (sc->incnt == 0 && (tp->t_state & TS_TBLOCK) == 0) {
1063 1.24.8.2 nathanw sc->sc_regs->du_btst = 1 << unit; /* XXXX */
1064 1.24.8.2 nathanw }
1065 1.24.8.2 nathanw splx(s1);
1066 1.24.8.2 nathanw }
1067 1.24.8.2 nathanw
1068 1.24.8.2 nathanw void
1069 1.24.8.2 nathanw mfcseint(int unit, int stat)
1070 1.24.8.2 nathanw {
1071 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1072 1.24.8.2 nathanw struct tty *tp;
1073 1.24.8.2 nathanw u_char ch;
1074 1.24.8.2 nathanw int c;
1075 1.24.8.2 nathanw
1076 1.24.8.2 nathanw tp = sc->sc_tty;
1077 1.24.8.2 nathanw ch = stat & 0xff;
1078 1.24.8.2 nathanw c = ch;
1079 1.24.8.2 nathanw
1080 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0) {
1081 1.24.8.2 nathanw #ifdef KGDB
1082 1.24.8.4 nathanw extern const struct cdevsw ser_cdevsw;
1083 1.24.8.4 nathanw int maj;
1084 1.24.8.4 nathanw
1085 1.24.8.2 nathanw /* we don't care about parity errors */
1086 1.24.8.4 nathanw maj = cdevsw_lookup_major(&ser_cdevsw);
1087 1.24.8.4 nathanw if (kgdb_dev == makedev(maj, unit) && c == FRAME_END)
1088 1.24.8.2 nathanw kgdb_connect(0); /* trap into kgdb */
1089 1.24.8.2 nathanw #endif
1090 1.24.8.2 nathanw return;
1091 1.24.8.2 nathanw }
1092 1.24.8.2 nathanw
1093 1.24.8.2 nathanw /*
1094 1.24.8.2 nathanw * Check for break and (if enabled) parity error.
1095 1.24.8.2 nathanw */
1096 1.24.8.2 nathanw if (stat & 0xc000)
1097 1.24.8.2 nathanw c |= TTY_FE;
1098 1.24.8.2 nathanw else if (stat & 0x2000)
1099 1.24.8.2 nathanw c |= TTY_PE;
1100 1.24.8.2 nathanw
1101 1.24.8.2 nathanw if (stat & 0x1000)
1102 1.24.8.2 nathanw log(LOG_WARNING, "%s: fifo overflow\n",
1103 1.24.8.2 nathanw ((struct mfcs_softc *)mfcs_cd.cd_devs[unit])->sc_dev.dv_xname);
1104 1.24.8.2 nathanw
1105 1.24.8.2 nathanw tp->t_linesw->l_rint(c, tp);
1106 1.24.8.2 nathanw }
1107 1.24.8.2 nathanw
1108 1.24.8.2 nathanw /*
1109 1.24.8.2 nathanw * This interrupt is periodically invoked in the vertical blank
1110 1.24.8.2 nathanw * interrupt. It's used to keep track of the modem control lines
1111 1.24.8.2 nathanw * and (new with the fast_int code) to move accumulated data
1112 1.24.8.2 nathanw * up into the tty layer.
1113 1.24.8.2 nathanw */
1114 1.24.8.2 nathanw void
1115 1.24.8.2 nathanw mfcsmint(int unit)
1116 1.24.8.2 nathanw {
1117 1.24.8.2 nathanw struct tty *tp;
1118 1.24.8.2 nathanw struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1119 1.24.8.2 nathanw u_char stat, last, istat;
1120 1.24.8.2 nathanw
1121 1.24.8.2 nathanw tp = sc->sc_tty;
1122 1.24.8.2 nathanw if (!tp)
1123 1.24.8.2 nathanw return;
1124 1.24.8.2 nathanw
1125 1.24.8.2 nathanw if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
1126 1.24.8.2 nathanw sc->rptr = sc->wptr = sc->inbuf;
1127 1.24.8.2 nathanw sc->incnt = 0;
1128 1.24.8.2 nathanw return;
1129 1.24.8.2 nathanw }
1130 1.24.8.2 nathanw /*
1131 1.24.8.2 nathanw * empty buffer
1132 1.24.8.2 nathanw */
1133 1.24.8.2 nathanw mfcsxintr(unit);
1134 1.24.8.2 nathanw
1135 1.24.8.2 nathanw stat = ~sc->sc_regs->du_ip;
1136 1.24.8.2 nathanw last = sc->sc_mfc->last_ip;
1137 1.24.8.2 nathanw sc->sc_mfc->last_ip = stat;
1138 1.24.8.2 nathanw
1139 1.24.8.2 nathanw /*
1140 1.24.8.2 nathanw * check whether any interesting signal changed state
1141 1.24.8.2 nathanw */
1142 1.24.8.2 nathanw istat = stat ^ last;
1143 1.24.8.2 nathanw
1144 1.24.8.2 nathanw if ((istat & (0x10 << (unit & 1))) && /* CD changed */
1145 1.24.8.2 nathanw (SWFLAGS(tp->t_dev) & TIOCFLAG_SOFTCAR) == 0) {
1146 1.24.8.2 nathanw if (stat & (0x10 << (unit & 1)))
1147 1.24.8.2 nathanw tp->t_linesw->l_modem(tp, 1);
1148 1.24.8.2 nathanw else if (tp->t_linesw->l_modem(tp, 0) == 0) {
1149 1.24.8.2 nathanw sc->sc_regs->du_btrst = 0x0a << (unit & 1);
1150 1.24.8.2 nathanw }
1151 1.24.8.2 nathanw }
1152 1.24.8.2 nathanw }
1153