mlhsc.c revision 1.22 1 1.22 mjacob /* $NetBSD: mlhsc.c,v 1.22 1998/12/05 19:43:37 mjacob Exp $ */
2 1.4 cgd
3 1.1 chopps /*
4 1.2 chopps * Copyright (c) 1994 Michael L. Hitch
5 1.1 chopps * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 chopps * All rights reserved.
7 1.1 chopps *
8 1.1 chopps * Redistribution and use in source and binary forms, with or without
9 1.1 chopps * modification, are permitted provided that the following conditions
10 1.1 chopps * are met:
11 1.1 chopps * 1. Redistributions of source code must retain the above copyright
12 1.1 chopps * notice, this list of conditions and the following disclaimer.
13 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 chopps * notice, this list of conditions and the following disclaimer in the
15 1.1 chopps * documentation and/or other materials provided with the distribution.
16 1.1 chopps * 3. All advertising materials mentioning features or use of this software
17 1.1 chopps * must display the following acknowledgement:
18 1.1 chopps * This product includes software developed by the University of
19 1.1 chopps * California, Berkeley and its contributors.
20 1.1 chopps * 4. Neither the name of the University nor the names of its contributors
21 1.1 chopps * may be used to endorse or promote products derived from this software
22 1.1 chopps * without specific prior written permission.
23 1.1 chopps *
24 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.1 chopps * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.1 chopps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.1 chopps * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.1 chopps * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.1 chopps * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.1 chopps * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.1 chopps * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.1 chopps * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.1 chopps * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.1 chopps * SUCH DAMAGE.
35 1.1 chopps *
36 1.2 chopps * @(#)dma.c
37 1.1 chopps */
38 1.2 chopps #include <sys/param.h>
39 1.2 chopps #include <sys/systm.h>
40 1.2 chopps #include <sys/kernel.h>
41 1.2 chopps #include <sys/device.h>
42 1.17 bouyer #include <dev/scsipi/scsi_all.h>
43 1.17 bouyer #include <dev/scsipi/scsipi_all.h>
44 1.17 bouyer #include <dev/scsipi/scsiconf.h>
45 1.2 chopps #include <amiga/amiga/device.h>
46 1.8 chopps #include <amiga/amiga/isr.h>
47 1.2 chopps #include <amiga/dev/scireg.h>
48 1.2 chopps #include <amiga/dev/scivar.h>
49 1.6 chopps #include <amiga/dev/zbusvar.h>
50 1.1 chopps
51 1.2 chopps void mlhscattach __P((struct device *, struct device *, void *));
52 1.16 veego int mlhscmatch __P((struct device *, struct cfdata *, void *));
53 1.1 chopps
54 1.2 chopps int mlhsc_dma_xfer_in __P((struct sci_softc *dev, int len,
55 1.2 chopps register u_char *buf, int phase));
56 1.2 chopps int mlhsc_dma_xfer_out __P((struct sci_softc *dev, int len,
57 1.2 chopps register u_char *buf, int phase));
58 1.1 chopps
59 1.17 bouyer struct scsipi_device mlhsc_scsidev = {
60 1.2 chopps NULL, /* use default error handler */
61 1.2 chopps NULL, /* do not have a start functio */
62 1.2 chopps NULL, /* have no async handler */
63 1.2 chopps NULL, /* Use default done routine */
64 1.2 chopps };
65 1.1 chopps
66 1.1 chopps #ifdef DEBUG
67 1.10 veego extern int sci_debug;
68 1.14 christos #define QPRINTF(a) if (sci_debug > 1) printf a
69 1.10 veego #else
70 1.10 veego #define QPRINTF(a)
71 1.1 chopps #endif
72 1.1 chopps
73 1.1 chopps extern int sci_data_wait;
74 1.1 chopps
75 1.9 thorpej struct cfattach mlhsc_ca = {
76 1.9 thorpej sizeof(struct sci_softc), mlhscmatch, mlhscattach
77 1.9 thorpej };
78 1.2 chopps
79 1.2 chopps /*
80 1.2 chopps * if we are my Hacker's SCSI board we are here.
81 1.2 chopps */
82 1.2 chopps int
83 1.16 veego mlhscmatch(pdp, cfp, auxp)
84 1.2 chopps struct device *pdp;
85 1.16 veego struct cfdata *cfp;
86 1.16 veego void *auxp;
87 1.2 chopps {
88 1.6 chopps struct zbus_args *zap;
89 1.2 chopps
90 1.2 chopps zap = auxp;
91 1.2 chopps
92 1.2 chopps /*
93 1.2 chopps * Check manufacturer and product id.
94 1.2 chopps */
95 1.2 chopps if (zap->manid == 2011 && zap->prodid == 1)
96 1.2 chopps return(1);
97 1.2 chopps else
98 1.2 chopps return(0);
99 1.2 chopps }
100 1.1 chopps
101 1.1 chopps void
102 1.2 chopps mlhscattach(pdp, dp, auxp)
103 1.2 chopps struct device *pdp, *dp;
104 1.2 chopps void *auxp;
105 1.2 chopps {
106 1.2 chopps volatile u_char *rp;
107 1.2 chopps struct sci_softc *sc;
108 1.6 chopps struct zbus_args *zap;
109 1.2 chopps
110 1.14 christos printf("\n");
111 1.3 chopps
112 1.2 chopps zap = auxp;
113 1.2 chopps
114 1.2 chopps sc = (struct sci_softc *)dp;
115 1.2 chopps rp = zap->va;
116 1.2 chopps sc->sci_data = rp + 1;
117 1.2 chopps sc->sci_odata = rp + 1;
118 1.2 chopps sc->sci_icmd = rp + 3;
119 1.2 chopps sc->sci_mode = rp + 5;
120 1.2 chopps sc->sci_tcmd = rp + 7;
121 1.2 chopps sc->sci_bus_csr = rp + 9;
122 1.2 chopps sc->sci_sel_enb = rp + 9;
123 1.2 chopps sc->sci_csr = rp + 11;
124 1.2 chopps sc->sci_dma_send = rp + 11;
125 1.2 chopps sc->sci_idata = rp + 13;
126 1.2 chopps sc->sci_trecv = rp + 13;
127 1.2 chopps sc->sci_iack = rp + 15;
128 1.2 chopps sc->sci_irecv = rp + 15;
129 1.2 chopps
130 1.2 chopps sc->dma_xfer_in = mlhsc_dma_xfer_in;
131 1.2 chopps sc->dma_xfer_out = mlhsc_dma_xfer_out;
132 1.2 chopps
133 1.2 chopps scireset(sc);
134 1.2 chopps
135 1.21 is sc->sc_adapter.scsipi_cmd = sci_scsicmd;
136 1.21 is sc->sc_adapter.scsipi_minphys = sci_minphys;
137 1.20 thorpej
138 1.17 bouyer sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
139 1.2 chopps sc->sc_link.adapter_softc = sc;
140 1.17 bouyer sc->sc_link.scsipi_scsi.adapter_target = 7;
141 1.20 thorpej sc->sc_link.adapter = &sc->sc_adapter;
142 1.2 chopps sc->sc_link.device = &mlhsc_scsidev;
143 1.7 chopps sc->sc_link.openings = 1;
144 1.17 bouyer sc->sc_link.scsipi_scsi.max_target = 7;
145 1.22 mjacob sc->sc_link.scsipi_scsi.max_lun = 7;
146 1.17 bouyer sc->sc_link.type = BUS_SCSI;
147 1.2 chopps TAILQ_INIT(&sc->sc_xslist);
148 1.2 chopps
149 1.2 chopps /*
150 1.2 chopps * attach all scsi units on us
151 1.2 chopps */
152 1.12 cgd config_found(dp, &sc->sc_link, scsiprint);
153 1.2 chopps }
154 1.2 chopps
155 1.2 chopps int
156 1.2 chopps mlhsc_dma_xfer_in (dev, len, buf, phase)
157 1.1 chopps struct sci_softc *dev;
158 1.1 chopps int len;
159 1.1 chopps register u_char *buf;
160 1.1 chopps int phase;
161 1.1 chopps {
162 1.1 chopps int wait = sci_data_wait;
163 1.1 chopps u_char csr;
164 1.1 chopps volatile register u_char *sci_dma = dev->sci_data + 16;
165 1.1 chopps volatile register u_char *sci_csr = dev->sci_csr;
166 1.10 veego #ifdef DEBUG
167 1.10 veego u_char *obp = buf;
168 1.10 veego #endif
169 1.1 chopps
170 1.1 chopps csr = *dev->sci_bus_csr;
171 1.1 chopps
172 1.1 chopps QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr));
173 1.1 chopps
174 1.1 chopps *dev->sci_tcmd = phase;
175 1.1 chopps *dev->sci_mode |= SCI_MODE_DMA;
176 1.1 chopps *dev->sci_icmd = 0;
177 1.1 chopps *dev->sci_irecv = 0;
178 1.1 chopps while (len > 128) {
179 1.1 chopps wait = sci_data_wait;
180 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
181 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
182 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
183 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
184 1.1 chopps || --wait < 0) {
185 1.1 chopps #ifdef DEBUG
186 1.1 chopps if (sci_debug)
187 1.14 christos printf("mlhdma_in fail: l%d i%x w%d\n",
188 1.1 chopps len, csr, wait);
189 1.1 chopps #endif
190 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
191 1.1 chopps return 0;
192 1.1 chopps }
193 1.1 chopps }
194 1.1 chopps
195 1.3 chopps #define R1 (*buf++ = *sci_dma)
196 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
197 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
198 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
199 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
200 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
201 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
202 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
203 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
204 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
205 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
206 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
207 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
208 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
209 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
210 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
211 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
212 1.1 chopps len -= 128;
213 1.1 chopps }
214 1.1 chopps while (len > 0) {
215 1.1 chopps wait = sci_data_wait;
216 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
217 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
218 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
219 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
220 1.1 chopps || --wait < 0) {
221 1.1 chopps #ifdef DEBUG
222 1.1 chopps if (sci_debug)
223 1.14 christos printf("mlhdma_in fail: l%d i%x w%d\n",
224 1.1 chopps len, csr, wait);
225 1.1 chopps #endif
226 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
227 1.1 chopps return 0;
228 1.1 chopps }
229 1.1 chopps }
230 1.1 chopps
231 1.1 chopps *buf++ = *sci_dma;
232 1.1 chopps len--;
233 1.1 chopps }
234 1.1 chopps
235 1.1 chopps QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
236 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
237 1.1 chopps obp[6], obp[7], obp[8], obp[9]));
238 1.1 chopps
239 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
240 1.1 chopps return 0;
241 1.1 chopps }
242 1.1 chopps
243 1.2 chopps int
244 1.2 chopps mlhsc_dma_xfer_out (dev, len, buf, phase)
245 1.1 chopps struct sci_softc *dev;
246 1.1 chopps int len;
247 1.1 chopps register u_char *buf;
248 1.1 chopps int phase;
249 1.1 chopps {
250 1.1 chopps int wait = sci_data_wait;
251 1.1 chopps u_char csr;
252 1.1 chopps volatile register u_char *sci_dma = dev->sci_data + 16;
253 1.1 chopps volatile register u_char *sci_csr = dev->sci_csr;
254 1.1 chopps
255 1.1 chopps csr = *dev->sci_bus_csr;
256 1.1 chopps
257 1.1 chopps QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr));
258 1.1 chopps
259 1.1 chopps QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
260 1.1 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
261 1.1 chopps buf[6], buf[7], buf[8], buf[9]));
262 1.1 chopps
263 1.1 chopps *dev->sci_tcmd = phase;
264 1.1 chopps *dev->sci_mode |= SCI_MODE_DMA;
265 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA;
266 1.1 chopps *dev->sci_dma_send = 0;
267 1.1 chopps while (len > 64) {
268 1.1 chopps wait = sci_data_wait;
269 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
270 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
271 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
272 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
273 1.1 chopps || --wait < 0) {
274 1.1 chopps #ifdef DEBUG
275 1.1 chopps if (sci_debug)
276 1.14 christos printf("mlhdma_out fail: l%d i%x w%d\n",
277 1.1 chopps len, csr, wait);
278 1.1 chopps #endif
279 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
280 1.1 chopps return 0;
281 1.1 chopps }
282 1.1 chopps }
283 1.1 chopps
284 1.3 chopps #define W1 (*sci_dma = *buf++)
285 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
286 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
287 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
288 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
289 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
290 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
291 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
292 1.3 chopps W1; W1; W1; W1; W1; W1; W1; W1;
293 1.1 chopps len -= 64;
294 1.1 chopps }
295 1.1 chopps while (len > 0) {
296 1.1 chopps wait = sci_data_wait;
297 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
298 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
299 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
300 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
301 1.1 chopps || --wait < 0) {
302 1.1 chopps #ifdef DEBUG
303 1.1 chopps if (sci_debug)
304 1.14 christos printf("mlhdma_out fail: l%d i%x w%d\n",
305 1.1 chopps len, csr, wait);
306 1.1 chopps #endif
307 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
308 1.1 chopps return 0;
309 1.1 chopps }
310 1.1 chopps }
311 1.1 chopps
312 1.1 chopps *sci_dma = *buf++;
313 1.1 chopps len--;
314 1.1 chopps }
315 1.1 chopps
316 1.1 chopps wait = sci_data_wait;
317 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
318 1.1 chopps SCI_CSR_PHASE_MATCH && --wait);
319 1.1 chopps
320 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
321 1.1 chopps return 0;
322 1.1 chopps }
323