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mlhsc.c revision 1.23.8.3
      1  1.23.8.3  nathanw /*	$NetBSD: mlhsc.c,v 1.23.8.3 2002/10/18 02:35:02 nathanw Exp $ */
      2  1.23.8.2  nathanw 
      3  1.23.8.2  nathanw /*
      4  1.23.8.2  nathanw  * Copyright (c) 1994 Michael L. Hitch
      5  1.23.8.2  nathanw  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  1.23.8.2  nathanw  * All rights reserved.
      7  1.23.8.2  nathanw  *
      8  1.23.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
      9  1.23.8.2  nathanw  * modification, are permitted provided that the following conditions
     10  1.23.8.2  nathanw  * are met:
     11  1.23.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     12  1.23.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     13  1.23.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.23.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     15  1.23.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     16  1.23.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     17  1.23.8.2  nathanw  *    must display the following acknowledgement:
     18  1.23.8.2  nathanw  *	This product includes software developed by the University of
     19  1.23.8.2  nathanw  *	California, Berkeley and its contributors.
     20  1.23.8.2  nathanw  * 4. Neither the name of the University nor the names of its contributors
     21  1.23.8.2  nathanw  *    may be used to endorse or promote products derived from this software
     22  1.23.8.2  nathanw  *    without specific prior written permission.
     23  1.23.8.2  nathanw  *
     24  1.23.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  1.23.8.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  1.23.8.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  1.23.8.2  nathanw  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  1.23.8.2  nathanw  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  1.23.8.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  1.23.8.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  1.23.8.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  1.23.8.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  1.23.8.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  1.23.8.2  nathanw  * SUCH DAMAGE.
     35  1.23.8.2  nathanw  *
     36  1.23.8.2  nathanw  *	@(#)dma.c
     37  1.23.8.2  nathanw  */
     38  1.23.8.2  nathanw 
     39  1.23.8.2  nathanw #include <sys/cdefs.h>
     40  1.23.8.3  nathanw __KERNEL_RCSID(0, "$NetBSD: mlhsc.c,v 1.23.8.3 2002/10/18 02:35:02 nathanw Exp $");
     41  1.23.8.2  nathanw 
     42  1.23.8.2  nathanw #include <sys/param.h>
     43  1.23.8.2  nathanw #include <sys/systm.h>
     44  1.23.8.2  nathanw #include <sys/kernel.h>
     45  1.23.8.2  nathanw #include <sys/device.h>
     46  1.23.8.2  nathanw #include <dev/scsipi/scsi_all.h>
     47  1.23.8.2  nathanw #include <dev/scsipi/scsipi_all.h>
     48  1.23.8.2  nathanw #include <dev/scsipi/scsiconf.h>
     49  1.23.8.2  nathanw #include <amiga/amiga/device.h>
     50  1.23.8.2  nathanw #include <amiga/amiga/isr.h>
     51  1.23.8.2  nathanw #include <amiga/dev/scireg.h>
     52  1.23.8.2  nathanw #include <amiga/dev/scivar.h>
     53  1.23.8.2  nathanw #include <amiga/dev/zbusvar.h>
     54  1.23.8.2  nathanw 
     55  1.23.8.2  nathanw void mlhscattach(struct device *, struct device *, void *);
     56  1.23.8.2  nathanw int mlhscmatch(struct device *, struct cfdata *, void *);
     57  1.23.8.2  nathanw 
     58  1.23.8.2  nathanw int mlhsc_dma_xfer_in(struct sci_softc *dev, int len,
     59  1.23.8.2  nathanw     register u_char *buf, int phase);
     60  1.23.8.2  nathanw int mlhsc_dma_xfer_out(struct sci_softc *dev, int len,
     61  1.23.8.2  nathanw     register u_char *buf, int phase);
     62  1.23.8.2  nathanw 
     63  1.23.8.2  nathanw #ifdef DEBUG
     64  1.23.8.2  nathanw extern int sci_debug;
     65  1.23.8.2  nathanw #define QPRINTF(a) if (sci_debug > 1) printf a
     66  1.23.8.2  nathanw #else
     67  1.23.8.2  nathanw #define QPRINTF(a)
     68  1.23.8.2  nathanw #endif
     69  1.23.8.2  nathanw 
     70  1.23.8.2  nathanw extern int sci_data_wait;
     71  1.23.8.2  nathanw 
     72  1.23.8.3  nathanw CFATTACH_DECL(mlhsc, sizeof(struct sci_softc),
     73  1.23.8.3  nathanw     mlhscmatch, mlhscattach, NULL, NULL);
     74  1.23.8.2  nathanw 
     75  1.23.8.2  nathanw /*
     76  1.23.8.2  nathanw  * if we are my Hacker's SCSI board we are here.
     77  1.23.8.2  nathanw  */
     78  1.23.8.2  nathanw int
     79  1.23.8.2  nathanw mlhscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
     80  1.23.8.2  nathanw {
     81  1.23.8.2  nathanw 	struct zbus_args *zap;
     82  1.23.8.2  nathanw 
     83  1.23.8.2  nathanw 	zap = auxp;
     84  1.23.8.2  nathanw 
     85  1.23.8.2  nathanw 	/*
     86  1.23.8.2  nathanw 	 * Check manufacturer and product id.
     87  1.23.8.2  nathanw 	 */
     88  1.23.8.2  nathanw 	if (zap->manid == 2011 && zap->prodid == 1)
     89  1.23.8.2  nathanw 		return(1);
     90  1.23.8.2  nathanw 	else
     91  1.23.8.2  nathanw 		return(0);
     92  1.23.8.2  nathanw }
     93  1.23.8.2  nathanw 
     94  1.23.8.2  nathanw void
     95  1.23.8.2  nathanw mlhscattach(struct device *pdp, struct device *dp, void *auxp)
     96  1.23.8.2  nathanw {
     97  1.23.8.2  nathanw 	volatile u_char *rp;
     98  1.23.8.2  nathanw 	struct sci_softc *sc = (struct sci_softc *)dp;
     99  1.23.8.2  nathanw 	struct zbus_args *zap;
    100  1.23.8.2  nathanw 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    101  1.23.8.2  nathanw 	struct scsipi_channel *chan = &sc->sc_channel;
    102  1.23.8.2  nathanw 
    103  1.23.8.2  nathanw 	printf("\n");
    104  1.23.8.2  nathanw 
    105  1.23.8.2  nathanw 	zap = auxp;
    106  1.23.8.2  nathanw 
    107  1.23.8.2  nathanw 	sc = (struct sci_softc *)dp;
    108  1.23.8.2  nathanw 	rp = zap->va;
    109  1.23.8.2  nathanw 	sc->sci_data = rp + 1;
    110  1.23.8.2  nathanw 	sc->sci_odata = rp + 1;
    111  1.23.8.2  nathanw 	sc->sci_icmd = rp + 3;
    112  1.23.8.2  nathanw 	sc->sci_mode = rp + 5;
    113  1.23.8.2  nathanw 	sc->sci_tcmd = rp + 7;
    114  1.23.8.2  nathanw 	sc->sci_bus_csr = rp + 9;
    115  1.23.8.2  nathanw 	sc->sci_sel_enb = rp + 9;
    116  1.23.8.2  nathanw 	sc->sci_csr = rp + 11;
    117  1.23.8.2  nathanw 	sc->sci_dma_send = rp + 11;
    118  1.23.8.2  nathanw 	sc->sci_idata = rp + 13;
    119  1.23.8.2  nathanw 	sc->sci_trecv = rp + 13;
    120  1.23.8.2  nathanw 	sc->sci_iack = rp + 15;
    121  1.23.8.2  nathanw 	sc->sci_irecv = rp + 15;
    122  1.23.8.2  nathanw 
    123  1.23.8.2  nathanw 	sc->dma_xfer_in = mlhsc_dma_xfer_in;
    124  1.23.8.2  nathanw 	sc->dma_xfer_out = mlhsc_dma_xfer_out;
    125  1.23.8.2  nathanw 
    126  1.23.8.2  nathanw 	scireset(sc);
    127  1.23.8.2  nathanw 
    128  1.23.8.2  nathanw 	/*
    129  1.23.8.2  nathanw 	 * Fill in the scsipi_adapter.
    130  1.23.8.2  nathanw 	 */
    131  1.23.8.2  nathanw 	memset(adapt, 0, sizeof(*adapt));
    132  1.23.8.2  nathanw 	adapt->adapt_dev = &sc->sc_dev;
    133  1.23.8.2  nathanw 	adapt->adapt_nchannels = 1;
    134  1.23.8.2  nathanw 	adapt->adapt_openings = 7;
    135  1.23.8.2  nathanw 	adapt->adapt_max_periph = 1;
    136  1.23.8.2  nathanw 	adapt->adapt_request = sci_scsipi_request;
    137  1.23.8.2  nathanw 	adapt->adapt_minphys = sci_minphys;
    138  1.23.8.2  nathanw 
    139  1.23.8.2  nathanw 	/*
    140  1.23.8.2  nathanw 	 * Fill in the scsipi_channel.
    141  1.23.8.2  nathanw 	 */
    142  1.23.8.2  nathanw 	memset(chan, 0, sizeof(*chan));
    143  1.23.8.2  nathanw 	chan->chan_adapter = adapt;
    144  1.23.8.2  nathanw 	chan->chan_bustype = &scsi_bustype;
    145  1.23.8.2  nathanw 	chan->chan_channel = 0;
    146  1.23.8.2  nathanw 	chan->chan_ntargets = 8;
    147  1.23.8.2  nathanw 	chan->chan_nluns = 8;
    148  1.23.8.2  nathanw 	chan->chan_id = 7;
    149  1.23.8.2  nathanw 
    150  1.23.8.2  nathanw 	/*
    151  1.23.8.2  nathanw 	 * attach all scsi units on us
    152  1.23.8.2  nathanw 	 */
    153  1.23.8.2  nathanw 	config_found(dp, chan, scsiprint);
    154  1.23.8.2  nathanw }
    155  1.23.8.2  nathanw 
    156  1.23.8.2  nathanw int
    157  1.23.8.2  nathanw mlhsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
    158  1.23.8.2  nathanw                   int phase)
    159  1.23.8.2  nathanw {
    160  1.23.8.2  nathanw 	int wait = sci_data_wait;
    161  1.23.8.2  nathanw 	u_char csr;
    162  1.23.8.2  nathanw 	volatile register u_char *sci_dma = dev->sci_data + 16;
    163  1.23.8.2  nathanw 	volatile register u_char *sci_csr = dev->sci_csr;
    164  1.23.8.2  nathanw #ifdef DEBUG
    165  1.23.8.2  nathanw 	u_char *obp = buf;
    166  1.23.8.2  nathanw #endif
    167  1.23.8.2  nathanw 
    168  1.23.8.2  nathanw 	csr = *dev->sci_bus_csr;
    169  1.23.8.2  nathanw 
    170  1.23.8.2  nathanw 	QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr));
    171  1.23.8.2  nathanw 
    172  1.23.8.2  nathanw 	*dev->sci_tcmd = phase;
    173  1.23.8.2  nathanw 	*dev->sci_mode |= SCI_MODE_DMA;
    174  1.23.8.2  nathanw 	*dev->sci_icmd = 0;
    175  1.23.8.2  nathanw 	*dev->sci_irecv = 0;
    176  1.23.8.2  nathanw 	while (len > 128) {
    177  1.23.8.2  nathanw 		wait = sci_data_wait;
    178  1.23.8.2  nathanw 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    179  1.23.8.2  nathanw 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    180  1.23.8.2  nathanw 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    181  1.23.8.2  nathanw 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    182  1.23.8.2  nathanw 			  || --wait < 0) {
    183  1.23.8.2  nathanw #ifdef DEBUG
    184  1.23.8.2  nathanw 				if (sci_debug)
    185  1.23.8.2  nathanw 					printf("mlhdma_in fail: l%d i%x w%d\n",
    186  1.23.8.2  nathanw 					len, csr, wait);
    187  1.23.8.2  nathanw #endif
    188  1.23.8.2  nathanw 				*dev->sci_mode &= ~SCI_MODE_DMA;
    189  1.23.8.2  nathanw 				return 0;
    190  1.23.8.2  nathanw 			}
    191  1.23.8.2  nathanw 		}
    192  1.23.8.2  nathanw 
    193  1.23.8.2  nathanw #define R1	(*buf++ = *sci_dma)
    194  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    195  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    196  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    197  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    198  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    199  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    200  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    201  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    202  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    203  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    204  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    205  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    206  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    207  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    208  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    209  1.23.8.2  nathanw 		R1; R1; R1; R1; R1; R1; R1; R1;
    210  1.23.8.2  nathanw 		len -= 128;
    211  1.23.8.2  nathanw 	}
    212  1.23.8.2  nathanw 	while (len > 0) {
    213  1.23.8.2  nathanw 		wait = sci_data_wait;
    214  1.23.8.2  nathanw 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    215  1.23.8.2  nathanw 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    216  1.23.8.2  nathanw 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    217  1.23.8.2  nathanw 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    218  1.23.8.2  nathanw 			  || --wait < 0) {
    219  1.23.8.2  nathanw #ifdef DEBUG
    220  1.23.8.2  nathanw 				if (sci_debug)
    221  1.23.8.2  nathanw 					printf("mlhdma_in fail: l%d i%x w%d\n",
    222  1.23.8.2  nathanw 					len, csr, wait);
    223  1.23.8.2  nathanw #endif
    224  1.23.8.2  nathanw 				*dev->sci_mode &= ~SCI_MODE_DMA;
    225  1.23.8.2  nathanw 				return 0;
    226  1.23.8.2  nathanw 			}
    227  1.23.8.2  nathanw 		}
    228  1.23.8.2  nathanw 
    229  1.23.8.2  nathanw 		*buf++ = *sci_dma;
    230  1.23.8.2  nathanw 		len--;
    231  1.23.8.2  nathanw 	}
    232  1.23.8.2  nathanw 
    233  1.23.8.2  nathanw 	QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    234  1.23.8.2  nathanw 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    235  1.23.8.2  nathanw 	  obp[6], obp[7], obp[8], obp[9]));
    236  1.23.8.2  nathanw 
    237  1.23.8.2  nathanw 	*dev->sci_mode &= ~SCI_MODE_DMA;
    238  1.23.8.2  nathanw 	return 0;
    239  1.23.8.2  nathanw }
    240  1.23.8.2  nathanw 
    241  1.23.8.2  nathanw int
    242  1.23.8.2  nathanw mlhsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
    243  1.23.8.2  nathanw                    int phase)
    244  1.23.8.2  nathanw {
    245  1.23.8.2  nathanw 	int wait = sci_data_wait;
    246  1.23.8.2  nathanw 	u_char csr;
    247  1.23.8.2  nathanw 	volatile register u_char *sci_dma = dev->sci_data + 16;
    248  1.23.8.2  nathanw 	volatile register u_char *sci_csr = dev->sci_csr;
    249  1.23.8.2  nathanw 
    250  1.23.8.2  nathanw 	csr = *dev->sci_bus_csr;
    251  1.23.8.2  nathanw 
    252  1.23.8.2  nathanw 	QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr));
    253  1.23.8.2  nathanw 
    254  1.23.8.2  nathanw 	QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    255  1.23.8.2  nathanw   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    256  1.23.8.2  nathanw 	 buf[6], buf[7], buf[8], buf[9]));
    257  1.23.8.2  nathanw 
    258  1.23.8.2  nathanw 	*dev->sci_tcmd = phase;
    259  1.23.8.2  nathanw 	*dev->sci_mode |= SCI_MODE_DMA;
    260  1.23.8.2  nathanw 	*dev->sci_icmd = SCI_ICMD_DATA;
    261  1.23.8.2  nathanw 	*dev->sci_dma_send = 0;
    262  1.23.8.2  nathanw 	while (len > 64) {
    263  1.23.8.2  nathanw 		wait = sci_data_wait;
    264  1.23.8.2  nathanw 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    265  1.23.8.2  nathanw 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    266  1.23.8.2  nathanw 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    267  1.23.8.2  nathanw 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    268  1.23.8.2  nathanw 			  || --wait < 0) {
    269  1.23.8.2  nathanw #ifdef DEBUG
    270  1.23.8.2  nathanw 				if (sci_debug)
    271  1.23.8.2  nathanw 					printf("mlhdma_out fail: l%d i%x w%d\n",
    272  1.23.8.2  nathanw 					len, csr, wait);
    273  1.23.8.2  nathanw #endif
    274  1.23.8.2  nathanw 				*dev->sci_mode &= ~SCI_MODE_DMA;
    275  1.23.8.2  nathanw 				return 0;
    276  1.23.8.2  nathanw 			}
    277  1.23.8.2  nathanw 		}
    278  1.23.8.2  nathanw 
    279  1.23.8.2  nathanw #define W1	(*sci_dma = *buf++)
    280  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    281  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    282  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    283  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    284  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    285  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    286  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    287  1.23.8.2  nathanw 		W1; W1; W1; W1; W1; W1; W1; W1;
    288  1.23.8.2  nathanw 		len -= 64;
    289  1.23.8.2  nathanw 	}
    290  1.23.8.2  nathanw 	while (len > 0) {
    291  1.23.8.2  nathanw 		wait = sci_data_wait;
    292  1.23.8.2  nathanw 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    293  1.23.8.2  nathanw 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    294  1.23.8.2  nathanw 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    295  1.23.8.2  nathanw 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    296  1.23.8.2  nathanw 			  || --wait < 0) {
    297  1.23.8.2  nathanw #ifdef DEBUG
    298  1.23.8.2  nathanw 				if (sci_debug)
    299  1.23.8.2  nathanw 					printf("mlhdma_out fail: l%d i%x w%d\n",
    300  1.23.8.2  nathanw 					len, csr, wait);
    301  1.23.8.2  nathanw #endif
    302  1.23.8.2  nathanw 				*dev->sci_mode &= ~SCI_MODE_DMA;
    303  1.23.8.2  nathanw 				return 0;
    304  1.23.8.2  nathanw 			}
    305  1.23.8.2  nathanw 		}
    306  1.23.8.2  nathanw 
    307  1.23.8.2  nathanw 		*sci_dma = *buf++;
    308  1.23.8.2  nathanw 		len--;
    309  1.23.8.2  nathanw 	}
    310  1.23.8.2  nathanw 
    311  1.23.8.2  nathanw 	wait = sci_data_wait;
    312  1.23.8.2  nathanw 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    313  1.23.8.2  nathanw 	  SCI_CSR_PHASE_MATCH && --wait);
    314  1.23.8.2  nathanw 
    315  1.23.8.2  nathanw 	*dev->sci_mode &= ~SCI_MODE_DMA;
    316  1.23.8.2  nathanw 	return 0;
    317  1.23.8.2  nathanw }
    318