mlhsc.c revision 1.11
1 /* $NetBSD: mlhsc.c,v 1.11 1996/08/27 21:55:09 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/device.h> 45 #include <amiga/amiga/isr.h> 46 #include <amiga/dev/scireg.h> 47 #include <amiga/dev/scivar.h> 48 #include <amiga/dev/zbusvar.h> 49 50 int mlhscprint __P((void *auxp, const char *)); 51 void mlhscattach __P((struct device *, struct device *, void *)); 52 int mlhscmatch __P((struct device *, void *, void *)); 53 54 int mlhsc_dma_xfer_in __P((struct sci_softc *dev, int len, 55 register u_char *buf, int phase)); 56 int mlhsc_dma_xfer_out __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 59 struct scsi_adapter mlhsc_scsiswitch = { 60 sci_scsicmd, 61 sci_minphys, 62 0, /* no lun support */ 63 0, /* no lun support */ 64 }; 65 66 struct scsi_device mlhsc_scsidev = { 67 NULL, /* use default error handler */ 68 NULL, /* do not have a start functio */ 69 NULL, /* have no async handler */ 70 NULL, /* Use default done routine */ 71 }; 72 73 #ifdef DEBUG 74 extern int sci_debug; 75 #define QPRINTF(a) if (sci_debug > 1) printf a 76 #else 77 #define QPRINTF(a) 78 #endif 79 80 extern int sci_data_wait; 81 82 struct cfattach mlhsc_ca = { 83 sizeof(struct sci_softc), mlhscmatch, mlhscattach 84 }; 85 86 struct cfdriver mlhsc_cd = { 87 NULL, "mlhsc", DV_DULL, NULL, 0 88 }; 89 90 /* 91 * if we are my Hacker's SCSI board we are here. 92 */ 93 int 94 mlhscmatch(pdp, match, auxp) 95 struct device *pdp; 96 void *match, *auxp; 97 { 98 struct zbus_args *zap; 99 100 zap = auxp; 101 102 /* 103 * Check manufacturer and product id. 104 */ 105 if (zap->manid == 2011 && zap->prodid == 1) 106 return(1); 107 else 108 return(0); 109 } 110 111 void 112 mlhscattach(pdp, dp, auxp) 113 struct device *pdp, *dp; 114 void *auxp; 115 { 116 volatile u_char *rp; 117 struct sci_softc *sc; 118 struct zbus_args *zap; 119 120 printf("\n"); 121 122 zap = auxp; 123 124 sc = (struct sci_softc *)dp; 125 rp = zap->va; 126 sc->sci_data = rp + 1; 127 sc->sci_odata = rp + 1; 128 sc->sci_icmd = rp + 3; 129 sc->sci_mode = rp + 5; 130 sc->sci_tcmd = rp + 7; 131 sc->sci_bus_csr = rp + 9; 132 sc->sci_sel_enb = rp + 9; 133 sc->sci_csr = rp + 11; 134 sc->sci_dma_send = rp + 11; 135 sc->sci_idata = rp + 13; 136 sc->sci_trecv = rp + 13; 137 sc->sci_iack = rp + 15; 138 sc->sci_irecv = rp + 15; 139 140 sc->dma_xfer_in = mlhsc_dma_xfer_in; 141 sc->dma_xfer_out = mlhsc_dma_xfer_out; 142 143 scireset(sc); 144 145 sc->sc_link.adapter_softc = sc; 146 sc->sc_link.adapter_target = 7; 147 sc->sc_link.adapter = &mlhsc_scsiswitch; 148 sc->sc_link.device = &mlhsc_scsidev; 149 sc->sc_link.openings = 1; 150 TAILQ_INIT(&sc->sc_xslist); 151 152 /* 153 * attach all scsi units on us 154 */ 155 config_found(dp, &sc->sc_link, mlhscprint); 156 } 157 158 /* 159 * print diag if pnp is NULL else just extra 160 */ 161 int 162 mlhscprint(auxp, pnp) 163 void *auxp; 164 const char *pnp; 165 { 166 if (pnp == NULL) 167 return(UNCONF); 168 return(QUIET); 169 } 170 171 172 int 173 mlhsc_dma_xfer_in (dev, len, buf, phase) 174 struct sci_softc *dev; 175 int len; 176 register u_char *buf; 177 int phase; 178 { 179 int wait = sci_data_wait; 180 u_char csr; 181 volatile register u_char *sci_dma = dev->sci_data + 16; 182 volatile register u_char *sci_csr = dev->sci_csr; 183 #ifdef DEBUG 184 u_char *obp = buf; 185 #endif 186 187 csr = *dev->sci_bus_csr; 188 189 QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr)); 190 191 *dev->sci_tcmd = phase; 192 *dev->sci_mode |= SCI_MODE_DMA; 193 *dev->sci_icmd = 0; 194 *dev->sci_irecv = 0; 195 while (len > 128) { 196 wait = sci_data_wait; 197 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 198 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 199 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 200 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 201 || --wait < 0) { 202 #ifdef DEBUG 203 if (sci_debug) 204 printf("mlhdma_in fail: l%d i%x w%d\n", 205 len, csr, wait); 206 #endif 207 *dev->sci_mode &= ~SCI_MODE_DMA; 208 return 0; 209 } 210 } 211 212 #define R1 (*buf++ = *sci_dma) 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 R1; R1; R1; R1; R1; R1; R1; R1; 228 R1; R1; R1; R1; R1; R1; R1; R1; 229 len -= 128; 230 } 231 while (len > 0) { 232 wait = sci_data_wait; 233 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 234 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 235 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 236 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 237 || --wait < 0) { 238 #ifdef DEBUG 239 if (sci_debug) 240 printf("mlhdma_in fail: l%d i%x w%d\n", 241 len, csr, wait); 242 #endif 243 *dev->sci_mode &= ~SCI_MODE_DMA; 244 return 0; 245 } 246 } 247 248 *buf++ = *sci_dma; 249 len--; 250 } 251 252 QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 253 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 254 obp[6], obp[7], obp[8], obp[9])); 255 256 *dev->sci_mode &= ~SCI_MODE_DMA; 257 return 0; 258 } 259 260 int 261 mlhsc_dma_xfer_out (dev, len, buf, phase) 262 struct sci_softc *dev; 263 int len; 264 register u_char *buf; 265 int phase; 266 { 267 int wait = sci_data_wait; 268 u_char csr; 269 volatile register u_char *sci_dma = dev->sci_data + 16; 270 volatile register u_char *sci_csr = dev->sci_csr; 271 272 csr = *dev->sci_bus_csr; 273 274 QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr)); 275 276 QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 277 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 278 buf[6], buf[7], buf[8], buf[9])); 279 280 *dev->sci_tcmd = phase; 281 *dev->sci_mode |= SCI_MODE_DMA; 282 *dev->sci_icmd = SCI_ICMD_DATA; 283 *dev->sci_dma_send = 0; 284 while (len > 64) { 285 wait = sci_data_wait; 286 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 287 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 288 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 289 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 290 || --wait < 0) { 291 #ifdef DEBUG 292 if (sci_debug) 293 printf("mlhdma_out fail: l%d i%x w%d\n", 294 len, csr, wait); 295 #endif 296 *dev->sci_mode &= ~SCI_MODE_DMA; 297 return 0; 298 } 299 } 300 301 #define W1 (*sci_dma = *buf++) 302 W1; W1; W1; W1; W1; W1; W1; W1; 303 W1; W1; W1; W1; W1; W1; W1; W1; 304 W1; W1; W1; W1; W1; W1; W1; W1; 305 W1; W1; W1; W1; W1; W1; W1; W1; 306 W1; W1; W1; W1; W1; W1; W1; W1; 307 W1; W1; W1; W1; W1; W1; W1; W1; 308 W1; W1; W1; W1; W1; W1; W1; W1; 309 W1; W1; W1; W1; W1; W1; W1; W1; 310 len -= 64; 311 } 312 while (len > 0) { 313 wait = sci_data_wait; 314 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 315 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 316 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 317 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 318 || --wait < 0) { 319 #ifdef DEBUG 320 if (sci_debug) 321 printf("mlhdma_out fail: l%d i%x w%d\n", 322 len, csr, wait); 323 #endif 324 *dev->sci_mode &= ~SCI_MODE_DMA; 325 return 0; 326 } 327 } 328 329 *sci_dma = *buf++; 330 len--; 331 } 332 333 wait = sci_data_wait; 334 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 335 SCI_CSR_PHASE_MATCH && --wait); 336 337 *dev->sci_mode &= ~SCI_MODE_DMA; 338 return 0; 339 } 340
Indexes created Fri Oct 03 02:09:57 GMT 2025