mlhsc.c revision 1.17
1 /* $NetBSD: mlhsc.c,v 1.17 1997/08/27 11:23:13 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 #include <amiga/dev/scireg.h> 48 #include <amiga/dev/scivar.h> 49 #include <amiga/dev/zbusvar.h> 50 51 void mlhscattach __P((struct device *, struct device *, void *)); 52 int mlhscmatch __P((struct device *, struct cfdata *, void *)); 53 54 int mlhsc_dma_xfer_in __P((struct sci_softc *dev, int len, 55 register u_char *buf, int phase)); 56 int mlhsc_dma_xfer_out __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 59 struct scsipi_adapter mlhsc_scsiswitch = { 60 sci_scsicmd, 61 sci_minphys, 62 0, /* no lun support */ 63 0, /* no lun support */ 64 }; 65 66 struct scsipi_device mlhsc_scsidev = { 67 NULL, /* use default error handler */ 68 NULL, /* do not have a start functio */ 69 NULL, /* have no async handler */ 70 NULL, /* Use default done routine */ 71 }; 72 73 #ifdef DEBUG 74 extern int sci_debug; 75 #define QPRINTF(a) if (sci_debug > 1) printf a 76 #else 77 #define QPRINTF(a) 78 #endif 79 80 extern int sci_data_wait; 81 82 struct cfattach mlhsc_ca = { 83 sizeof(struct sci_softc), mlhscmatch, mlhscattach 84 }; 85 86 struct cfdriver mlhsc_cd = { 87 NULL, "mlhsc", DV_DULL, NULL, 0 88 }; 89 90 /* 91 * if we are my Hacker's SCSI board we are here. 92 */ 93 int 94 mlhscmatch(pdp, cfp, auxp) 95 struct device *pdp; 96 struct cfdata *cfp; 97 void *auxp; 98 { 99 struct zbus_args *zap; 100 101 zap = auxp; 102 103 /* 104 * Check manufacturer and product id. 105 */ 106 if (zap->manid == 2011 && zap->prodid == 1) 107 return(1); 108 else 109 return(0); 110 } 111 112 void 113 mlhscattach(pdp, dp, auxp) 114 struct device *pdp, *dp; 115 void *auxp; 116 { 117 volatile u_char *rp; 118 struct sci_softc *sc; 119 struct zbus_args *zap; 120 121 printf("\n"); 122 123 zap = auxp; 124 125 sc = (struct sci_softc *)dp; 126 rp = zap->va; 127 sc->sci_data = rp + 1; 128 sc->sci_odata = rp + 1; 129 sc->sci_icmd = rp + 3; 130 sc->sci_mode = rp + 5; 131 sc->sci_tcmd = rp + 7; 132 sc->sci_bus_csr = rp + 9; 133 sc->sci_sel_enb = rp + 9; 134 sc->sci_csr = rp + 11; 135 sc->sci_dma_send = rp + 11; 136 sc->sci_idata = rp + 13; 137 sc->sci_trecv = rp + 13; 138 sc->sci_iack = rp + 15; 139 sc->sci_irecv = rp + 15; 140 141 sc->dma_xfer_in = mlhsc_dma_xfer_in; 142 sc->dma_xfer_out = mlhsc_dma_xfer_out; 143 144 scireset(sc); 145 146 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 147 sc->sc_link.adapter_softc = sc; 148 sc->sc_link.scsipi_scsi.adapter_target = 7; 149 sc->sc_link.adapter = &mlhsc_scsiswitch; 150 sc->sc_link.device = &mlhsc_scsidev; 151 sc->sc_link.openings = 1; 152 sc->sc_link.scsipi_scsi.max_target = 7; 153 sc->sc_link.type = BUS_SCSI; 154 TAILQ_INIT(&sc->sc_xslist); 155 156 /* 157 * attach all scsi units on us 158 */ 159 config_found(dp, &sc->sc_link, scsiprint); 160 } 161 162 int 163 mlhsc_dma_xfer_in (dev, len, buf, phase) 164 struct sci_softc *dev; 165 int len; 166 register u_char *buf; 167 int phase; 168 { 169 int wait = sci_data_wait; 170 u_char csr; 171 volatile register u_char *sci_dma = dev->sci_data + 16; 172 volatile register u_char *sci_csr = dev->sci_csr; 173 #ifdef DEBUG 174 u_char *obp = buf; 175 #endif 176 177 csr = *dev->sci_bus_csr; 178 179 QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr)); 180 181 *dev->sci_tcmd = phase; 182 *dev->sci_mode |= SCI_MODE_DMA; 183 *dev->sci_icmd = 0; 184 *dev->sci_irecv = 0; 185 while (len > 128) { 186 wait = sci_data_wait; 187 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 188 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 189 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 190 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 191 || --wait < 0) { 192 #ifdef DEBUG 193 if (sci_debug) 194 printf("mlhdma_in fail: l%d i%x w%d\n", 195 len, csr, wait); 196 #endif 197 *dev->sci_mode &= ~SCI_MODE_DMA; 198 return 0; 199 } 200 } 201 202 #define R1 (*buf++ = *sci_dma) 203 R1; R1; R1; R1; R1; R1; R1; R1; 204 R1; R1; R1; R1; R1; R1; R1; R1; 205 R1; R1; R1; R1; R1; R1; R1; R1; 206 R1; R1; R1; R1; R1; R1; R1; R1; 207 R1; R1; R1; R1; R1; R1; R1; R1; 208 R1; R1; R1; R1; R1; R1; R1; R1; 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 len -= 128; 220 } 221 while (len > 0) { 222 wait = sci_data_wait; 223 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 224 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 225 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 226 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 227 || --wait < 0) { 228 #ifdef DEBUG 229 if (sci_debug) 230 printf("mlhdma_in fail: l%d i%x w%d\n", 231 len, csr, wait); 232 #endif 233 *dev->sci_mode &= ~SCI_MODE_DMA; 234 return 0; 235 } 236 } 237 238 *buf++ = *sci_dma; 239 len--; 240 } 241 242 QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 243 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 244 obp[6], obp[7], obp[8], obp[9])); 245 246 *dev->sci_mode &= ~SCI_MODE_DMA; 247 return 0; 248 } 249 250 int 251 mlhsc_dma_xfer_out (dev, len, buf, phase) 252 struct sci_softc *dev; 253 int len; 254 register u_char *buf; 255 int phase; 256 { 257 int wait = sci_data_wait; 258 u_char csr; 259 volatile register u_char *sci_dma = dev->sci_data + 16; 260 volatile register u_char *sci_csr = dev->sci_csr; 261 262 csr = *dev->sci_bus_csr; 263 264 QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr)); 265 266 QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 267 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 268 buf[6], buf[7], buf[8], buf[9])); 269 270 *dev->sci_tcmd = phase; 271 *dev->sci_mode |= SCI_MODE_DMA; 272 *dev->sci_icmd = SCI_ICMD_DATA; 273 *dev->sci_dma_send = 0; 274 while (len > 64) { 275 wait = sci_data_wait; 276 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 277 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 278 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 279 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 280 || --wait < 0) { 281 #ifdef DEBUG 282 if (sci_debug) 283 printf("mlhdma_out fail: l%d i%x w%d\n", 284 len, csr, wait); 285 #endif 286 *dev->sci_mode &= ~SCI_MODE_DMA; 287 return 0; 288 } 289 } 290 291 #define W1 (*sci_dma = *buf++) 292 W1; W1; W1; W1; W1; W1; W1; W1; 293 W1; W1; W1; W1; W1; W1; W1; W1; 294 W1; W1; W1; W1; W1; W1; W1; W1; 295 W1; W1; W1; W1; W1; W1; W1; W1; 296 W1; W1; W1; W1; W1; W1; W1; W1; 297 W1; W1; W1; W1; W1; W1; W1; W1; 298 W1; W1; W1; W1; W1; W1; W1; W1; 299 W1; W1; W1; W1; W1; W1; W1; W1; 300 len -= 64; 301 } 302 while (len > 0) { 303 wait = sci_data_wait; 304 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 305 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 306 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 307 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 308 || --wait < 0) { 309 #ifdef DEBUG 310 if (sci_debug) 311 printf("mlhdma_out fail: l%d i%x w%d\n", 312 len, csr, wait); 313 #endif 314 *dev->sci_mode &= ~SCI_MODE_DMA; 315 return 0; 316 } 317 } 318 319 *sci_dma = *buf++; 320 len--; 321 } 322 323 wait = sci_data_wait; 324 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 325 SCI_CSR_PHASE_MATCH && --wait); 326 327 *dev->sci_mode &= ~SCI_MODE_DMA; 328 return 0; 329 } 330
Indexes created Tue Sep 23 14:10:03 GMT 2025