mlhsc.c revision 1.24
1 /* $NetBSD: mlhsc.c,v 1.24 2002/01/26 13:40:58 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 #include <amiga/dev/scireg.h> 48 #include <amiga/dev/scivar.h> 49 #include <amiga/dev/zbusvar.h> 50 51 void mlhscattach(struct device *, struct device *, void *); 52 int mlhscmatch(struct device *, struct cfdata *, void *); 53 54 int mlhsc_dma_xfer_in(struct sci_softc *dev, int len, 55 register u_char *buf, int phase); 56 int mlhsc_dma_xfer_out(struct sci_softc *dev, int len, 57 register u_char *buf, int phase); 58 59 #ifdef DEBUG 60 extern int sci_debug; 61 #define QPRINTF(a) if (sci_debug > 1) printf a 62 #else 63 #define QPRINTF(a) 64 #endif 65 66 extern int sci_data_wait; 67 68 struct cfattach mlhsc_ca = { 69 sizeof(struct sci_softc), mlhscmatch, mlhscattach 70 }; 71 72 /* 73 * if we are my Hacker's SCSI board we are here. 74 */ 75 int 76 mlhscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 77 { 78 struct zbus_args *zap; 79 80 zap = auxp; 81 82 /* 83 * Check manufacturer and product id. 84 */ 85 if (zap->manid == 2011 && zap->prodid == 1) 86 return(1); 87 else 88 return(0); 89 } 90 91 void 92 mlhscattach(struct device *pdp, struct device *dp, void *auxp) 93 { 94 volatile u_char *rp; 95 struct sci_softc *sc = (struct sci_softc *)dp; 96 struct zbus_args *zap; 97 struct scsipi_adapter *adapt = &sc->sc_adapter; 98 struct scsipi_channel *chan = &sc->sc_channel; 99 100 printf("\n"); 101 102 zap = auxp; 103 104 sc = (struct sci_softc *)dp; 105 rp = zap->va; 106 sc->sci_data = rp + 1; 107 sc->sci_odata = rp + 1; 108 sc->sci_icmd = rp + 3; 109 sc->sci_mode = rp + 5; 110 sc->sci_tcmd = rp + 7; 111 sc->sci_bus_csr = rp + 9; 112 sc->sci_sel_enb = rp + 9; 113 sc->sci_csr = rp + 11; 114 sc->sci_dma_send = rp + 11; 115 sc->sci_idata = rp + 13; 116 sc->sci_trecv = rp + 13; 117 sc->sci_iack = rp + 15; 118 sc->sci_irecv = rp + 15; 119 120 sc->dma_xfer_in = mlhsc_dma_xfer_in; 121 sc->dma_xfer_out = mlhsc_dma_xfer_out; 122 123 scireset(sc); 124 125 /* 126 * Fill in the scsipi_adapter. 127 */ 128 memset(adapt, 0, sizeof(*adapt)); 129 adapt->adapt_dev = &sc->sc_dev; 130 adapt->adapt_nchannels = 1; 131 adapt->adapt_openings = 7; 132 adapt->adapt_max_periph = 1; 133 adapt->adapt_request = sci_scsipi_request; 134 adapt->adapt_minphys = sci_minphys; 135 136 /* 137 * Fill in the scsipi_channel. 138 */ 139 memset(chan, 0, sizeof(*chan)); 140 chan->chan_adapter = adapt; 141 chan->chan_bustype = &scsi_bustype; 142 chan->chan_channel = 0; 143 chan->chan_ntargets = 8; 144 chan->chan_nluns = 8; 145 chan->chan_id = 7; 146 147 /* 148 * attach all scsi units on us 149 */ 150 config_found(dp, chan, scsiprint); 151 } 152 153 int 154 mlhsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 155 int phase) 156 { 157 int wait = sci_data_wait; 158 u_char csr; 159 volatile register u_char *sci_dma = dev->sci_data + 16; 160 volatile register u_char *sci_csr = dev->sci_csr; 161 #ifdef DEBUG 162 u_char *obp = buf; 163 #endif 164 165 csr = *dev->sci_bus_csr; 166 167 QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr)); 168 169 *dev->sci_tcmd = phase; 170 *dev->sci_mode |= SCI_MODE_DMA; 171 *dev->sci_icmd = 0; 172 *dev->sci_irecv = 0; 173 while (len > 128) { 174 wait = sci_data_wait; 175 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 176 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 177 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 178 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 179 || --wait < 0) { 180 #ifdef DEBUG 181 if (sci_debug) 182 printf("mlhdma_in fail: l%d i%x w%d\n", 183 len, csr, wait); 184 #endif 185 *dev->sci_mode &= ~SCI_MODE_DMA; 186 return 0; 187 } 188 } 189 190 #define R1 (*buf++ = *sci_dma) 191 R1; R1; R1; R1; R1; R1; R1; R1; 192 R1; R1; R1; R1; R1; R1; R1; R1; 193 R1; R1; R1; R1; R1; R1; R1; R1; 194 R1; R1; R1; R1; R1; R1; R1; R1; 195 R1; R1; R1; R1; R1; R1; R1; R1; 196 R1; R1; R1; R1; R1; R1; R1; R1; 197 R1; R1; R1; R1; R1; R1; R1; R1; 198 R1; R1; R1; R1; R1; R1; R1; R1; 199 R1; R1; R1; R1; R1; R1; R1; R1; 200 R1; R1; R1; R1; R1; R1; R1; R1; 201 R1; R1; R1; R1; R1; R1; R1; R1; 202 R1; R1; R1; R1; R1; R1; R1; R1; 203 R1; R1; R1; R1; R1; R1; R1; R1; 204 R1; R1; R1; R1; R1; R1; R1; R1; 205 R1; R1; R1; R1; R1; R1; R1; R1; 206 R1; R1; R1; R1; R1; R1; R1; R1; 207 len -= 128; 208 } 209 while (len > 0) { 210 wait = sci_data_wait; 211 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 212 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 213 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 214 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 215 || --wait < 0) { 216 #ifdef DEBUG 217 if (sci_debug) 218 printf("mlhdma_in fail: l%d i%x w%d\n", 219 len, csr, wait); 220 #endif 221 *dev->sci_mode &= ~SCI_MODE_DMA; 222 return 0; 223 } 224 } 225 226 *buf++ = *sci_dma; 227 len--; 228 } 229 230 QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 231 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 232 obp[6], obp[7], obp[8], obp[9])); 233 234 *dev->sci_mode &= ~SCI_MODE_DMA; 235 return 0; 236 } 237 238 int 239 mlhsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 240 int phase) 241 { 242 int wait = sci_data_wait; 243 u_char csr; 244 volatile register u_char *sci_dma = dev->sci_data + 16; 245 volatile register u_char *sci_csr = dev->sci_csr; 246 247 csr = *dev->sci_bus_csr; 248 249 QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr)); 250 251 QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 252 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 253 buf[6], buf[7], buf[8], buf[9])); 254 255 *dev->sci_tcmd = phase; 256 *dev->sci_mode |= SCI_MODE_DMA; 257 *dev->sci_icmd = SCI_ICMD_DATA; 258 *dev->sci_dma_send = 0; 259 while (len > 64) { 260 wait = sci_data_wait; 261 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 262 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 263 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 264 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 265 || --wait < 0) { 266 #ifdef DEBUG 267 if (sci_debug) 268 printf("mlhdma_out fail: l%d i%x w%d\n", 269 len, csr, wait); 270 #endif 271 *dev->sci_mode &= ~SCI_MODE_DMA; 272 return 0; 273 } 274 } 275 276 #define W1 (*sci_dma = *buf++) 277 W1; W1; W1; W1; W1; W1; W1; W1; 278 W1; W1; W1; W1; W1; W1; W1; W1; 279 W1; W1; W1; W1; W1; W1; W1; W1; 280 W1; W1; W1; W1; W1; W1; W1; W1; 281 W1; W1; W1; W1; W1; W1; W1; W1; 282 W1; W1; W1; W1; W1; W1; W1; W1; 283 W1; W1; W1; W1; W1; W1; W1; W1; 284 W1; W1; W1; W1; W1; W1; W1; W1; 285 len -= 64; 286 } 287 while (len > 0) { 288 wait = sci_data_wait; 289 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 290 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 291 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 292 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 293 || --wait < 0) { 294 #ifdef DEBUG 295 if (sci_debug) 296 printf("mlhdma_out fail: l%d i%x w%d\n", 297 len, csr, wait); 298 #endif 299 *dev->sci_mode &= ~SCI_MODE_DMA; 300 return 0; 301 } 302 } 303 304 *sci_dma = *buf++; 305 len--; 306 } 307 308 wait = sci_data_wait; 309 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 310 SCI_CSR_PHASE_MATCH && --wait); 311 312 *dev->sci_mode &= ~SCI_MODE_DMA; 313 return 0; 314 } 315
Indexes created Mon Sep 22 05:09:51 GMT 2025