mlhsc.c revision 1.3
1 /* 2 * Copyright (c) 1994 Michael L. Hitch 3 * Copyright (c) 1982, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)dma.c 35 * $Id: mlhsc.c,v 1.3 1994/06/13 08:13:03 chopps Exp $ 36 */ 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <scsi/scsi_all.h> 42 #include <scsi/scsiconf.h> 43 #include <amiga/amiga/device.h> 44 #include <amiga/dev/scireg.h> 45 #include <amiga/dev/scivar.h> 46 #include <amiga/dev/ztwobusvar.h> 47 48 int mlhscprint __P((void *auxp, char *)); 49 void mlhscattach __P((struct device *, struct device *, void *)); 50 int mlhscmatch __P((struct device *, struct cfdata *, void *)); 51 52 int mlhsc_dma_xfer_in __P((struct sci_softc *dev, int len, 53 register u_char *buf, int phase)); 54 int mlhsc_dma_xfer_out __P((struct sci_softc *dev, int len, 55 register u_char *buf, int phase)); 56 57 struct scsi_adapter mlhsc_scsiswitch = { 58 sci_scsicmd, 59 sci_minphys, 60 0, /* no lun support */ 61 0, /* no lun support */ 62 sci_adinfo, 63 "mlhsc", 64 }; 65 66 struct scsi_device mlhsc_scsidev = { 67 NULL, /* use default error handler */ 68 NULL, /* do not have a start functio */ 69 NULL, /* have no async handler */ 70 NULL, /* Use default done routine */ 71 "mlhsc", 72 0, 73 }; 74 75 #define QPRINTF 76 77 #ifdef DEBUG 78 extern int sci_debug; 79 #endif 80 81 extern int sci_data_wait; 82 83 struct cfdriver mlhsccd = { 84 NULL, "mlhsc", mlhscmatch, mlhscattach, 85 DV_DULL, sizeof(struct sci_softc), NULL, 0 }; 86 87 /* 88 * if we are my Hacker's SCSI board we are here. 89 */ 90 int 91 mlhscmatch(pdp, cdp, auxp) 92 struct device *pdp; 93 struct cfdata *cdp; 94 void *auxp; 95 { 96 struct ztwobus_args *zap; 97 98 zap = auxp; 99 100 /* 101 * Check manufacturer and product id. 102 */ 103 if (zap->manid == 2011 && zap->prodid == 1) 104 return(1); 105 else 106 return(0); 107 } 108 109 void 110 mlhscattach(pdp, dp, auxp) 111 struct device *pdp, *dp; 112 void *auxp; 113 { 114 volatile u_char *rp; 115 struct sci_softc *sc; 116 struct ztwobus_args *zap; 117 118 printf("\n"); 119 120 zap = auxp; 121 122 sc = (struct sci_softc *)dp; 123 rp = zap->va; 124 sc->sci_data = rp + 1; 125 sc->sci_odata = rp + 1; 126 sc->sci_icmd = rp + 3; 127 sc->sci_mode = rp + 5; 128 sc->sci_tcmd = rp + 7; 129 sc->sci_bus_csr = rp + 9; 130 sc->sci_sel_enb = rp + 9; 131 sc->sci_csr = rp + 11; 132 sc->sci_dma_send = rp + 11; 133 sc->sci_idata = rp + 13; 134 sc->sci_trecv = rp + 13; 135 sc->sci_iack = rp + 15; 136 sc->sci_irecv = rp + 15; 137 138 sc->dma_xfer_in = mlhsc_dma_xfer_in; 139 sc->dma_xfer_out = mlhsc_dma_xfer_out; 140 141 scireset(sc); 142 143 sc->sc_link.adapter_softc = sc; 144 sc->sc_link.adapter_targ = 7; 145 sc->sc_link.adapter = &mlhsc_scsiswitch; 146 sc->sc_link.device = &mlhsc_scsidev; 147 TAILQ_INIT(&sc->sc_xslist); 148 149 /* 150 * attach all scsi units on us 151 */ 152 config_found(dp, &sc->sc_link, mlhscprint); 153 } 154 155 /* 156 * print diag if pnp is NULL else just extra 157 */ 158 int 159 mlhscprint(auxp, pnp) 160 void *auxp; 161 char *pnp; 162 { 163 if (pnp == NULL) 164 return(UNCONF); 165 return(QUIET); 166 } 167 168 169 int 170 mlhsc_dma_xfer_in (dev, len, buf, phase) 171 struct sci_softc *dev; 172 int len; 173 register u_char *buf; 174 int phase; 175 { 176 int wait = sci_data_wait; 177 u_char csr; 178 u_char *obp = buf; 179 volatile register u_char *sci_dma = dev->sci_data + 16; 180 volatile register u_char *sci_csr = dev->sci_csr; 181 volatile register u_char *sci_icmd = dev->sci_icmd; 182 183 csr = *dev->sci_bus_csr; 184 185 QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr)); 186 187 *dev->sci_tcmd = phase; 188 *dev->sci_mode |= SCI_MODE_DMA; 189 *dev->sci_icmd = 0; 190 *dev->sci_irecv = 0; 191 while (len > 128) { 192 wait = sci_data_wait; 193 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 194 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 195 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 196 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 197 || --wait < 0) { 198 #ifdef DEBUG 199 if (sci_debug) 200 printf("mlhdma_in fail: l%d i%x w%d\n", 201 len, csr, wait); 202 #endif 203 *dev->sci_mode &= ~SCI_MODE_DMA; 204 return 0; 205 } 206 } 207 208 #define R1 (*buf++ = *sci_dma) 209 R1; R1; R1; R1; R1; R1; R1; R1; 210 R1; R1; R1; R1; R1; R1; R1; R1; 211 R1; R1; R1; R1; R1; R1; R1; R1; 212 R1; R1; R1; R1; R1; R1; R1; R1; 213 R1; R1; R1; R1; R1; R1; R1; R1; 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 len -= 128; 226 } 227 while (len > 0) { 228 wait = sci_data_wait; 229 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 230 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 231 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 232 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 233 || --wait < 0) { 234 #ifdef DEBUG 235 if (sci_debug) 236 printf("mlhdma_in fail: l%d i%x w%d\n", 237 len, csr, wait); 238 #endif 239 *dev->sci_mode &= ~SCI_MODE_DMA; 240 return 0; 241 } 242 } 243 244 *buf++ = *sci_dma; 245 len--; 246 } 247 248 QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 249 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 250 obp[6], obp[7], obp[8], obp[9])); 251 252 *dev->sci_mode &= ~SCI_MODE_DMA; 253 return 0; 254 } 255 256 int 257 mlhsc_dma_xfer_out (dev, len, buf, phase) 258 struct sci_softc *dev; 259 int len; 260 register u_char *buf; 261 int phase; 262 { 263 int wait = sci_data_wait; 264 u_char csr; 265 u_char *obp = buf; 266 volatile register u_char *sci_dma = dev->sci_data + 16; 267 volatile register u_char *sci_csr = dev->sci_csr; 268 volatile register u_char *sci_icmd = dev->sci_icmd; 269 270 csr = *dev->sci_bus_csr; 271 272 QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr)); 273 274 QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 275 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 276 buf[6], buf[7], buf[8], buf[9])); 277 278 *dev->sci_tcmd = phase; 279 *dev->sci_mode |= SCI_MODE_DMA; 280 *dev->sci_icmd = SCI_ICMD_DATA; 281 *dev->sci_dma_send = 0; 282 while (len > 64) { 283 wait = sci_data_wait; 284 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 285 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 286 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 287 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 288 || --wait < 0) { 289 #ifdef DEBUG 290 if (sci_debug) 291 printf("mlhdma_out fail: l%d i%x w%d\n", 292 len, csr, wait); 293 #endif 294 *dev->sci_mode &= ~SCI_MODE_DMA; 295 return 0; 296 } 297 } 298 299 #define W1 (*sci_dma = *buf++) 300 W1; W1; W1; W1; W1; W1; W1; W1; 301 W1; W1; W1; W1; W1; W1; W1; W1; 302 W1; W1; W1; W1; W1; W1; W1; W1; 303 W1; W1; W1; W1; W1; W1; W1; W1; 304 W1; W1; W1; W1; W1; W1; W1; W1; 305 W1; W1; W1; W1; W1; W1; W1; W1; 306 W1; W1; W1; W1; W1; W1; W1; W1; 307 W1; W1; W1; W1; W1; W1; W1; W1; 308 len -= 64; 309 } 310 while (len > 0) { 311 wait = sci_data_wait; 312 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 313 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 314 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 315 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 316 || --wait < 0) { 317 #ifdef DEBUG 318 if (sci_debug) 319 printf("mlhdma_out fail: l%d i%x w%d\n", 320 len, csr, wait); 321 #endif 322 *dev->sci_mode &= ~SCI_MODE_DMA; 323 return 0; 324 } 325 } 326 327 *sci_dma = *buf++; 328 len--; 329 } 330 331 wait = sci_data_wait; 332 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 333 SCI_CSR_PHASE_MATCH && --wait); 334 335 *dev->sci_mode &= ~SCI_MODE_DMA; 336 return 0; 337 } 338
Indexes created Fri Oct 03 02:09:57 GMT 2025