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otgsc.c revision 1.23.20.1
      1  1.23.20.1   nathanw /*	$NetBSD: otgsc.c,v 1.23.20.1 2001/06/21 18:47:43 nathanw Exp $	*/
      2        1.4       cgd 
      3        1.1    chopps /*
      4        1.2    chopps  * Copyright (c) 1994 Michael L. Hitch
      5        1.1    chopps  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6        1.1    chopps  * All rights reserved.
      7        1.1    chopps  *
      8        1.1    chopps  * Redistribution and use in source and binary forms, with or without
      9        1.1    chopps  * modification, are permitted provided that the following conditions
     10        1.1    chopps  * are met:
     11        1.1    chopps  * 1. Redistributions of source code must retain the above copyright
     12        1.1    chopps  *    notice, this list of conditions and the following disclaimer.
     13        1.1    chopps  * 2. Redistributions in binary form must reproduce the above copyright
     14        1.1    chopps  *    notice, this list of conditions and the following disclaimer in the
     15        1.1    chopps  *    documentation and/or other materials provided with the distribution.
     16        1.1    chopps  * 3. All advertising materials mentioning features or use of this software
     17        1.1    chopps  *    must display the following acknowledgement:
     18        1.1    chopps  *	This product includes software developed by the University of
     19        1.1    chopps  *	California, Berkeley and its contributors.
     20        1.1    chopps  * 4. Neither the name of the University nor the names of its contributors
     21        1.1    chopps  *    may be used to endorse or promote products derived from this software
     22        1.1    chopps  *    without specific prior written permission.
     23        1.1    chopps  *
     24        1.1    chopps  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25        1.1    chopps  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26        1.1    chopps  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27        1.1    chopps  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28        1.1    chopps  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29        1.1    chopps  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30        1.1    chopps  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31        1.1    chopps  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32        1.1    chopps  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33        1.1    chopps  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34        1.1    chopps  * SUCH DAMAGE.
     35        1.1    chopps  *
     36        1.1    chopps  *	@(#)csa12gdma.c
     37        1.1    chopps  */
     38        1.2    chopps #include <sys/param.h>
     39        1.2    chopps #include <sys/systm.h>
     40        1.2    chopps #include <sys/kernel.h>
     41        1.2    chopps #include <sys/device.h>
     42       1.18    bouyer #include <dev/scsipi/scsi_all.h>
     43       1.18    bouyer #include <dev/scsipi/scsipi_all.h>
     44       1.18    bouyer #include <dev/scsipi/scsiconf.h>
     45        1.2    chopps #include <amiga/amiga/device.h>
     46        1.8    chopps #include <amiga/amiga/isr.h>
     47        1.2    chopps #include <amiga/dev/scireg.h>
     48        1.2    chopps #include <amiga/dev/scivar.h>
     49        1.6    chopps #include <amiga/dev/zbusvar.h>
     50        1.1    chopps 
     51        1.2    chopps void otgscattach __P((struct device *, struct device *, void *));
     52       1.17     veego int otgscmatch __P((struct device *, struct cfdata *, void *));
     53        1.1    chopps 
     54        1.2    chopps int otgsc_dma_xfer_in __P((struct sci_softc *dev, int len,
     55        1.2    chopps     register u_char *buf, int phase));
     56        1.2    chopps int otgsc_dma_xfer_out __P((struct sci_softc *dev, int len,
     57        1.2    chopps     register u_char *buf, int phase));
     58       1.11     veego int otgsc_intr __P((void *));
     59        1.1    chopps 
     60        1.1    chopps 
     61        1.1    chopps #ifdef DEBUG
     62       1.11     veego extern int sci_debug;
     63       1.15  christos #define QPRINTF(a) if (sci_debug > 1) printf a
     64       1.11     veego #else
     65       1.11     veego #define QPRINTF(a)
     66        1.1    chopps #endif
     67        1.1    chopps 
     68        1.1    chopps extern int sci_data_wait;
     69        1.1    chopps 
     70       1.10   thorpej struct cfattach otgsc_ca = {
     71       1.10   thorpej 	sizeof(struct sci_softc), otgscmatch, otgscattach
     72       1.10   thorpej };
     73        1.2    chopps 
     74        1.2    chopps /*
     75        1.2    chopps  * if we are my Hacker's SCSI board we are here.
     76        1.2    chopps  */
     77        1.2    chopps int
     78       1.17     veego otgscmatch(pdp, cfp, auxp)
     79        1.2    chopps 	struct device *pdp;
     80       1.17     veego 	struct cfdata *cfp;
     81       1.17     veego 	void *auxp;
     82        1.2    chopps {
     83        1.6    chopps 	struct zbus_args *zap;
     84        1.2    chopps 
     85        1.2    chopps 	zap = auxp;
     86        1.2    chopps 
     87        1.2    chopps 	/*
     88        1.2    chopps 	 * Check manufacturer and product id.
     89        1.2    chopps 	 */
     90        1.3    chopps 	if (zap->manid == 1058 && zap->prodid == 21)
     91        1.2    chopps 		return(1);
     92        1.2    chopps 	else
     93        1.2    chopps 		return(0);
     94        1.2    chopps }
     95        1.1    chopps 
     96        1.1    chopps void
     97        1.2    chopps otgscattach(pdp, dp, auxp)
     98        1.2    chopps 	struct device *pdp, *dp;
     99        1.2    chopps 	void *auxp;
    100        1.2    chopps {
    101        1.2    chopps 	volatile u_char *rp;
    102  1.23.20.1   nathanw 	struct sci_softc *sc = (struct sci_softc *)dp;
    103        1.6    chopps 	struct zbus_args *zap;
    104  1.23.20.1   nathanw 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    105  1.23.20.1   nathanw 	struct scsipi_channel *chan = &sc->sc_channel;
    106        1.3    chopps 
    107       1.15  christos 	printf("\n");
    108        1.2    chopps 
    109        1.2    chopps 	zap = auxp;
    110        1.2    chopps 
    111        1.2    chopps 	sc = (struct sci_softc *)dp;
    112       1.23      tron 	rp = (u_char *)zap->va + 0x2000;
    113        1.2    chopps 	sc->sci_data = rp;
    114        1.2    chopps 	sc->sci_odata = rp;
    115        1.2    chopps 	sc->sci_icmd = rp + 0x10;
    116        1.2    chopps 	sc->sci_mode = rp + 0x20;
    117        1.2    chopps 	sc->sci_tcmd = rp + 0x30;
    118        1.2    chopps 	sc->sci_bus_csr = rp + 0x40;
    119        1.2    chopps 	sc->sci_sel_enb = rp + 0x40;
    120        1.2    chopps 	sc->sci_csr = rp + 0x50;
    121        1.2    chopps 	sc->sci_dma_send = rp + 0x50;
    122        1.2    chopps 	sc->sci_idata = rp + 0x60;
    123        1.2    chopps 	sc->sci_trecv = rp + 0x60;
    124        1.2    chopps 	sc->sci_iack = rp + 0x70;
    125        1.2    chopps 	sc->sci_irecv = rp + 0x70;
    126        1.2    chopps 
    127        1.2    chopps 	sc->dma_xfer_in = otgsc_dma_xfer_in;
    128        1.2    chopps 	sc->dma_xfer_out = otgsc_dma_xfer_out;
    129        1.2    chopps 
    130        1.8    chopps 	sc->sc_isr.isr_intr = otgsc_intr;
    131        1.8    chopps 	sc->sc_isr.isr_arg = sc;
    132        1.8    chopps 	sc->sc_isr.isr_ipl = 2;
    133        1.8    chopps 	add_isr(&sc->sc_isr);
    134        1.8    chopps 
    135        1.2    chopps 	scireset(sc);
    136        1.2    chopps 
    137  1.23.20.1   nathanw 	/*
    138  1.23.20.1   nathanw 	 * Fill in the scsipi_adapter.
    139  1.23.20.1   nathanw 	 */
    140  1.23.20.1   nathanw 	memset(adapt, 0, sizeof(*adapt));
    141  1.23.20.1   nathanw 	adapt->adapt_dev = &sc->sc_dev;
    142  1.23.20.1   nathanw 	adapt->adapt_nchannels = 1;
    143  1.23.20.1   nathanw 	adapt->adapt_openings = 7;
    144  1.23.20.1   nathanw 	adapt->adapt_max_periph = 1;
    145  1.23.20.1   nathanw 	adapt->adapt_request = sci_scsipi_request;
    146  1.23.20.1   nathanw 	adapt->adapt_minphys = sci_minphys;
    147       1.21   thorpej 
    148  1.23.20.1   nathanw 	/*
    149  1.23.20.1   nathanw 	 * Fill in the scsipi_channel.
    150  1.23.20.1   nathanw 	 */
    151  1.23.20.1   nathanw 	memset(chan, 0, sizeof(*chan));
    152  1.23.20.1   nathanw 	chan->chan_adapter = adapt;
    153  1.23.20.1   nathanw 	chan->chan_bustype = &scsi_bustype;
    154  1.23.20.1   nathanw 	chan->chan_channel = 0;
    155  1.23.20.1   nathanw 	chan->chan_ntargets = 8;
    156  1.23.20.1   nathanw 	chan->chan_nluns = 8;
    157  1.23.20.1   nathanw 	chan->chan_id = 7;
    158        1.2    chopps 
    159        1.2    chopps 	/*
    160        1.2    chopps 	 * attach all scsi units on us
    161        1.2    chopps 	 */
    162  1.23.20.1   nathanw 	config_found(dp, chan, scsiprint);
    163        1.2    chopps }
    164        1.2    chopps 
    165        1.2    chopps int
    166        1.2    chopps otgsc_dma_xfer_in (dev, len, buf, phase)
    167        1.1    chopps 	struct sci_softc *dev;
    168        1.1    chopps 	int len;
    169        1.1    chopps 	register u_char *buf;
    170        1.1    chopps 	int phase;
    171        1.1    chopps {
    172        1.1    chopps 	int wait = sci_data_wait;
    173        1.9    chopps 	volatile register u_char *sci_dma = dev->sci_data + 0x100;
    174        1.1    chopps 	volatile register u_char *sci_csr = dev->sci_csr;
    175       1.11     veego #ifdef DEBUG
    176       1.11     veego 	u_char *obp = buf;
    177       1.11     veego #endif
    178        1.1    chopps 
    179        1.2    chopps 	QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    180        1.1    chopps 
    181        1.1    chopps 	*dev->sci_tcmd = phase;
    182        1.1    chopps 	*dev->sci_mode |= SCI_MODE_DMA;
    183        1.1    chopps 	*dev->sci_icmd = 0;
    184        1.1    chopps 	*dev->sci_irecv = 0;
    185        1.1    chopps 	while (len > 0) {
    186        1.1    chopps 		wait = sci_data_wait;
    187        1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    188        1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    189        1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    190        1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    191        1.1    chopps 			  || --wait < 0) {
    192        1.1    chopps #ifdef DEBUG
    193        1.1    chopps 				if (sci_debug)
    194       1.15  christos 					printf("otgsc_dma_in fail: l%d i%x w%d\n",
    195       1.11     veego 					len, *dev->sci_bus_csr, wait);
    196        1.1    chopps #endif
    197        1.1    chopps 				*dev->sci_mode &= ~SCI_MODE_DMA;
    198        1.1    chopps 				return 0;
    199        1.1    chopps 			}
    200        1.1    chopps 		}
    201        1.1    chopps 
    202        1.1    chopps 		*buf++ = *sci_dma;
    203        1.1    chopps 		len--;
    204        1.1    chopps 	}
    205        1.1    chopps 
    206        1.2    chopps 	QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    207        1.1    chopps 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    208        1.1    chopps 	  obp[6], obp[7], obp[8], obp[9]));
    209        1.1    chopps 
    210        1.1    chopps 	*dev->sci_mode &= ~SCI_MODE_DMA;
    211        1.1    chopps 	return 0;
    212        1.1    chopps }
    213        1.1    chopps 
    214        1.2    chopps int
    215        1.2    chopps otgsc_dma_xfer_out (dev, len, buf, phase)
    216        1.1    chopps 	struct sci_softc *dev;
    217        1.1    chopps 	int len;
    218        1.1    chopps 	register u_char *buf;
    219        1.1    chopps 	int phase;
    220        1.1    chopps {
    221        1.1    chopps 	int wait = sci_data_wait;
    222        1.9    chopps 	volatile register u_char *sci_dma = dev->sci_data + 0x100;
    223        1.1    chopps 	volatile register u_char *sci_csr = dev->sci_csr;
    224        1.1    chopps 
    225        1.2    chopps 	QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    226        1.1    chopps 
    227        1.2    chopps 	QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    228        1.1    chopps   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    229        1.1    chopps 	 buf[6], buf[7], buf[8], buf[9]));
    230        1.1    chopps 
    231        1.1    chopps 	*dev->sci_tcmd = phase;
    232        1.1    chopps 	*dev->sci_mode |= SCI_MODE_DMA;
    233        1.1    chopps 	*dev->sci_icmd = SCI_ICMD_DATA;
    234        1.1    chopps 	*dev->sci_dma_send = 0;
    235        1.1    chopps 	while (len > 0) {
    236        1.1    chopps 		wait = sci_data_wait;
    237        1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    238        1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    239        1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    240        1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    241        1.1    chopps 			  || --wait < 0) {
    242        1.1    chopps #ifdef DEBUG
    243        1.1    chopps 				if (sci_debug)
    244       1.15  christos 					printf("otgsc_dma_out fail: l%d i%x w%d\n",
    245       1.11     veego 					len, *dev->sci_bus_csr, wait);
    246        1.1    chopps #endif
    247        1.1    chopps 				*dev->sci_mode &= ~SCI_MODE_DMA;
    248        1.1    chopps 				return 0;
    249        1.1    chopps 			}
    250        1.1    chopps 		}
    251        1.1    chopps 
    252        1.1    chopps 		*sci_dma = *buf++;
    253        1.1    chopps 		len--;
    254        1.1    chopps 	}
    255        1.1    chopps 
    256        1.1    chopps 	wait = sci_data_wait;
    257        1.1    chopps 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    258        1.1    chopps 	  SCI_CSR_PHASE_MATCH && --wait);
    259        1.1    chopps 
    260        1.1    chopps 
    261        1.1    chopps 	*dev->sci_mode &= ~SCI_MODE_DMA;
    262        1.1    chopps 	return 0;
    263        1.1    chopps }
    264        1.2    chopps 
    265        1.2    chopps int
    266       1.11     veego otgsc_intr(arg)
    267       1.11     veego 	void *arg;
    268        1.2    chopps {
    269       1.11     veego 	struct sci_softc *dev = arg;
    270        1.2    chopps 	u_char stat;
    271        1.2    chopps 
    272        1.8    chopps 	if ((*dev->sci_csr & SCI_CSR_INT) == 0)
    273        1.8    chopps 		return (1);
    274        1.8    chopps 	stat = *dev->sci_iack;
    275        1.8    chopps 	*dev->sci_mode = 0;
    276        1.8    chopps 	return (1);
    277        1.2    chopps }
    278