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otgsc.c revision 1.1
      1 /*
      2  * Copyright (c) 1982, 1990 The Regents of the University of California.
      3  * All rights reserved.
      4  *
      5  * Redistribution and use in source and binary forms, with or without
      6  * modification, are permitted provided that the following conditions
      7  * are met:
      8  * 1. Redistributions of source code must retain the above copyright
      9  *    notice, this list of conditions and the following disclaimer.
     10  * 2. Redistributions in binary form must reproduce the above copyright
     11  *    notice, this list of conditions and the following disclaimer in the
     12  *    documentation and/or other materials provided with the distribution.
     13  * 3. All advertising materials mentioning features or use of this software
     14  *    must display the following acknowledgement:
     15  *	This product includes software developed by the University of
     16  *	California, Berkeley and its contributors.
     17  * 4. Neither the name of the University nor the names of its contributors
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  *
     33  *	@(#)csa12gdma.c
     34  *	$Id: otgsc.c,v 1.1 1994/05/08 05:53:30 chopps Exp $
     35  */
     36 
     37 /*
     38  * dummy CSA 12 Gauge 5380 DMA driver
     39  */
     40 
     41 #include "csa12gscsi.h"
     42 
     43 #if NCSA12GSCSI > 0
     44 
     45 #include <sys/param.h>
     46 
     47 #include <amiga/dev/device.h>
     48 #include <amiga/dev/scivar.h>
     49 #include <amiga/dev/scireg.h>
     50 
     51 #define QPRINTF
     52 #ifdef DEBUG
     53 extern int sci_debug;
     54 #endif
     55 #define	HIST(h,w)
     56 
     57 extern int sci_data_wait;
     58 
     59 static int dma_xfer_in __P((struct sci_softc *dev, int len,
     60     register u_char *buf, int phase));
     61 static int dma_xfer_out __P((struct sci_softc *dev, int len,
     62     register u_char *buf, int phase));
     63 
     64 void
     65 csa12gdmainit (dev)
     66 	struct sci_softc *dev;
     67 {
     68 	dev->dma_xfer_in = dma_xfer_in;
     69 	dev->dma_xfer_out = dma_xfer_out;
     70 }
     71 
     72 static int
     73 dma_xfer_in (dev, len, buf, phase)
     74 	struct sci_softc *dev;
     75 	int len;
     76 	register u_char *buf;
     77 	int phase;
     78 {
     79 	int wait = sci_data_wait;
     80 	u_char csr;
     81 	u_char *obp = buf;
     82 	volatile register u_char *sci_dma = dev->sci_data + 0x80;
     83 	volatile register u_char *sci_csr = dev->sci_csr;
     84 	volatile register u_char *sci_icmd = dev->sci_icmd;
     85 
     86 	QPRINTF(("csa12gdma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
     87 
     88 	*dev->sci_tcmd = phase;
     89 	*dev->sci_mode |= SCI_MODE_DMA;
     90 	*dev->sci_icmd = 0;
     91 	*dev->sci_irecv = 0;
     92 	while (len > 0) {
     93 		wait = sci_data_wait;
     94 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
     95 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
     96 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
     97 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
     98 			  || --wait < 0) {
     99 #ifdef DEBUG
    100 				if (sci_debug)
    101 					printf("csa12g_in fail: l%d i%x w%d\n",
    102 					len, csr, wait);
    103 #endif
    104 				HIST(ixin_wait, wait)
    105 				*dev->sci_mode &= ~SCI_MODE_DMA;
    106 				return 0;
    107 			}
    108 		}
    109 
    110 		*buf++ = *sci_dma;
    111 		len--;
    112 	}
    113 
    114 	QPRINTF(("csa12gdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    115 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    116 	  obp[6], obp[7], obp[8], obp[9]));
    117 
    118 	/* this leaves with one csr to be read */
    119 	HIST(ixin_wait, wait)
    120 	*dev->sci_mode &= ~SCI_MODE_DMA;
    121 	return 0;
    122 }
    123 
    124 static int
    125 dma_xfer_out (dev, len, buf, phase)
    126 	struct sci_softc *dev;
    127 	int len;
    128 	register u_char *buf;
    129 	int phase;
    130 {
    131 	int wait = sci_data_wait;
    132 	u_char csr;
    133 	u_char *obp = buf;
    134 	volatile register u_char *sci_dma = dev->sci_data + 0x80;
    135 	volatile register u_char *sci_csr = dev->sci_csr;
    136 	volatile register u_char *sci_icmd = dev->sci_icmd;
    137 
    138 	QPRINTF(("csa12gdma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    139 
    140 	QPRINTF(("csa12gdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    141   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    142 	 buf[6], buf[7], buf[8], buf[9]));
    143 
    144 	*dev->sci_tcmd = phase;
    145 	*dev->sci_mode |= SCI_MODE_DMA;
    146 	*dev->sci_icmd = SCI_ICMD_DATA;
    147 	*dev->sci_dma_send = 0;
    148 	while (len > 0) {
    149 		wait = sci_data_wait;
    150 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    151 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    152 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    153 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    154 			  || --wait < 0) {
    155 #ifdef DEBUG
    156 				if (sci_debug)
    157 					printf("csa12gdma_out fail: l%d i%x w%d\n",
    158 					len, csr, wait);
    159 #endif
    160 				HIST(ixin_wait, wait)
    161 				*dev->sci_mode &= ~SCI_MODE_DMA;
    162 				return 0;
    163 			}
    164 		}
    165 
    166 		*sci_dma = *buf++;
    167 		len--;
    168 	}
    169 
    170 	wait = sci_data_wait;
    171 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    172 	  SCI_CSR_PHASE_MATCH && --wait);
    173 
    174 
    175 	HIST(ixin_wait, wait)
    176 	*dev->sci_mode &= ~SCI_MODE_DMA;
    177 	return 0;
    178 }
    179 #endif
    180