otgsc.c revision 1.26
1 /* $NetBSD: otgsc.c,v 1.26 2002/01/28 09:57:01 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)csa12gdma.c 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: otgsc.c,v 1.26 2002/01/28 09:57:01 aymeric Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <dev/scsipi/scsi_all.h> 47 #include <dev/scsipi/scsipi_all.h> 48 #include <dev/scsipi/scsiconf.h> 49 #include <amiga/amiga/device.h> 50 #include <amiga/amiga/isr.h> 51 #include <amiga/dev/scireg.h> 52 #include <amiga/dev/scivar.h> 53 #include <amiga/dev/zbusvar.h> 54 55 void otgscattach(struct device *, struct device *, void *); 56 int otgscmatch(struct device *, struct cfdata *, void *); 57 58 int otgsc_dma_xfer_in(struct sci_softc *dev, int len, 59 register u_char *buf, int phase); 60 int otgsc_dma_xfer_out(struct sci_softc *dev, int len, 61 register u_char *buf, int phase); 62 int otgsc_intr(void *); 63 64 65 #ifdef DEBUG 66 extern int sci_debug; 67 #define QPRINTF(a) if (sci_debug > 1) printf a 68 #else 69 #define QPRINTF(a) 70 #endif 71 72 extern int sci_data_wait; 73 74 struct cfattach otgsc_ca = { 75 sizeof(struct sci_softc), otgscmatch, otgscattach 76 }; 77 78 /* 79 * if we are my Hacker's SCSI board we are here. 80 */ 81 int 82 otgscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 83 { 84 struct zbus_args *zap; 85 86 zap = auxp; 87 88 /* 89 * Check manufacturer and product id. 90 */ 91 if (zap->manid == 1058 && zap->prodid == 21) 92 return(1); 93 else 94 return(0); 95 } 96 97 void 98 otgscattach(struct device *pdp, struct device *dp, void *auxp) 99 { 100 volatile u_char *rp; 101 struct sci_softc *sc = (struct sci_softc *)dp; 102 struct zbus_args *zap; 103 struct scsipi_adapter *adapt = &sc->sc_adapter; 104 struct scsipi_channel *chan = &sc->sc_channel; 105 106 printf("\n"); 107 108 zap = auxp; 109 110 sc = (struct sci_softc *)dp; 111 rp = (u_char *)zap->va + 0x2000; 112 sc->sci_data = rp; 113 sc->sci_odata = rp; 114 sc->sci_icmd = rp + 0x10; 115 sc->sci_mode = rp + 0x20; 116 sc->sci_tcmd = rp + 0x30; 117 sc->sci_bus_csr = rp + 0x40; 118 sc->sci_sel_enb = rp + 0x40; 119 sc->sci_csr = rp + 0x50; 120 sc->sci_dma_send = rp + 0x50; 121 sc->sci_idata = rp + 0x60; 122 sc->sci_trecv = rp + 0x60; 123 sc->sci_iack = rp + 0x70; 124 sc->sci_irecv = rp + 0x70; 125 126 sc->dma_xfer_in = otgsc_dma_xfer_in; 127 sc->dma_xfer_out = otgsc_dma_xfer_out; 128 129 sc->sc_isr.isr_intr = otgsc_intr; 130 sc->sc_isr.isr_arg = sc; 131 sc->sc_isr.isr_ipl = 2; 132 add_isr(&sc->sc_isr); 133 134 scireset(sc); 135 136 /* 137 * Fill in the scsipi_adapter. 138 */ 139 memset(adapt, 0, sizeof(*adapt)); 140 adapt->adapt_dev = &sc->sc_dev; 141 adapt->adapt_nchannels = 1; 142 adapt->adapt_openings = 7; 143 adapt->adapt_max_periph = 1; 144 adapt->adapt_request = sci_scsipi_request; 145 adapt->adapt_minphys = sci_minphys; 146 147 /* 148 * Fill in the scsipi_channel. 149 */ 150 memset(chan, 0, sizeof(*chan)); 151 chan->chan_adapter = adapt; 152 chan->chan_bustype = &scsi_bustype; 153 chan->chan_channel = 0; 154 chan->chan_ntargets = 8; 155 chan->chan_nluns = 8; 156 chan->chan_id = 7; 157 158 /* 159 * attach all scsi units on us 160 */ 161 config_found(dp, chan, scsiprint); 162 } 163 164 int 165 otgsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 166 int phase) 167 { 168 int wait = sci_data_wait; 169 volatile register u_char *sci_dma = dev->sci_data + 0x100; 170 volatile register u_char *sci_csr = dev->sci_csr; 171 #ifdef DEBUG 172 u_char *obp = buf; 173 #endif 174 175 QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 176 177 *dev->sci_tcmd = phase; 178 *dev->sci_mode |= SCI_MODE_DMA; 179 *dev->sci_icmd = 0; 180 *dev->sci_irecv = 0; 181 while (len > 0) { 182 wait = sci_data_wait; 183 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 184 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 185 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 186 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 187 || --wait < 0) { 188 #ifdef DEBUG 189 if (sci_debug) 190 printf("otgsc_dma_in fail: l%d i%x w%d\n", 191 len, *dev->sci_bus_csr, wait); 192 #endif 193 *dev->sci_mode &= ~SCI_MODE_DMA; 194 return 0; 195 } 196 } 197 198 *buf++ = *sci_dma; 199 len--; 200 } 201 202 QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 203 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 204 obp[6], obp[7], obp[8], obp[9])); 205 206 *dev->sci_mode &= ~SCI_MODE_DMA; 207 return 0; 208 } 209 210 int 211 otgsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 212 int phase) 213 { 214 int wait = sci_data_wait; 215 volatile register u_char *sci_dma = dev->sci_data + 0x100; 216 volatile register u_char *sci_csr = dev->sci_csr; 217 218 QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 219 220 QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 221 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 222 buf[6], buf[7], buf[8], buf[9])); 223 224 *dev->sci_tcmd = phase; 225 *dev->sci_mode |= SCI_MODE_DMA; 226 *dev->sci_icmd = SCI_ICMD_DATA; 227 *dev->sci_dma_send = 0; 228 while (len > 0) { 229 wait = sci_data_wait; 230 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 231 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 232 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 233 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 234 || --wait < 0) { 235 #ifdef DEBUG 236 if (sci_debug) 237 printf("otgsc_dma_out fail: l%d i%x w%d\n", 238 len, *dev->sci_bus_csr, wait); 239 #endif 240 *dev->sci_mode &= ~SCI_MODE_DMA; 241 return 0; 242 } 243 } 244 245 *sci_dma = *buf++; 246 len--; 247 } 248 249 wait = sci_data_wait; 250 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 251 SCI_CSR_PHASE_MATCH && --wait); 252 253 254 *dev->sci_mode &= ~SCI_MODE_DMA; 255 return 0; 256 } 257 258 int 259 otgsc_intr(void *arg) 260 { 261 struct sci_softc *dev = arg; 262 u_char stat; 263 264 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 265 return (1); 266 stat = *dev->sci_iack; 267 *dev->sci_mode = 0; 268 return (1); 269 } 270
Indexes created Tue Sep 23 20:09:58 GMT 2025