otgsc.c revision 1.29
1 /* $NetBSD: otgsc.c,v 1.29 2003/08/07 16:26:43 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)csa12gdma.c 32 */ 33 34 /* 35 * Copyright (c) 1994 Michael L. Hitch 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by the University of 48 * California, Berkeley and its contributors. 49 * 4. Neither the name of the University nor the names of its contributors 50 * may be used to endorse or promote products derived from this software 51 * without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * @(#)csa12gdma.c 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: otgsc.c,v 1.29 2003/08/07 16:26:43 agc Exp $"); 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <dev/scsipi/scsi_all.h> 76 #include <dev/scsipi/scsipi_all.h> 77 #include <dev/scsipi/scsiconf.h> 78 #include <amiga/amiga/device.h> 79 #include <amiga/amiga/isr.h> 80 #include <amiga/dev/scireg.h> 81 #include <amiga/dev/scivar.h> 82 #include <amiga/dev/zbusvar.h> 83 84 void otgscattach(struct device *, struct device *, void *); 85 int otgscmatch(struct device *, struct cfdata *, void *); 86 87 int otgsc_dma_xfer_in(struct sci_softc *dev, int len, 88 register u_char *buf, int phase); 89 int otgsc_dma_xfer_out(struct sci_softc *dev, int len, 90 register u_char *buf, int phase); 91 int otgsc_intr(void *); 92 93 94 #ifdef DEBUG 95 extern int sci_debug; 96 #define QPRINTF(a) if (sci_debug > 1) printf a 97 #else 98 #define QPRINTF(a) 99 #endif 100 101 extern int sci_data_wait; 102 103 CFATTACH_DECL(otgsc, sizeof(struct sci_softc), 104 otgscmatch, otgscattach, NULL, NULL); 105 106 /* 107 * if we are my Hacker's SCSI board we are here. 108 */ 109 int 110 otgscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 111 { 112 struct zbus_args *zap; 113 114 zap = auxp; 115 116 /* 117 * Check manufacturer and product id. 118 */ 119 if (zap->manid == 1058 && zap->prodid == 21) 120 return(1); 121 else 122 return(0); 123 } 124 125 void 126 otgscattach(struct device *pdp, struct device *dp, void *auxp) 127 { 128 volatile u_char *rp; 129 struct sci_softc *sc = (struct sci_softc *)dp; 130 struct zbus_args *zap; 131 struct scsipi_adapter *adapt = &sc->sc_adapter; 132 struct scsipi_channel *chan = &sc->sc_channel; 133 134 printf("\n"); 135 136 zap = auxp; 137 138 sc = (struct sci_softc *)dp; 139 rp = (u_char *)zap->va + 0x2000; 140 sc->sci_data = rp; 141 sc->sci_odata = rp; 142 sc->sci_icmd = rp + 0x10; 143 sc->sci_mode = rp + 0x20; 144 sc->sci_tcmd = rp + 0x30; 145 sc->sci_bus_csr = rp + 0x40; 146 sc->sci_sel_enb = rp + 0x40; 147 sc->sci_csr = rp + 0x50; 148 sc->sci_dma_send = rp + 0x50; 149 sc->sci_idata = rp + 0x60; 150 sc->sci_trecv = rp + 0x60; 151 sc->sci_iack = rp + 0x70; 152 sc->sci_irecv = rp + 0x70; 153 154 sc->dma_xfer_in = otgsc_dma_xfer_in; 155 sc->dma_xfer_out = otgsc_dma_xfer_out; 156 157 sc->sc_isr.isr_intr = otgsc_intr; 158 sc->sc_isr.isr_arg = sc; 159 sc->sc_isr.isr_ipl = 2; 160 add_isr(&sc->sc_isr); 161 162 scireset(sc); 163 164 /* 165 * Fill in the scsipi_adapter. 166 */ 167 memset(adapt, 0, sizeof(*adapt)); 168 adapt->adapt_dev = &sc->sc_dev; 169 adapt->adapt_nchannels = 1; 170 adapt->adapt_openings = 7; 171 adapt->adapt_max_periph = 1; 172 adapt->adapt_request = sci_scsipi_request; 173 adapt->adapt_minphys = sci_minphys; 174 175 /* 176 * Fill in the scsipi_channel. 177 */ 178 memset(chan, 0, sizeof(*chan)); 179 chan->chan_adapter = adapt; 180 chan->chan_bustype = &scsi_bustype; 181 chan->chan_channel = 0; 182 chan->chan_ntargets = 8; 183 chan->chan_nluns = 8; 184 chan->chan_id = 7; 185 186 /* 187 * attach all scsi units on us 188 */ 189 config_found(dp, chan, scsiprint); 190 } 191 192 int 193 otgsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 194 int phase) 195 { 196 int wait = sci_data_wait; 197 volatile register u_char *sci_dma = dev->sci_data + 0x100; 198 volatile register u_char *sci_csr = dev->sci_csr; 199 #ifdef DEBUG 200 u_char *obp = buf; 201 #endif 202 203 QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 204 205 *dev->sci_tcmd = phase; 206 *dev->sci_mode |= SCI_MODE_DMA; 207 *dev->sci_icmd = 0; 208 *dev->sci_irecv = 0; 209 while (len > 0) { 210 wait = sci_data_wait; 211 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 212 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 213 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 214 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 215 || --wait < 0) { 216 #ifdef DEBUG 217 if (sci_debug) 218 printf("otgsc_dma_in fail: l%d i%x w%d\n", 219 len, *dev->sci_bus_csr, wait); 220 #endif 221 *dev->sci_mode &= ~SCI_MODE_DMA; 222 return 0; 223 } 224 } 225 226 *buf++ = *sci_dma; 227 len--; 228 } 229 230 QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 231 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 232 obp[6], obp[7], obp[8], obp[9])); 233 234 *dev->sci_mode &= ~SCI_MODE_DMA; 235 return 0; 236 } 237 238 int 239 otgsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 240 int phase) 241 { 242 int wait = sci_data_wait; 243 volatile register u_char *sci_dma = dev->sci_data + 0x100; 244 volatile register u_char *sci_csr = dev->sci_csr; 245 246 QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 247 248 QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 249 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 250 buf[6], buf[7], buf[8], buf[9])); 251 252 *dev->sci_tcmd = phase; 253 *dev->sci_mode |= SCI_MODE_DMA; 254 *dev->sci_icmd = SCI_ICMD_DATA; 255 *dev->sci_dma_send = 0; 256 while (len > 0) { 257 wait = sci_data_wait; 258 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 259 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 260 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 261 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 262 || --wait < 0) { 263 #ifdef DEBUG 264 if (sci_debug) 265 printf("otgsc_dma_out fail: l%d i%x w%d\n", 266 len, *dev->sci_bus_csr, wait); 267 #endif 268 *dev->sci_mode &= ~SCI_MODE_DMA; 269 return 0; 270 } 271 } 272 273 *sci_dma = *buf++; 274 len--; 275 } 276 277 wait = sci_data_wait; 278 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 279 SCI_CSR_PHASE_MATCH && --wait); 280 281 282 *dev->sci_mode &= ~SCI_MODE_DMA; 283 return 0; 284 } 285 286 int 287 otgsc_intr(void *arg) 288 { 289 struct sci_softc *dev = arg; 290 u_char stat; 291 292 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 293 return (1); 294 stat = *dev->sci_iack; 295 *dev->sci_mode = 0; 296 return (1); 297 } 298
Indexes created Wed Sep 24 05:09:52 GMT 2025