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otgsc.c revision 1.3
      1 /*
      2  * Copyright (c) 1994 Michael L. Hitch
      3  * Copyright (c) 1982, 1990 The Regents of the University of California.
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by the University of
     17  *	California, Berkeley and its contributors.
     18  * 4. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  *	@(#)csa12gdma.c
     35  *	$Id: otgsc.c,v 1.3 1994/06/13 08:13:04 chopps Exp $
     36  */
     37 #include <sys/param.h>
     38 #include <sys/systm.h>
     39 #include <sys/kernel.h>
     40 #include <sys/device.h>
     41 #include <scsi/scsi_all.h>
     42 #include <scsi/scsiconf.h>
     43 #include <amiga/amiga/device.h>
     44 #include <amiga/dev/scireg.h>
     45 #include <amiga/dev/scivar.h>
     46 #include <amiga/dev/ztwobusvar.h>
     47 
     48 int otgscprint __P((void *auxp, char *));
     49 void otgscattach __P((struct device *, struct device *, void *));
     50 int otgscmatch __P((struct device *, struct cfdata *, void *));
     51 
     52 int otgsc_dma_xfer_in __P((struct sci_softc *dev, int len,
     53     register u_char *buf, int phase));
     54 int otgsc_dma_xfer_out __P((struct sci_softc *dev, int len,
     55     register u_char *buf, int phase));
     56 
     57 struct scsi_adapter otgsc_scsiswitch = {
     58 	sci_scsicmd,
     59 	sci_minphys,
     60 	0,			/* no lun support */
     61 	0,			/* no lun support */
     62 	sci_adinfo,
     63 	"otgsc",
     64 };
     65 
     66 struct scsi_device otgsc_scsidev = {
     67 	NULL,		/* use default error handler */
     68 	NULL,		/* do not have a start functio */
     69 	NULL,		/* have no async handler */
     70 	NULL,		/* Use default done routine */
     71 	"otgsc",
     72 	0,
     73 };
     74 
     75 #define QPRINTF
     76 
     77 #ifdef DEBUG
     78 extern int sci_debug;
     79 #endif
     80 
     81 extern int sci_data_wait;
     82 
     83 struct cfdriver otgsccd = {
     84 	NULL, "otgsc", otgscmatch, otgscattach,
     85 	DV_DULL, sizeof(struct sci_softc), NULL, 0 };
     86 
     87 /*
     88  * if we are my Hacker's SCSI board we are here.
     89  */
     90 int
     91 otgscmatch(pdp, cdp, auxp)
     92 	struct device *pdp;
     93 	struct cfdata *cdp;
     94 	void *auxp;
     95 {
     96 	struct ztwobus_args *zap;
     97 
     98 	zap = auxp;
     99 
    100 	/*
    101 	 * Check manufacturer and product id.
    102 	 */
    103 	if (zap->manid == 1058 && zap->prodid == 21)
    104 		return(1);
    105 	else
    106 		return(0);
    107 }
    108 
    109 void
    110 otgscattach(pdp, dp, auxp)
    111 	struct device *pdp, *dp;
    112 	void *auxp;
    113 {
    114 	volatile u_char *rp;
    115 	struct sci_softc *sc;
    116 	struct ztwobus_args *zap;
    117 
    118 	printf("\n");
    119 
    120 	zap = auxp;
    121 
    122 	sc = (struct sci_softc *)dp;
    123 	rp = zap->va + 0x2000;
    124 	sc->sci_data = rp;
    125 	sc->sci_odata = rp;
    126 	sc->sci_icmd = rp + 0x10;
    127 	sc->sci_mode = rp + 0x20;
    128 	sc->sci_tcmd = rp + 0x30;
    129 	sc->sci_bus_csr = rp + 0x40;
    130 	sc->sci_sel_enb = rp + 0x40;
    131 	sc->sci_csr = rp + 0x50;
    132 	sc->sci_dma_send = rp + 0x50;
    133 	sc->sci_idata = rp + 0x60;
    134 	sc->sci_trecv = rp + 0x60;
    135 	sc->sci_iack = rp + 0x70;
    136 	sc->sci_irecv = rp + 0x70;
    137 
    138 	sc->dma_xfer_in = otgsc_dma_xfer_in;
    139 	sc->dma_xfer_out = otgsc_dma_xfer_out;
    140 
    141 	scireset(sc);
    142 
    143 	sc->sc_link.adapter_softc = sc;
    144 	sc->sc_link.adapter_targ = 7;
    145 	sc->sc_link.adapter = &otgsc_scsiswitch;
    146 	sc->sc_link.device = &otgsc_scsidev;
    147 	TAILQ_INIT(&sc->sc_xslist);
    148 
    149 	/*
    150 	 * attach all scsi units on us
    151 	 */
    152 	config_found(dp, &sc->sc_link, otgscprint);
    153 }
    154 
    155 /*
    156  * print diag if pnp is NULL else just extra
    157  */
    158 int
    159 otgscprint(auxp, pnp)
    160 	void *auxp;
    161 	char *pnp;
    162 {
    163 	if (pnp == NULL)
    164 		return(UNCONF);
    165 	return(QUIET);
    166 }
    167 
    168 
    169 int
    170 otgsc_dma_xfer_in (dev, len, buf, phase)
    171 	struct sci_softc *dev;
    172 	int len;
    173 	register u_char *buf;
    174 	int phase;
    175 {
    176 	int wait = sci_data_wait;
    177 	u_char csr;
    178 	u_char *obp = buf;
    179 	volatile register u_char *sci_dma = dev->sci_data + 0x80;
    180 	volatile register u_char *sci_csr = dev->sci_csr;
    181 	volatile register u_char *sci_icmd = dev->sci_icmd;
    182 
    183 	QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    184 
    185 	*dev->sci_tcmd = phase;
    186 	*dev->sci_mode |= SCI_MODE_DMA;
    187 	*dev->sci_icmd = 0;
    188 	*dev->sci_irecv = 0;
    189 	while (len > 0) {
    190 		wait = sci_data_wait;
    191 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    192 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    193 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    194 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    195 			  || --wait < 0) {
    196 #ifdef DEBUG
    197 				if (sci_debug)
    198 					printf("otgsc_dma_in fail: l%d i%x w%d\n",
    199 					len, csr, wait);
    200 #endif
    201 				*dev->sci_mode &= ~SCI_MODE_DMA;
    202 				return 0;
    203 			}
    204 		}
    205 
    206 		*buf++ = *sci_dma;
    207 		len--;
    208 	}
    209 
    210 	QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    211 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    212 	  obp[6], obp[7], obp[8], obp[9]));
    213 
    214 	*dev->sci_mode &= ~SCI_MODE_DMA;
    215 	return 0;
    216 }
    217 
    218 int
    219 otgsc_dma_xfer_out (dev, len, buf, phase)
    220 	struct sci_softc *dev;
    221 	int len;
    222 	register u_char *buf;
    223 	int phase;
    224 {
    225 	int wait = sci_data_wait;
    226 	u_char csr;
    227 	u_char *obp = buf;
    228 	volatile register u_char *sci_dma = dev->sci_data + 0x80;
    229 	volatile register u_char *sci_csr = dev->sci_csr;
    230 	volatile register u_char *sci_icmd = dev->sci_icmd;
    231 
    232 	QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    233 
    234 	QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    235   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    236 	 buf[6], buf[7], buf[8], buf[9]));
    237 
    238 	*dev->sci_tcmd = phase;
    239 	*dev->sci_mode |= SCI_MODE_DMA;
    240 	*dev->sci_icmd = SCI_ICMD_DATA;
    241 	*dev->sci_dma_send = 0;
    242 	while (len > 0) {
    243 		wait = sci_data_wait;
    244 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    245 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    246 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    247 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    248 			  || --wait < 0) {
    249 #ifdef DEBUG
    250 				if (sci_debug)
    251 					printf("otgsc_dma_out fail: l%d i%x w%d\n",
    252 					len, csr, wait);
    253 #endif
    254 				*dev->sci_mode &= ~SCI_MODE_DMA;
    255 				return 0;
    256 			}
    257 		}
    258 
    259 		*sci_dma = *buf++;
    260 		len--;
    261 	}
    262 
    263 	wait = sci_data_wait;
    264 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    265 	  SCI_CSR_PHASE_MATCH && --wait);
    266 
    267 
    268 	*dev->sci_mode &= ~SCI_MODE_DMA;
    269 	return 0;
    270 }
    271 
    272 int
    273 otgsc_intr()
    274 {
    275 	struct sci_softc *dev;
    276 	int i, found;
    277 	u_char stat;
    278 
    279 	found = 0;
    280 	for (i = 0; i < otgsccd.cd_ndevs; i++) {
    281 		dev = otgsccd.cd_devs[i];
    282 		if (dev == NULL)
    283 			continue;
    284 		if ((*dev->sci_csr & SCI_CSR_INT) == 0)
    285 			continue;
    286 		++found;
    287 		stat = *dev->sci_iack;
    288 		*dev->sci_mode = 0;
    289 	}
    290 	return (found);
    291 }
    292