otgsc.c revision 1.4
1 /* $NetBSD: otgsc.c,v 1.4 1994/10/26 02:04:26 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)csa12gdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/device.h> 45 #include <amiga/dev/scireg.h> 46 #include <amiga/dev/scivar.h> 47 #include <amiga/dev/ztwobusvar.h> 48 49 int otgscprint __P((void *auxp, char *)); 50 void otgscattach __P((struct device *, struct device *, void *)); 51 int otgscmatch __P((struct device *, struct cfdata *, void *)); 52 53 int otgsc_dma_xfer_in __P((struct sci_softc *dev, int len, 54 register u_char *buf, int phase)); 55 int otgsc_dma_xfer_out __P((struct sci_softc *dev, int len, 56 register u_char *buf, int phase)); 57 58 struct scsi_adapter otgsc_scsiswitch = { 59 sci_scsicmd, 60 sci_minphys, 61 0, /* no lun support */ 62 0, /* no lun support */ 63 sci_adinfo, 64 "otgsc", 65 }; 66 67 struct scsi_device otgsc_scsidev = { 68 NULL, /* use default error handler */ 69 NULL, /* do not have a start functio */ 70 NULL, /* have no async handler */ 71 NULL, /* Use default done routine */ 72 "otgsc", 73 0, 74 }; 75 76 #define QPRINTF 77 78 #ifdef DEBUG 79 extern int sci_debug; 80 #endif 81 82 extern int sci_data_wait; 83 84 struct cfdriver otgsccd = { 85 NULL, "otgsc", otgscmatch, otgscattach, 86 DV_DULL, sizeof(struct sci_softc), NULL, 0 }; 87 88 /* 89 * if we are my Hacker's SCSI board we are here. 90 */ 91 int 92 otgscmatch(pdp, cdp, auxp) 93 struct device *pdp; 94 struct cfdata *cdp; 95 void *auxp; 96 { 97 struct ztwobus_args *zap; 98 99 zap = auxp; 100 101 /* 102 * Check manufacturer and product id. 103 */ 104 if (zap->manid == 1058 && zap->prodid == 21) 105 return(1); 106 else 107 return(0); 108 } 109 110 void 111 otgscattach(pdp, dp, auxp) 112 struct device *pdp, *dp; 113 void *auxp; 114 { 115 volatile u_char *rp; 116 struct sci_softc *sc; 117 struct ztwobus_args *zap; 118 119 printf("\n"); 120 121 zap = auxp; 122 123 sc = (struct sci_softc *)dp; 124 rp = zap->va + 0x2000; 125 sc->sci_data = rp; 126 sc->sci_odata = rp; 127 sc->sci_icmd = rp + 0x10; 128 sc->sci_mode = rp + 0x20; 129 sc->sci_tcmd = rp + 0x30; 130 sc->sci_bus_csr = rp + 0x40; 131 sc->sci_sel_enb = rp + 0x40; 132 sc->sci_csr = rp + 0x50; 133 sc->sci_dma_send = rp + 0x50; 134 sc->sci_idata = rp + 0x60; 135 sc->sci_trecv = rp + 0x60; 136 sc->sci_iack = rp + 0x70; 137 sc->sci_irecv = rp + 0x70; 138 139 sc->dma_xfer_in = otgsc_dma_xfer_in; 140 sc->dma_xfer_out = otgsc_dma_xfer_out; 141 142 scireset(sc); 143 144 sc->sc_link.adapter_softc = sc; 145 sc->sc_link.adapter_targ = 7; 146 sc->sc_link.adapter = &otgsc_scsiswitch; 147 sc->sc_link.device = &otgsc_scsidev; 148 TAILQ_INIT(&sc->sc_xslist); 149 150 /* 151 * attach all scsi units on us 152 */ 153 config_found(dp, &sc->sc_link, otgscprint); 154 } 155 156 /* 157 * print diag if pnp is NULL else just extra 158 */ 159 int 160 otgscprint(auxp, pnp) 161 void *auxp; 162 char *pnp; 163 { 164 if (pnp == NULL) 165 return(UNCONF); 166 return(QUIET); 167 } 168 169 170 int 171 otgsc_dma_xfer_in (dev, len, buf, phase) 172 struct sci_softc *dev; 173 int len; 174 register u_char *buf; 175 int phase; 176 { 177 int wait = sci_data_wait; 178 u_char csr; 179 u_char *obp = buf; 180 volatile register u_char *sci_dma = dev->sci_data + 0x80; 181 volatile register u_char *sci_csr = dev->sci_csr; 182 volatile register u_char *sci_icmd = dev->sci_icmd; 183 184 QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 185 186 *dev->sci_tcmd = phase; 187 *dev->sci_mode |= SCI_MODE_DMA; 188 *dev->sci_icmd = 0; 189 *dev->sci_irecv = 0; 190 while (len > 0) { 191 wait = sci_data_wait; 192 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 193 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 194 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 195 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 196 || --wait < 0) { 197 #ifdef DEBUG 198 if (sci_debug) 199 printf("otgsc_dma_in fail: l%d i%x w%d\n", 200 len, csr, wait); 201 #endif 202 *dev->sci_mode &= ~SCI_MODE_DMA; 203 return 0; 204 } 205 } 206 207 *buf++ = *sci_dma; 208 len--; 209 } 210 211 QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 212 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 213 obp[6], obp[7], obp[8], obp[9])); 214 215 *dev->sci_mode &= ~SCI_MODE_DMA; 216 return 0; 217 } 218 219 int 220 otgsc_dma_xfer_out (dev, len, buf, phase) 221 struct sci_softc *dev; 222 int len; 223 register u_char *buf; 224 int phase; 225 { 226 int wait = sci_data_wait; 227 u_char csr; 228 u_char *obp = buf; 229 volatile register u_char *sci_dma = dev->sci_data + 0x80; 230 volatile register u_char *sci_csr = dev->sci_csr; 231 volatile register u_char *sci_icmd = dev->sci_icmd; 232 233 QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 234 235 QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 236 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 237 buf[6], buf[7], buf[8], buf[9])); 238 239 *dev->sci_tcmd = phase; 240 *dev->sci_mode |= SCI_MODE_DMA; 241 *dev->sci_icmd = SCI_ICMD_DATA; 242 *dev->sci_dma_send = 0; 243 while (len > 0) { 244 wait = sci_data_wait; 245 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 246 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 247 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 248 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 249 || --wait < 0) { 250 #ifdef DEBUG 251 if (sci_debug) 252 printf("otgsc_dma_out fail: l%d i%x w%d\n", 253 len, csr, wait); 254 #endif 255 *dev->sci_mode &= ~SCI_MODE_DMA; 256 return 0; 257 } 258 } 259 260 *sci_dma = *buf++; 261 len--; 262 } 263 264 wait = sci_data_wait; 265 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 266 SCI_CSR_PHASE_MATCH && --wait); 267 268 269 *dev->sci_mode &= ~SCI_MODE_DMA; 270 return 0; 271 } 272 273 int 274 otgsc_intr() 275 { 276 struct sci_softc *dev; 277 int i, found; 278 u_char stat; 279 280 found = 0; 281 for (i = 0; i < otgsccd.cd_ndevs; i++) { 282 dev = otgsccd.cd_devs[i]; 283 if (dev == NULL) 284 continue; 285 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 286 continue; 287 ++found; 288 stat = *dev->sci_iack; 289 *dev->sci_mode = 0; 290 } 291 return (found); 292 } 293
Indexes created Tue Sep 23 02:09:52 GMT 2025