1 1.37 andvar /* $NetBSD: sci.c,v 1.37 2024/02/10 08:36:04 andvar Exp $ */ 2 1.8 cgd 3 1.5 chopps /* 4 1.1 chopps * Copyright (c) 1990 The Regents of the University of California. 5 1.1 chopps * All rights reserved. 6 1.1 chopps * 7 1.1 chopps * This code is derived from software contributed to Berkeley by 8 1.1 chopps * Van Jacobson of Lawrence Berkeley Laboratory. 9 1.1 chopps * 10 1.1 chopps * Redistribution and use in source and binary forms, with or without 11 1.1 chopps * modification, are permitted provided that the following conditions 12 1.1 chopps * are met: 13 1.1 chopps * 1. Redistributions of source code must retain the above copyright 14 1.1 chopps * notice, this list of conditions and the following disclaimer. 15 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 chopps * notice, this list of conditions and the following disclaimer in the 17 1.1 chopps * documentation and/or other materials provided with the distribution. 18 1.29 agc * 3. Neither the name of the University nor the names of its contributors 19 1.29 agc * may be used to endorse or promote products derived from this software 20 1.29 agc * without specific prior written permission. 21 1.29 agc * 22 1.29 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 1.29 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 1.29 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 1.29 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 1.29 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 1.29 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 1.29 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 1.29 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 1.29 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 1.29 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 1.29 agc * SUCH DAMAGE. 33 1.29 agc * 34 1.29 agc * @(#)scsi.c 7.5 (Berkeley) 5/4/91 35 1.29 agc */ 36 1.29 agc 37 1.29 agc /* 38 1.29 agc * Copyright (c) 1994 Michael L. Hitch 39 1.29 agc * 40 1.29 agc * This code is derived from software contributed to Berkeley by 41 1.29 agc * Van Jacobson of Lawrence Berkeley Laboratory. 42 1.29 agc * 43 1.29 agc * Redistribution and use in source and binary forms, with or without 44 1.29 agc * modification, are permitted provided that the following conditions 45 1.29 agc * are met: 46 1.29 agc * 1. Redistributions of source code must retain the above copyright 47 1.29 agc * notice, this list of conditions and the following disclaimer. 48 1.29 agc * 2. Redistributions in binary form must reproduce the above copyright 49 1.29 agc * notice, this list of conditions and the following disclaimer in the 50 1.29 agc * documentation and/or other materials provided with the distribution. 51 1.1 chopps * 52 1.31 mhitch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 1.31 mhitch * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 1.31 mhitch * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 1.31 mhitch * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 1.31 mhitch * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 1.31 mhitch * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 1.31 mhitch * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 1.31 mhitch * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 1.31 mhitch * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 1.31 mhitch * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 1.1 chopps * 63 1.5 chopps * @(#)scsi.c 7.5 (Berkeley) 5/4/91 64 1.1 chopps */ 65 1.1 chopps 66 1.1 chopps /* 67 1.1 chopps * AMIGA NCR 5380 scsi adaptor driver 68 1.1 chopps */ 69 1.27 aymeric 70 1.27 aymeric #include <sys/cdefs.h> 71 1.37 andvar __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.37 2024/02/10 08:36:04 andvar Exp $"); 72 1.1 chopps 73 1.1 chopps #include <sys/param.h> 74 1.1 chopps #include <sys/systm.h> 75 1.5 chopps #include <sys/device.h> 76 1.11 chopps #include <sys/disklabel.h> 77 1.1 chopps #include <sys/buf.h> 78 1.20 bouyer #include <dev/scsipi/scsi_all.h> 79 1.20 bouyer #include <dev/scsipi/scsipi_all.h> 80 1.20 bouyer #include <dev/scsipi/scsiconf.h> 81 1.5 chopps #include <machine/cpu.h> 82 1.5 chopps #include <amiga/amiga/device.h> 83 1.5 chopps #include <amiga/amiga/custom.h> 84 1.11 chopps #include <amiga/amiga/isr.h> 85 1.5 chopps #include <amiga/dev/scireg.h> 86 1.1 chopps #include <amiga/dev/scivar.h> 87 1.1 chopps 88 1.1 chopps /* 89 1.1 chopps * SCSI delays 90 1.1 chopps * In u-seconds, primarily for state changes on the SPC. 91 1.1 chopps */ 92 1.5 chopps #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 93 1.5 chopps #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 94 1.5 chopps #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 95 1.1 chopps 96 1.26 aymeric int sciicmd(struct sci_softc *, int, void *, int, void *, int,u_char); 97 1.26 aymeric int scigo(struct sci_softc *, struct scsipi_xfer *); 98 1.26 aymeric int sciselectbus(struct sci_softc *, u_char, u_char); 99 1.32 jmc void sciabort(struct sci_softc *, const char *); 100 1.26 aymeric void scierror(struct sci_softc *, u_char); 101 1.26 aymeric void scisetdelay(int); 102 1.26 aymeric void sci_scsidone(struct sci_softc *, int); 103 1.26 aymeric void sci_donextcmd(struct sci_softc *); 104 1.26 aymeric int sci_ixfer_out(struct sci_softc *, int, register u_char *, int); 105 1.26 aymeric void sci_ixfer_in(struct sci_softc *, int, register u_char *, int); 106 1.5 chopps 107 1.5 chopps int sci_cmd_wait = SCI_CMD_WAIT; 108 1.5 chopps int sci_data_wait = SCI_DATA_WAIT; 109 1.5 chopps int sci_init_wait = SCI_INIT_WAIT; 110 1.1 chopps 111 1.5 chopps int sci_no_dma = 0; 112 1.5 chopps 113 1.5 chopps #ifdef DEBUG 114 1.19 christos #define QPRINTF(a) if (sci_debug > 1) printf a 115 1.5 chopps int sci_debug = 0; 116 1.1 chopps #else 117 1.16 veego #define QPRINTF(a) 118 1.1 chopps #endif 119 1.1 chopps 120 1.5 chopps /* 121 1.5 chopps * default minphys routine for sci based controllers 122 1.5 chopps */ 123 1.13 mycroft void 124 1.26 aymeric sci_minphys(struct buf *bp) 125 1.5 chopps { 126 1.13 mycroft 127 1.5 chopps /* 128 1.13 mycroft * No max transfer at this level. 129 1.5 chopps */ 130 1.13 mycroft minphys(bp); 131 1.5 chopps } 132 1.5 chopps 133 1.5 chopps /* 134 1.5 chopps * used by specific sci controller 135 1.5 chopps * 136 1.5 chopps * it appears that the higher level code does nothing with LUN's 137 1.5 chopps * so I will too. I could plug it in, however so could they 138 1.20 bouyer * in scsi_scsipi_cmd(). 139 1.5 chopps */ 140 1.25 bouyer void 141 1.26 aymeric sci_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 142 1.26 aymeric void *arg) 143 1.25 bouyer { 144 1.20 bouyer struct scsipi_xfer *xs; 145 1.36 christos #ifdef DIAGNOSTIC 146 1.25 bouyer struct scsipi_periph *periph; 147 1.36 christos #endif 148 1.35 chs struct sci_softc *dev = device_private(chan->chan_adapter->adapt_dev); 149 1.5 chopps int flags, s; 150 1.1 chopps 151 1.25 bouyer switch (req) { 152 1.25 bouyer case ADAPTER_REQ_RUN_XFER: 153 1.25 bouyer xs = arg; 154 1.36 christos #ifdef DIAGNOSTIC 155 1.25 bouyer periph = xs->xs_periph; 156 1.36 christos #endif 157 1.25 bouyer flags = xs->xs_control; 158 1.1 chopps 159 1.25 bouyer if (flags & XS_CTL_DATA_UIO) 160 1.5 chopps panic("sci: scsi data uio requested"); 161 1.30 bouyer 162 1.30 bouyer s = splbio(); 163 1.13 mycroft 164 1.25 bouyer if (dev->sc_xs && flags & XS_CTL_POLL) 165 1.25 bouyer panic("sci_scsicmd: busy"); 166 1.1 chopps 167 1.25 bouyer #ifdef DIAGNOSTIC 168 1.25 bouyer /* 169 1.25 bouyer * This should never happen as we track the resources 170 1.25 bouyer * in the mid-layer. 171 1.25 bouyer */ 172 1.25 bouyer if (dev->sc_xs) { 173 1.25 bouyer scsipi_printaddr(periph); 174 1.25 bouyer printf("unable to allocate scb\n"); 175 1.25 bouyer panic("sea_scsipi_request"); 176 1.25 bouyer } 177 1.25 bouyer #endif 178 1.25 bouyer 179 1.25 bouyer dev->sc_xs = xs; 180 1.5 chopps splx(s); 181 1.1 chopps 182 1.25 bouyer /* 183 1.25 bouyer * nothing is pending do it now. 184 1.25 bouyer */ 185 1.25 bouyer sci_donextcmd(dev); 186 1.25 bouyer 187 1.25 bouyer return; 188 1.1 chopps 189 1.25 bouyer case ADAPTER_REQ_GROW_RESOURCES: 190 1.25 bouyer return; 191 1.1 chopps 192 1.25 bouyer case ADAPTER_REQ_SET_XFER_MODE: 193 1.25 bouyer return; 194 1.25 bouyer } 195 1.5 chopps } 196 1.1 chopps 197 1.5 chopps /* 198 1.5 chopps * entered with dev->sc_xs pointing to the next xfer to perform 199 1.5 chopps */ 200 1.5 chopps void 201 1.26 aymeric sci_donextcmd(struct sci_softc *dev) 202 1.5 chopps { 203 1.20 bouyer struct scsipi_xfer *xs; 204 1.25 bouyer struct scsipi_periph *periph; 205 1.5 chopps int flags, phase, stat; 206 1.5 chopps 207 1.5 chopps xs = dev->sc_xs; 208 1.25 bouyer periph = xs->xs_periph; 209 1.21 thorpej flags = xs->xs_control; 210 1.5 chopps 211 1.21 thorpej if (flags & XS_CTL_DATA_IN) 212 1.5 chopps phase = DATA_IN_PHASE; 213 1.21 thorpej else if (flags & XS_CTL_DATA_OUT) 214 1.5 chopps phase = DATA_OUT_PHASE; 215 1.5 chopps else 216 1.5 chopps phase = STATUS_PHASE; 217 1.13 mycroft 218 1.21 thorpej if (flags & XS_CTL_RESET) 219 1.5 chopps scireset(dev); 220 1.1 chopps 221 1.5 chopps dev->sc_stat[0] = -1; 222 1.25 bouyer xs->cmd->bytes[0] |= periph->periph_lun << 5; 223 1.21 thorpej if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 224 1.25 bouyer stat = sciicmd(dev, periph->periph_target, xs->cmd, xs->cmdlen, 225 1.5 chopps xs->data, xs->datalen, phase); 226 1.5 chopps else if (scigo(dev, xs) == 0) 227 1.5 chopps return; 228 1.13 mycroft else 229 1.5 chopps stat = dev->sc_stat[0]; 230 1.13 mycroft 231 1.5 chopps sci_scsidone(dev, stat); 232 1.5 chopps } 233 1.1 chopps 234 1.5 chopps void 235 1.26 aymeric sci_scsidone(struct sci_softc *dev, int stat) 236 1.5 chopps { 237 1.20 bouyer struct scsipi_xfer *xs; 238 1.5 chopps 239 1.5 chopps xs = dev->sc_xs; 240 1.5 chopps #ifdef DIAGNOSTIC 241 1.5 chopps if (xs == NULL) 242 1.5 chopps panic("sci_scsidone"); 243 1.11 chopps #endif 244 1.5 chopps xs->status = stat; 245 1.10 chopps if (stat == 0) 246 1.5 chopps xs->resid = 0; 247 1.5 chopps else { 248 1.5 chopps switch(stat) { 249 1.5 chopps case SCSI_CHECK: 250 1.25 bouyer xs->resid = 0; 251 1.33 tsutsui /* FALLTHROUGH */ 252 1.5 chopps case SCSI_BUSY: 253 1.5 chopps xs->error = XS_BUSY; 254 1.5 chopps break; 255 1.5 chopps default: 256 1.5 chopps xs->error = XS_DRIVER_STUFFUP; 257 1.5 chopps QPRINTF(("sci_scsicmd() bad %x\n", stat)); 258 1.5 chopps break; 259 1.5 chopps } 260 1.5 chopps } 261 1.21 thorpej 262 1.20 bouyer scsipi_done(xs); 263 1.1 chopps 264 1.1 chopps } 265 1.1 chopps 266 1.5 chopps void 267 1.32 jmc sciabort(struct sci_softc *dev, const char *where) 268 1.1 chopps { 269 1.19 christos printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 270 1.35 chs device_xname(dev->sc_dev), where, *dev->sci_csr, *dev->sci_bus_csr); 271 1.1 chopps 272 1.1 chopps if (dev->sc_flags & SCI_SELECTED) { 273 1.1 chopps 274 1.7 chopps /* lets just hope it worked.. */ 275 1.7 chopps dev->sc_flags &= ~SCI_SELECTED; 276 1.1 chopps /* XXX */ 277 1.5 chopps scireset (dev); 278 1.1 chopps } 279 1.1 chopps } 280 1.1 chopps 281 1.1 chopps /* 282 1.1 chopps * XXX Set/reset long delays. 283 1.1 chopps * 284 1.1 chopps * if delay == 0, reset default delays 285 1.1 chopps * if delay < 0, set both delays to default long initialization values 286 1.1 chopps * if delay > 0, set both delays to this value 287 1.1 chopps * 288 1.1 chopps * Used when a devices is expected to respond slowly (e.g. during 289 1.1 chopps * initialization). 290 1.1 chopps */ 291 1.1 chopps void 292 1.26 aymeric scisetdelay(int del) 293 1.1 chopps { 294 1.1 chopps static int saved_cmd_wait, saved_data_wait; 295 1.1 chopps 296 1.5 chopps if (del) { 297 1.1 chopps saved_cmd_wait = sci_cmd_wait; 298 1.1 chopps saved_data_wait = sci_data_wait; 299 1.5 chopps if (del > 0) 300 1.5 chopps sci_cmd_wait = sci_data_wait = del; 301 1.1 chopps else 302 1.1 chopps sci_cmd_wait = sci_data_wait = sci_init_wait; 303 1.1 chopps } else { 304 1.1 chopps sci_cmd_wait = saved_cmd_wait; 305 1.1 chopps sci_data_wait = saved_data_wait; 306 1.1 chopps } 307 1.1 chopps } 308 1.1 chopps 309 1.1 chopps void 310 1.26 aymeric scireset(struct sci_softc *dev) 311 1.1 chopps { 312 1.16 veego u_int s; 313 1.16 veego u_char my_id; 314 1.1 chopps 315 1.7 chopps dev->sc_flags &= ~SCI_SELECTED; 316 1.1 chopps if (dev->sc_flags & SCI_ALIVE) 317 1.5 chopps sciabort(dev, "reset"); 318 1.1 chopps 319 1.35 chs printf("%s: ", device_xname(dev->sc_dev)); 320 1.1 chopps 321 1.1 chopps s = splbio(); 322 1.1 chopps /* preserve our ID for now */ 323 1.1 chopps my_id = 7; 324 1.1 chopps 325 1.1 chopps /* 326 1.5 chopps * Reset the chip 327 1.1 chopps */ 328 1.1 chopps *dev->sci_icmd = SCI_ICMD_TEST; 329 1.1 chopps *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 330 1.6 chopps delay (25); 331 1.1 chopps *dev->sci_icmd = 0; 332 1.1 chopps 333 1.1 chopps /* 334 1.1 chopps * Set up various chip parameters 335 1.1 chopps */ 336 1.1 chopps *dev->sci_icmd = 0; 337 1.1 chopps *dev->sci_tcmd = 0; 338 1.1 chopps *dev->sci_sel_enb = 0; 339 1.1 chopps 340 1.1 chopps /* anything else was zeroed by reset */ 341 1.1 chopps 342 1.1 chopps splx (s); 343 1.1 chopps 344 1.19 christos printf("sci id %d\n", my_id); 345 1.1 chopps dev->sc_flags |= SCI_ALIVE; 346 1.1 chopps } 347 1.1 chopps 348 1.5 chopps void 349 1.26 aymeric scierror(struct sci_softc *dev, u_char csr) 350 1.1 chopps { 351 1.20 bouyer struct scsipi_xfer *xs; 352 1.1 chopps 353 1.5 chopps xs = dev->sc_xs; 354 1.5 chopps 355 1.5 chopps #ifdef DIAGNOSTIC 356 1.5 chopps if (xs == NULL) 357 1.5 chopps panic("scierror"); 358 1.5 chopps #endif 359 1.21 thorpej if (xs->xs_control & XS_CTL_SILENT) 360 1.5 chopps return; 361 1.5 chopps 362 1.35 chs printf("%s: ", device_xname(dev->sc_dev)); 363 1.19 christos printf("csr == 0x%02i\n", csr); /* XXX */ 364 1.1 chopps } 365 1.1 chopps 366 1.5 chopps /* 367 1.5 chopps * select the bus, return when selected or error. 368 1.5 chopps */ 369 1.5 chopps int 370 1.26 aymeric sciselectbus(struct sci_softc *dev, u_char target, u_char our_addr) 371 1.1 chopps { 372 1.1 chopps register int timeo = 2500; 373 1.1 chopps 374 1.5 chopps QPRINTF (("sciselectbus %d\n", target)); 375 1.1 chopps 376 1.1 chopps /* if we're already selected, return */ 377 1.1 chopps if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 378 1.1 chopps return 1; 379 1.1 chopps 380 1.1 chopps if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 381 1.1 chopps (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 382 1.1 chopps (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 383 1.1 chopps return 1; 384 1.1 chopps 385 1.1 chopps *dev->sci_tcmd = 0; 386 1.1 chopps *dev->sci_odata = 0x80 + (1 << target); 387 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 388 1.1 chopps while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 389 1.1 chopps if (--timeo > 0) { 390 1.6 chopps delay(100); 391 1.1 chopps } else { 392 1.1 chopps break; 393 1.1 chopps } 394 1.1 chopps } 395 1.1 chopps if (timeo) { 396 1.1 chopps *dev->sci_icmd = 0; 397 1.1 chopps dev->sc_flags |= SCI_SELECTED; 398 1.1 chopps return (0); 399 1.1 chopps } 400 1.1 chopps *dev->sci_icmd = 0; 401 1.1 chopps return (1); 402 1.1 chopps } 403 1.1 chopps 404 1.5 chopps int 405 1.26 aymeric sci_ixfer_out(register struct sci_softc *dev, int len, register u_char *buf, 406 1.26 aymeric int phase) 407 1.1 chopps { 408 1.1 chopps register int wait = sci_data_wait; 409 1.1 chopps u_char csr; 410 1.1 chopps 411 1.5 chopps QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 412 1.1 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 413 1.1 chopps buf[6], buf[7], buf[8], buf[9])); 414 1.1 chopps 415 1.1 chopps *dev->sci_tcmd = phase; 416 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA; 417 1.1 chopps for (;len > 0; len--) { 418 1.1 chopps csr = *dev->sci_bus_csr; 419 1.1 chopps while (!(csr & SCI_BUS_REQ)) { 420 1.1 chopps if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 421 1.1 chopps #ifdef DEBUG 422 1.1 chopps if (sci_debug) 423 1.19 christos printf("sci_ixfer_out fail: l%d i%x w%d\n", 424 1.1 chopps len, csr, wait); 425 1.1 chopps #endif 426 1.1 chopps return (len); 427 1.1 chopps } 428 1.6 chopps delay(1); 429 1.1 chopps csr = *dev->sci_bus_csr; 430 1.1 chopps } 431 1.1 chopps 432 1.1 chopps if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 433 1.1 chopps break; 434 1.1 chopps *dev->sci_odata = *buf; 435 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 436 1.1 chopps buf++; 437 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_REQ); 438 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA; 439 1.1 chopps } 440 1.1 chopps 441 1.5 chopps QPRINTF(("sci_ixfer_out done\n")); 442 1.1 chopps return (0); 443 1.1 chopps } 444 1.1 chopps 445 1.5 chopps void 446 1.26 aymeric sci_ixfer_in(struct sci_softc *dev, int len, register u_char *buf, int phase) 447 1.1 chopps { 448 1.1 chopps int wait = sci_data_wait; 449 1.1 chopps u_char csr; 450 1.1 chopps volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 451 1.1 chopps volatile register u_char *sci_data = dev->sci_data; 452 1.1 chopps volatile register u_char *sci_icmd = dev->sci_icmd; 453 1.16 veego #ifdef DEBUG 454 1.16 veego u_char *obp = buf; 455 1.16 veego #endif 456 1.1 chopps 457 1.1 chopps csr = *sci_bus_csr; 458 1.1 chopps 459 1.5 chopps QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 460 1.1 chopps 461 1.1 chopps *dev->sci_tcmd = phase; 462 1.1 chopps *sci_icmd = 0; 463 1.1 chopps for (;len > 0; len--) { 464 1.1 chopps csr = *sci_bus_csr; 465 1.1 chopps while (!(csr & SCI_BUS_REQ)) { 466 1.1 chopps if (!(csr & SCI_BUS_BSY) || --wait < 0) { 467 1.1 chopps #ifdef DEBUG 468 1.1 chopps if (sci_debug) 469 1.19 christos printf("sci_ixfer_in fail: l%d i%x w%d\n", 470 1.1 chopps len, csr, wait); 471 1.1 chopps #endif 472 1.1 chopps return; 473 1.1 chopps } 474 1.1 chopps 475 1.6 chopps delay(1); 476 1.1 chopps csr = *sci_bus_csr; 477 1.1 chopps } 478 1.1 chopps 479 1.1 chopps if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 480 1.1 chopps break; 481 1.1 chopps *buf = *sci_data; 482 1.1 chopps *sci_icmd = SCI_ICMD_ACK; 483 1.1 chopps buf++; 484 1.1 chopps while (*sci_bus_csr & SCI_BUS_REQ); 485 1.1 chopps *sci_icmd = 0; 486 1.1 chopps } 487 1.1 chopps 488 1.5 chopps QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 489 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 490 1.1 chopps obp[6], obp[7], obp[8], obp[9])); 491 1.1 chopps } 492 1.1 chopps 493 1.1 chopps /* 494 1.1 chopps * SCSI 'immediate' command: issue a command to some SCSI device 495 1.1 chopps * and get back an 'immediate' response (i.e., do programmed xfer 496 1.1 chopps * to get the response data). 'cbuf' is a buffer containing a scsi 497 1.1 chopps * command of length clen bytes. 'buf' is a buffer of length 'len' 498 1.1 chopps * bytes for data. The transfer direction is determined by the device 499 1.1 chopps * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 500 1.1 chopps * command must supply no data. 'xferphase' is the bus phase the 501 1.1 chopps * caller expects to happen after the command is issued. It should 502 1.1 chopps * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 503 1.1 chopps */ 504 1.5 chopps int 505 1.26 aymeric sciicmd(struct sci_softc *dev, int target, void *cbuf, int clen, void *buf, 506 1.26 aymeric int len, u_char xferphase) 507 1.1 chopps { 508 1.16 veego u_char phase; 509 1.36 christos int wait; 510 1.1 chopps 511 1.1 chopps /* select the SCSI bus (it's an error if bus isn't free) */ 512 1.5 chopps if (sciselectbus (dev, target, dev->sc_scsi_addr)) 513 1.1 chopps return -1; 514 1.1 chopps /* 515 1.1 chopps * Wait for a phase change (or error) then let the device 516 1.1 chopps * sequence us through the various SCSI phases. 517 1.1 chopps */ 518 1.1 chopps dev->sc_stat[0] = 0xff; 519 1.1 chopps dev->sc_msg[0] = 0xff; 520 1.1 chopps phase = CMD_PHASE; 521 1.1 chopps while (1) { 522 1.1 chopps wait = sci_cmd_wait; 523 1.1 chopps 524 1.1 chopps while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 525 1.1 chopps 526 1.1 chopps QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 527 1.1 chopps if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 528 1.1 chopps return -1; 529 1.1 chopps } 530 1.1 chopps phase = SCI_PHASE(*dev->sci_bus_csr); 531 1.1 chopps 532 1.1 chopps switch (phase) { 533 1.1 chopps case CMD_PHASE: 534 1.5 chopps if (sci_ixfer_out (dev, clen, cbuf, phase)) 535 1.1 chopps goto abort; 536 1.1 chopps phase = xferphase; 537 1.1 chopps break; 538 1.1 chopps 539 1.1 chopps case DATA_IN_PHASE: 540 1.1 chopps if (len <= 0) 541 1.1 chopps goto abort; 542 1.1 chopps wait = sci_data_wait; 543 1.5 chopps sci_ixfer_in (dev, len, buf, phase); 544 1.1 chopps phase = STATUS_PHASE; 545 1.1 chopps break; 546 1.1 chopps 547 1.1 chopps case DATA_OUT_PHASE: 548 1.1 chopps if (len <= 0) 549 1.1 chopps goto abort; 550 1.1 chopps wait = sci_data_wait; 551 1.5 chopps if (sci_ixfer_out (dev, len, buf, phase)) 552 1.1 chopps goto abort; 553 1.1 chopps phase = STATUS_PHASE; 554 1.1 chopps break; 555 1.1 chopps 556 1.1 chopps case MESG_IN_PHASE: 557 1.1 chopps dev->sc_msg[0] = 0xff; 558 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_msg,phase); 559 1.1 chopps dev->sc_flags &= ~SCI_SELECTED; 560 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_BSY); 561 1.1 chopps goto out; 562 1.1 chopps break; 563 1.1 chopps 564 1.1 chopps case MESG_OUT_PHASE: 565 1.1 chopps phase = STATUS_PHASE; 566 1.1 chopps break; 567 1.1 chopps 568 1.1 chopps case STATUS_PHASE: 569 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_stat, phase); 570 1.1 chopps phase = MESG_IN_PHASE; 571 1.1 chopps break; 572 1.1 chopps 573 1.1 chopps case BUS_FREE_PHASE: 574 1.1 chopps goto out; 575 1.1 chopps 576 1.1 chopps default: 577 1.19 christos printf("sci: unexpected phase %d in icmd from %d\n", 578 1.1 chopps phase, target); 579 1.1 chopps goto abort; 580 1.1 chopps } 581 1.1 chopps #if 0 582 1.1 chopps if (wait <= 0) 583 1.1 chopps goto abort; 584 1.36 christos #else 585 1.36 christos __USE(wait); 586 1.1 chopps #endif 587 1.1 chopps } 588 1.1 chopps 589 1.1 chopps abort: 590 1.5 chopps sciabort(dev, "icmd"); 591 1.1 chopps out: 592 1.1 chopps QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 593 1.1 chopps return (dev->sc_stat[0]); 594 1.1 chopps } 595 1.1 chopps 596 1.1 chopps int 597 1.26 aymeric scigo(struct sci_softc *dev, struct scsipi_xfer *xs) 598 1.1 chopps { 599 1.16 veego int count, target; 600 1.16 veego u_char phase, *addr; 601 1.5 chopps 602 1.25 bouyer target = xs->xs_periph->periph_target; 603 1.5 chopps count = xs->datalen; 604 1.5 chopps addr = xs->data; 605 1.1 chopps 606 1.1 chopps if (sci_no_dma) { 607 1.5 chopps sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 608 1.1 chopps addr, count, 609 1.21 thorpej xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 610 1.1 chopps 611 1.5 chopps return (1); 612 1.1 chopps } 613 1.1 chopps 614 1.1 chopps /* select the SCSI bus (it's an error if bus isn't free) */ 615 1.5 chopps if (sciselectbus (dev, target, dev->sc_scsi_addr)) 616 1.1 chopps return -1; 617 1.1 chopps /* 618 1.1 chopps * Wait for a phase change (or error) then let the device 619 1.1 chopps * sequence us through the various SCSI phases. 620 1.1 chopps */ 621 1.1 chopps dev->sc_stat[0] = 0xff; 622 1.1 chopps dev->sc_msg[0] = 0xff; 623 1.1 chopps phase = CMD_PHASE; 624 1.1 chopps while (1) { 625 1.1 chopps while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 626 1.1 chopps SCI_BUS_BSY); 627 1.1 chopps 628 1.1 chopps QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 629 1.1 chopps if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 630 1.1 chopps goto abort; 631 1.1 chopps } 632 1.1 chopps phase = SCI_PHASE(*dev->sci_bus_csr); 633 1.1 chopps 634 1.1 chopps switch (phase) { 635 1.1 chopps case CMD_PHASE: 636 1.16 veego if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 637 1.1 chopps goto abort; 638 1.21 thorpej phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 639 1.1 chopps break; 640 1.1 chopps 641 1.1 chopps case DATA_IN_PHASE: 642 1.1 chopps if (count <= 0) 643 1.1 chopps goto abort; 644 1.37 andvar /* XXX use pseudo DMA if available */ 645 1.1 chopps if (count >= 128 && dev->dma_xfer_in) 646 1.1 chopps (*dev->dma_xfer_in)(dev, count, addr, phase); 647 1.1 chopps else 648 1.5 chopps sci_ixfer_in (dev, count, addr, phase); 649 1.1 chopps phase = STATUS_PHASE; 650 1.1 chopps break; 651 1.1 chopps 652 1.1 chopps case DATA_OUT_PHASE: 653 1.1 chopps if (count <= 0) 654 1.1 chopps goto abort; 655 1.37 andvar /* XXX use pseudo DMA if available */ 656 1.1 chopps if (count >= 128 && dev->dma_xfer_out) 657 1.1 chopps (*dev->dma_xfer_out)(dev, count, addr, phase); 658 1.1 chopps else 659 1.5 chopps if (sci_ixfer_out (dev, count, addr, phase)) 660 1.1 chopps goto abort; 661 1.1 chopps phase = STATUS_PHASE; 662 1.1 chopps break; 663 1.1 chopps 664 1.1 chopps case MESG_IN_PHASE: 665 1.1 chopps dev->sc_msg[0] = 0xff; 666 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_msg,phase); 667 1.1 chopps dev->sc_flags &= ~SCI_SELECTED; 668 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_BSY); 669 1.1 chopps goto out; 670 1.1 chopps break; 671 1.1 chopps 672 1.1 chopps case MESG_OUT_PHASE: 673 1.1 chopps phase = STATUS_PHASE; 674 1.1 chopps break; 675 1.1 chopps 676 1.1 chopps case STATUS_PHASE: 677 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_stat, phase); 678 1.1 chopps phase = MESG_IN_PHASE; 679 1.1 chopps break; 680 1.1 chopps 681 1.1 chopps case BUS_FREE_PHASE: 682 1.1 chopps goto out; 683 1.1 chopps 684 1.1 chopps default: 685 1.19 christos printf("sci: unexpected phase %d in icmd from %d\n", 686 1.5 chopps phase, target); 687 1.1 chopps goto abort; 688 1.1 chopps } 689 1.1 chopps } 690 1.1 chopps 691 1.1 chopps abort: 692 1.5 chopps sciabort(dev, "go"); 693 1.1 chopps out: 694 1.1 chopps QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 695 1.5 chopps return (1); 696 1.1 chopps } 697