sci.c revision 1.27 1 1.27 aymeric /* $NetBSD: sci.c,v 1.27 2002/01/28 09:57:02 aymeric Exp $ */
2 1.8 cgd
3 1.5 chopps /*
4 1.5 chopps * Copyright (c) 1994 Michael L. Hitch
5 1.1 chopps * Copyright (c) 1990 The Regents of the University of California.
6 1.1 chopps * All rights reserved.
7 1.1 chopps *
8 1.1 chopps * This code is derived from software contributed to Berkeley by
9 1.1 chopps * Van Jacobson of Lawrence Berkeley Laboratory.
10 1.1 chopps *
11 1.1 chopps * Redistribution and use in source and binary forms, with or without
12 1.1 chopps * modification, are permitted provided that the following conditions
13 1.1 chopps * are met:
14 1.1 chopps * 1. Redistributions of source code must retain the above copyright
15 1.1 chopps * notice, this list of conditions and the following disclaimer.
16 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 chopps * notice, this list of conditions and the following disclaimer in the
18 1.1 chopps * documentation and/or other materials provided with the distribution.
19 1.1 chopps * 3. All advertising materials mentioning features or use of this software
20 1.1 chopps * must display the following acknowledgement:
21 1.1 chopps * This product includes software developed by the University of
22 1.1 chopps * California, Berkeley and its contributors.
23 1.1 chopps * 4. Neither the name of the University nor the names of its contributors
24 1.1 chopps * may be used to endorse or promote products derived from this software
25 1.1 chopps * without specific prior written permission.
26 1.1 chopps *
27 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 1.1 chopps * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 1.1 chopps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 1.1 chopps * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 1.1 chopps * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 1.1 chopps * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 1.1 chopps * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 1.1 chopps * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 1.1 chopps * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 1.1 chopps * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 1.1 chopps * SUCH DAMAGE.
38 1.1 chopps *
39 1.5 chopps * @(#)scsi.c 7.5 (Berkeley) 5/4/91
40 1.1 chopps */
41 1.1 chopps
42 1.1 chopps /*
43 1.1 chopps * AMIGA NCR 5380 scsi adaptor driver
44 1.1 chopps */
45 1.27 aymeric
46 1.27 aymeric #include <sys/cdefs.h>
47 1.27 aymeric __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.27 2002/01/28 09:57:02 aymeric Exp $");
48 1.1 chopps
49 1.1 chopps #include <sys/param.h>
50 1.1 chopps #include <sys/systm.h>
51 1.5 chopps #include <sys/device.h>
52 1.11 chopps #include <sys/disklabel.h>
53 1.11 chopps #include <sys/dkstat.h>
54 1.1 chopps #include <sys/buf.h>
55 1.20 bouyer #include <dev/scsipi/scsi_all.h>
56 1.20 bouyer #include <dev/scsipi/scsipi_all.h>
57 1.20 bouyer #include <dev/scsipi/scsiconf.h>
58 1.23 mrg #include <uvm/uvm_extern.h>
59 1.1 chopps #include <machine/pmap.h>
60 1.5 chopps #include <machine/cpu.h>
61 1.5 chopps #include <amiga/amiga/device.h>
62 1.5 chopps #include <amiga/amiga/custom.h>
63 1.11 chopps #include <amiga/amiga/isr.h>
64 1.5 chopps #include <amiga/dev/scireg.h>
65 1.1 chopps #include <amiga/dev/scivar.h>
66 1.1 chopps
67 1.1 chopps /*
68 1.1 chopps * SCSI delays
69 1.1 chopps * In u-seconds, primarily for state changes on the SPC.
70 1.1 chopps */
71 1.5 chopps #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */
72 1.5 chopps #define SCI_DATA_WAIT 50000 /* wait per data in/out step */
73 1.5 chopps #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */
74 1.1 chopps
75 1.26 aymeric int sciicmd(struct sci_softc *, int, void *, int, void *, int,u_char);
76 1.26 aymeric int scigo(struct sci_softc *, struct scsipi_xfer *);
77 1.26 aymeric int sciselectbus(struct sci_softc *, u_char, u_char);
78 1.26 aymeric void sciabort(struct sci_softc *, char *);
79 1.26 aymeric void scierror(struct sci_softc *, u_char);
80 1.26 aymeric void scisetdelay(int);
81 1.26 aymeric void sci_scsidone(struct sci_softc *, int);
82 1.26 aymeric void sci_donextcmd(struct sci_softc *);
83 1.26 aymeric int sci_ixfer_out(struct sci_softc *, int, register u_char *, int);
84 1.26 aymeric void sci_ixfer_in(struct sci_softc *, int, register u_char *, int);
85 1.5 chopps
86 1.5 chopps int sci_cmd_wait = SCI_CMD_WAIT;
87 1.5 chopps int sci_data_wait = SCI_DATA_WAIT;
88 1.5 chopps int sci_init_wait = SCI_INIT_WAIT;
89 1.1 chopps
90 1.5 chopps int sci_no_dma = 0;
91 1.5 chopps
92 1.5 chopps #ifdef DEBUG
93 1.19 christos #define QPRINTF(a) if (sci_debug > 1) printf a
94 1.5 chopps int sci_debug = 0;
95 1.1 chopps #else
96 1.16 veego #define QPRINTF(a)
97 1.1 chopps #endif
98 1.1 chopps
99 1.5 chopps /*
100 1.5 chopps * default minphys routine for sci based controllers
101 1.5 chopps */
102 1.13 mycroft void
103 1.26 aymeric sci_minphys(struct buf *bp)
104 1.5 chopps {
105 1.13 mycroft
106 1.5 chopps /*
107 1.13 mycroft * No max transfer at this level.
108 1.5 chopps */
109 1.13 mycroft minphys(bp);
110 1.5 chopps }
111 1.5 chopps
112 1.5 chopps /*
113 1.5 chopps * used by specific sci controller
114 1.5 chopps *
115 1.5 chopps * it appears that the higher level code does nothing with LUN's
116 1.5 chopps * so I will too. I could plug it in, however so could they
117 1.20 bouyer * in scsi_scsipi_cmd().
118 1.5 chopps */
119 1.25 bouyer void
120 1.26 aymeric sci_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
121 1.26 aymeric void *arg)
122 1.25 bouyer {
123 1.20 bouyer struct scsipi_xfer *xs;
124 1.25 bouyer struct scsipi_periph *periph;
125 1.25 bouyer struct sci_softc *dev = (void *)chan->chan_adapter->adapt_dev;
126 1.5 chopps int flags, s;
127 1.1 chopps
128 1.25 bouyer switch (req) {
129 1.25 bouyer case ADAPTER_REQ_RUN_XFER:
130 1.25 bouyer xs = arg;
131 1.25 bouyer periph = xs->xs_periph;
132 1.25 bouyer flags = xs->xs_control;
133 1.1 chopps
134 1.25 bouyer if (flags & XS_CTL_DATA_UIO)
135 1.5 chopps panic("sci: scsi data uio requested");
136 1.13 mycroft
137 1.25 bouyer if (dev->sc_xs && flags & XS_CTL_POLL)
138 1.25 bouyer panic("sci_scsicmd: busy");
139 1.1 chopps
140 1.25 bouyer #ifdef DIAGNOSTIC
141 1.25 bouyer /*
142 1.25 bouyer * This should never happen as we track the resources
143 1.25 bouyer * in the mid-layer.
144 1.25 bouyer */
145 1.25 bouyer if (dev->sc_xs) {
146 1.25 bouyer scsipi_printaddr(periph);
147 1.25 bouyer printf("unable to allocate scb\n");
148 1.25 bouyer panic("sea_scsipi_request");
149 1.25 bouyer }
150 1.25 bouyer #endif
151 1.25 bouyer
152 1.25 bouyer dev->sc_xs = xs;
153 1.5 chopps splx(s);
154 1.1 chopps
155 1.25 bouyer /*
156 1.25 bouyer * nothing is pending do it now.
157 1.25 bouyer */
158 1.25 bouyer sci_donextcmd(dev);
159 1.25 bouyer
160 1.25 bouyer return;
161 1.1 chopps
162 1.25 bouyer case ADAPTER_REQ_GROW_RESOURCES:
163 1.25 bouyer return;
164 1.1 chopps
165 1.25 bouyer case ADAPTER_REQ_SET_XFER_MODE:
166 1.25 bouyer return;
167 1.25 bouyer }
168 1.5 chopps }
169 1.1 chopps
170 1.5 chopps /*
171 1.5 chopps * entered with dev->sc_xs pointing to the next xfer to perform
172 1.5 chopps */
173 1.5 chopps void
174 1.26 aymeric sci_donextcmd(struct sci_softc *dev)
175 1.5 chopps {
176 1.20 bouyer struct scsipi_xfer *xs;
177 1.25 bouyer struct scsipi_periph *periph;
178 1.5 chopps int flags, phase, stat;
179 1.5 chopps
180 1.5 chopps xs = dev->sc_xs;
181 1.25 bouyer periph = xs->xs_periph;
182 1.21 thorpej flags = xs->xs_control;
183 1.5 chopps
184 1.21 thorpej if (flags & XS_CTL_DATA_IN)
185 1.5 chopps phase = DATA_IN_PHASE;
186 1.21 thorpej else if (flags & XS_CTL_DATA_OUT)
187 1.5 chopps phase = DATA_OUT_PHASE;
188 1.5 chopps else
189 1.5 chopps phase = STATUS_PHASE;
190 1.13 mycroft
191 1.21 thorpej if (flags & XS_CTL_RESET)
192 1.5 chopps scireset(dev);
193 1.1 chopps
194 1.5 chopps dev->sc_stat[0] = -1;
195 1.25 bouyer xs->cmd->bytes[0] |= periph->periph_lun << 5;
196 1.21 thorpej if (phase == STATUS_PHASE || flags & XS_CTL_POLL)
197 1.25 bouyer stat = sciicmd(dev, periph->periph_target, xs->cmd, xs->cmdlen,
198 1.5 chopps xs->data, xs->datalen, phase);
199 1.5 chopps else if (scigo(dev, xs) == 0)
200 1.5 chopps return;
201 1.13 mycroft else
202 1.5 chopps stat = dev->sc_stat[0];
203 1.13 mycroft
204 1.5 chopps sci_scsidone(dev, stat);
205 1.5 chopps }
206 1.1 chopps
207 1.5 chopps void
208 1.26 aymeric sci_scsidone(struct sci_softc *dev, int stat)
209 1.5 chopps {
210 1.20 bouyer struct scsipi_xfer *xs;
211 1.5 chopps
212 1.5 chopps xs = dev->sc_xs;
213 1.5 chopps #ifdef DIAGNOSTIC
214 1.5 chopps if (xs == NULL)
215 1.5 chopps panic("sci_scsidone");
216 1.11 chopps #endif
217 1.5 chopps xs->status = stat;
218 1.10 chopps if (stat == 0)
219 1.5 chopps xs->resid = 0;
220 1.5 chopps else {
221 1.5 chopps switch(stat) {
222 1.5 chopps case SCSI_CHECK:
223 1.25 bouyer xs->resid = 0;
224 1.25 bouyer /* FALLTHOUGH */
225 1.5 chopps case SCSI_BUSY:
226 1.5 chopps xs->error = XS_BUSY;
227 1.5 chopps break;
228 1.5 chopps default:
229 1.5 chopps xs->error = XS_DRIVER_STUFFUP;
230 1.5 chopps QPRINTF(("sci_scsicmd() bad %x\n", stat));
231 1.5 chopps break;
232 1.5 chopps }
233 1.5 chopps }
234 1.21 thorpej
235 1.20 bouyer scsipi_done(xs);
236 1.1 chopps
237 1.1 chopps }
238 1.1 chopps
239 1.5 chopps void
240 1.26 aymeric sciabort(struct sci_softc *dev, char *where)
241 1.1 chopps {
242 1.19 christos printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n",
243 1.5 chopps dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr);
244 1.1 chopps
245 1.1 chopps if (dev->sc_flags & SCI_SELECTED) {
246 1.1 chopps
247 1.7 chopps /* lets just hope it worked.. */
248 1.7 chopps dev->sc_flags &= ~SCI_SELECTED;
249 1.1 chopps /* XXX */
250 1.5 chopps scireset (dev);
251 1.1 chopps }
252 1.1 chopps }
253 1.1 chopps
254 1.1 chopps /*
255 1.1 chopps * XXX Set/reset long delays.
256 1.1 chopps *
257 1.1 chopps * if delay == 0, reset default delays
258 1.1 chopps * if delay < 0, set both delays to default long initialization values
259 1.1 chopps * if delay > 0, set both delays to this value
260 1.1 chopps *
261 1.1 chopps * Used when a devices is expected to respond slowly (e.g. during
262 1.1 chopps * initialization).
263 1.1 chopps */
264 1.1 chopps void
265 1.26 aymeric scisetdelay(int del)
266 1.1 chopps {
267 1.1 chopps static int saved_cmd_wait, saved_data_wait;
268 1.1 chopps
269 1.5 chopps if (del) {
270 1.1 chopps saved_cmd_wait = sci_cmd_wait;
271 1.1 chopps saved_data_wait = sci_data_wait;
272 1.5 chopps if (del > 0)
273 1.5 chopps sci_cmd_wait = sci_data_wait = del;
274 1.1 chopps else
275 1.1 chopps sci_cmd_wait = sci_data_wait = sci_init_wait;
276 1.1 chopps } else {
277 1.1 chopps sci_cmd_wait = saved_cmd_wait;
278 1.1 chopps sci_data_wait = saved_data_wait;
279 1.1 chopps }
280 1.1 chopps }
281 1.1 chopps
282 1.1 chopps void
283 1.26 aymeric scireset(struct sci_softc *dev)
284 1.1 chopps {
285 1.16 veego u_int s;
286 1.16 veego u_char my_id;
287 1.1 chopps
288 1.7 chopps dev->sc_flags &= ~SCI_SELECTED;
289 1.1 chopps if (dev->sc_flags & SCI_ALIVE)
290 1.5 chopps sciabort(dev, "reset");
291 1.1 chopps
292 1.19 christos printf("%s: ", dev->sc_dev.dv_xname);
293 1.1 chopps
294 1.1 chopps s = splbio();
295 1.1 chopps /* preserve our ID for now */
296 1.1 chopps my_id = 7;
297 1.1 chopps
298 1.1 chopps /*
299 1.5 chopps * Reset the chip
300 1.1 chopps */
301 1.1 chopps *dev->sci_icmd = SCI_ICMD_TEST;
302 1.1 chopps *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST;
303 1.6 chopps delay (25);
304 1.1 chopps *dev->sci_icmd = 0;
305 1.1 chopps
306 1.1 chopps /*
307 1.1 chopps * Set up various chip parameters
308 1.1 chopps */
309 1.1 chopps *dev->sci_icmd = 0;
310 1.1 chopps *dev->sci_tcmd = 0;
311 1.1 chopps *dev->sci_sel_enb = 0;
312 1.1 chopps
313 1.1 chopps /* anything else was zeroed by reset */
314 1.1 chopps
315 1.1 chopps splx (s);
316 1.1 chopps
317 1.19 christos printf("sci id %d\n", my_id);
318 1.1 chopps dev->sc_flags |= SCI_ALIVE;
319 1.1 chopps }
320 1.1 chopps
321 1.5 chopps void
322 1.26 aymeric scierror(struct sci_softc *dev, u_char csr)
323 1.1 chopps {
324 1.20 bouyer struct scsipi_xfer *xs;
325 1.1 chopps
326 1.5 chopps xs = dev->sc_xs;
327 1.5 chopps
328 1.5 chopps #ifdef DIAGNOSTIC
329 1.5 chopps if (xs == NULL)
330 1.5 chopps panic("scierror");
331 1.5 chopps #endif
332 1.21 thorpej if (xs->xs_control & XS_CTL_SILENT)
333 1.5 chopps return;
334 1.5 chopps
335 1.19 christos printf("%s: ", dev->sc_dev.dv_xname);
336 1.19 christos printf("csr == 0x%02i\n", csr); /* XXX */
337 1.1 chopps }
338 1.1 chopps
339 1.5 chopps /*
340 1.5 chopps * select the bus, return when selected or error.
341 1.5 chopps */
342 1.5 chopps int
343 1.26 aymeric sciselectbus(struct sci_softc *dev, u_char target, u_char our_addr)
344 1.1 chopps {
345 1.1 chopps register int timeo = 2500;
346 1.1 chopps
347 1.5 chopps QPRINTF (("sciselectbus %d\n", target));
348 1.1 chopps
349 1.1 chopps /* if we're already selected, return */
350 1.1 chopps if (dev->sc_flags & SCI_SELECTED) /* XXXX */
351 1.1 chopps return 1;
352 1.1 chopps
353 1.1 chopps if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
354 1.1 chopps (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
355 1.1 chopps (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)))
356 1.1 chopps return 1;
357 1.1 chopps
358 1.1 chopps *dev->sci_tcmd = 0;
359 1.1 chopps *dev->sci_odata = 0x80 + (1 << target);
360 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL;
361 1.1 chopps while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) {
362 1.1 chopps if (--timeo > 0) {
363 1.6 chopps delay(100);
364 1.1 chopps } else {
365 1.1 chopps break;
366 1.1 chopps }
367 1.1 chopps }
368 1.1 chopps if (timeo) {
369 1.1 chopps *dev->sci_icmd = 0;
370 1.1 chopps dev->sc_flags |= SCI_SELECTED;
371 1.1 chopps return (0);
372 1.1 chopps }
373 1.1 chopps *dev->sci_icmd = 0;
374 1.1 chopps return (1);
375 1.1 chopps }
376 1.1 chopps
377 1.5 chopps int
378 1.26 aymeric sci_ixfer_out(register struct sci_softc *dev, int len, register u_char *buf,
379 1.26 aymeric int phase)
380 1.1 chopps {
381 1.1 chopps register int wait = sci_data_wait;
382 1.1 chopps u_char csr;
383 1.1 chopps
384 1.5 chopps QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
385 1.1 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
386 1.1 chopps buf[6], buf[7], buf[8], buf[9]));
387 1.1 chopps
388 1.1 chopps *dev->sci_tcmd = phase;
389 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA;
390 1.1 chopps for (;len > 0; len--) {
391 1.1 chopps csr = *dev->sci_bus_csr;
392 1.1 chopps while (!(csr & SCI_BUS_REQ)) {
393 1.1 chopps if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) {
394 1.1 chopps #ifdef DEBUG
395 1.1 chopps if (sci_debug)
396 1.19 christos printf("sci_ixfer_out fail: l%d i%x w%d\n",
397 1.1 chopps len, csr, wait);
398 1.1 chopps #endif
399 1.1 chopps return (len);
400 1.1 chopps }
401 1.6 chopps delay(1);
402 1.1 chopps csr = *dev->sci_bus_csr;
403 1.1 chopps }
404 1.1 chopps
405 1.1 chopps if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH))
406 1.1 chopps break;
407 1.1 chopps *dev->sci_odata = *buf;
408 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK;
409 1.1 chopps buf++;
410 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_REQ);
411 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA;
412 1.1 chopps }
413 1.1 chopps
414 1.5 chopps QPRINTF(("sci_ixfer_out done\n"));
415 1.1 chopps return (0);
416 1.1 chopps }
417 1.1 chopps
418 1.5 chopps void
419 1.26 aymeric sci_ixfer_in(struct sci_softc *dev, int len, register u_char *buf, int phase)
420 1.1 chopps {
421 1.1 chopps int wait = sci_data_wait;
422 1.1 chopps u_char csr;
423 1.1 chopps volatile register u_char *sci_bus_csr = dev->sci_bus_csr;
424 1.1 chopps volatile register u_char *sci_data = dev->sci_data;
425 1.1 chopps volatile register u_char *sci_icmd = dev->sci_icmd;
426 1.16 veego #ifdef DEBUG
427 1.16 veego u_char *obp = buf;
428 1.16 veego #endif
429 1.1 chopps
430 1.1 chopps csr = *sci_bus_csr;
431 1.1 chopps
432 1.5 chopps QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr));
433 1.1 chopps
434 1.1 chopps *dev->sci_tcmd = phase;
435 1.1 chopps *sci_icmd = 0;
436 1.1 chopps for (;len > 0; len--) {
437 1.1 chopps csr = *sci_bus_csr;
438 1.1 chopps while (!(csr & SCI_BUS_REQ)) {
439 1.1 chopps if (!(csr & SCI_BUS_BSY) || --wait < 0) {
440 1.1 chopps #ifdef DEBUG
441 1.1 chopps if (sci_debug)
442 1.19 christos printf("sci_ixfer_in fail: l%d i%x w%d\n",
443 1.1 chopps len, csr, wait);
444 1.1 chopps #endif
445 1.1 chopps return;
446 1.1 chopps }
447 1.1 chopps
448 1.6 chopps delay(1);
449 1.1 chopps csr = *sci_bus_csr;
450 1.1 chopps }
451 1.1 chopps
452 1.1 chopps if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH))
453 1.1 chopps break;
454 1.1 chopps *buf = *sci_data;
455 1.1 chopps *sci_icmd = SCI_ICMD_ACK;
456 1.1 chopps buf++;
457 1.1 chopps while (*sci_bus_csr & SCI_BUS_REQ);
458 1.1 chopps *sci_icmd = 0;
459 1.1 chopps }
460 1.1 chopps
461 1.5 chopps QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
462 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
463 1.1 chopps obp[6], obp[7], obp[8], obp[9]));
464 1.1 chopps }
465 1.1 chopps
466 1.1 chopps /*
467 1.1 chopps * SCSI 'immediate' command: issue a command to some SCSI device
468 1.1 chopps * and get back an 'immediate' response (i.e., do programmed xfer
469 1.1 chopps * to get the response data). 'cbuf' is a buffer containing a scsi
470 1.1 chopps * command of length clen bytes. 'buf' is a buffer of length 'len'
471 1.1 chopps * bytes for data. The transfer direction is determined by the device
472 1.1 chopps * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the
473 1.1 chopps * command must supply no data. 'xferphase' is the bus phase the
474 1.1 chopps * caller expects to happen after the command is issued. It should
475 1.1 chopps * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE.
476 1.1 chopps */
477 1.5 chopps int
478 1.26 aymeric sciicmd(struct sci_softc *dev, int target, void *cbuf, int clen, void *buf,
479 1.26 aymeric int len, u_char xferphase)
480 1.1 chopps {
481 1.16 veego u_char phase;
482 1.1 chopps register int wait;
483 1.1 chopps
484 1.1 chopps /* select the SCSI bus (it's an error if bus isn't free) */
485 1.5 chopps if (sciselectbus (dev, target, dev->sc_scsi_addr))
486 1.1 chopps return -1;
487 1.1 chopps /*
488 1.1 chopps * Wait for a phase change (or error) then let the device
489 1.1 chopps * sequence us through the various SCSI phases.
490 1.1 chopps */
491 1.1 chopps dev->sc_stat[0] = 0xff;
492 1.1 chopps dev->sc_msg[0] = 0xff;
493 1.1 chopps phase = CMD_PHASE;
494 1.1 chopps while (1) {
495 1.1 chopps wait = sci_cmd_wait;
496 1.1 chopps
497 1.1 chopps while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY);
498 1.1 chopps
499 1.1 chopps QPRINTF((">CSR:%02x<", *dev->sci_bus_csr));
500 1.1 chopps if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) {
501 1.1 chopps return -1;
502 1.1 chopps }
503 1.1 chopps phase = SCI_PHASE(*dev->sci_bus_csr);
504 1.1 chopps
505 1.1 chopps switch (phase) {
506 1.1 chopps case CMD_PHASE:
507 1.5 chopps if (sci_ixfer_out (dev, clen, cbuf, phase))
508 1.1 chopps goto abort;
509 1.1 chopps phase = xferphase;
510 1.1 chopps break;
511 1.1 chopps
512 1.1 chopps case DATA_IN_PHASE:
513 1.1 chopps if (len <= 0)
514 1.1 chopps goto abort;
515 1.1 chopps wait = sci_data_wait;
516 1.5 chopps sci_ixfer_in (dev, len, buf, phase);
517 1.1 chopps phase = STATUS_PHASE;
518 1.1 chopps break;
519 1.1 chopps
520 1.1 chopps case DATA_OUT_PHASE:
521 1.1 chopps if (len <= 0)
522 1.1 chopps goto abort;
523 1.1 chopps wait = sci_data_wait;
524 1.5 chopps if (sci_ixfer_out (dev, len, buf, phase))
525 1.1 chopps goto abort;
526 1.1 chopps phase = STATUS_PHASE;
527 1.1 chopps break;
528 1.1 chopps
529 1.1 chopps case MESG_IN_PHASE:
530 1.1 chopps dev->sc_msg[0] = 0xff;
531 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_msg,phase);
532 1.1 chopps dev->sc_flags &= ~SCI_SELECTED;
533 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_BSY);
534 1.1 chopps goto out;
535 1.1 chopps break;
536 1.1 chopps
537 1.1 chopps case MESG_OUT_PHASE:
538 1.1 chopps phase = STATUS_PHASE;
539 1.1 chopps break;
540 1.1 chopps
541 1.1 chopps case STATUS_PHASE:
542 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_stat, phase);
543 1.1 chopps phase = MESG_IN_PHASE;
544 1.1 chopps break;
545 1.1 chopps
546 1.1 chopps case BUS_FREE_PHASE:
547 1.1 chopps goto out;
548 1.1 chopps
549 1.1 chopps default:
550 1.19 christos printf("sci: unexpected phase %d in icmd from %d\n",
551 1.1 chopps phase, target);
552 1.1 chopps goto abort;
553 1.1 chopps }
554 1.1 chopps #if 0
555 1.1 chopps if (wait <= 0)
556 1.1 chopps goto abort;
557 1.1 chopps #endif
558 1.1 chopps }
559 1.1 chopps
560 1.1 chopps abort:
561 1.5 chopps sciabort(dev, "icmd");
562 1.1 chopps out:
563 1.1 chopps QPRINTF(("=STS:%02x=", dev->sc_stat[0]));
564 1.1 chopps return (dev->sc_stat[0]);
565 1.1 chopps }
566 1.1 chopps
567 1.1 chopps int
568 1.26 aymeric scigo(struct sci_softc *dev, struct scsipi_xfer *xs)
569 1.1 chopps {
570 1.16 veego int count, target;
571 1.16 veego u_char phase, *addr;
572 1.5 chopps
573 1.25 bouyer target = xs->xs_periph->periph_target;
574 1.5 chopps count = xs->datalen;
575 1.5 chopps addr = xs->data;
576 1.1 chopps
577 1.1 chopps if (sci_no_dma) {
578 1.5 chopps sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen,
579 1.1 chopps addr, count,
580 1.21 thorpej xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE);
581 1.1 chopps
582 1.5 chopps return (1);
583 1.1 chopps }
584 1.1 chopps
585 1.1 chopps /* select the SCSI bus (it's an error if bus isn't free) */
586 1.5 chopps if (sciselectbus (dev, target, dev->sc_scsi_addr))
587 1.1 chopps return -1;
588 1.1 chopps /*
589 1.1 chopps * Wait for a phase change (or error) then let the device
590 1.1 chopps * sequence us through the various SCSI phases.
591 1.1 chopps */
592 1.1 chopps dev->sc_stat[0] = 0xff;
593 1.1 chopps dev->sc_msg[0] = 0xff;
594 1.1 chopps phase = CMD_PHASE;
595 1.1 chopps while (1) {
596 1.1 chopps while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) ==
597 1.1 chopps SCI_BUS_BSY);
598 1.1 chopps
599 1.1 chopps QPRINTF((">CSR:%02x<", *dev->sci_bus_csr));
600 1.1 chopps if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) {
601 1.1 chopps goto abort;
602 1.1 chopps }
603 1.1 chopps phase = SCI_PHASE(*dev->sci_bus_csr);
604 1.1 chopps
605 1.1 chopps switch (phase) {
606 1.1 chopps case CMD_PHASE:
607 1.16 veego if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase))
608 1.1 chopps goto abort;
609 1.21 thorpej phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE;
610 1.1 chopps break;
611 1.1 chopps
612 1.1 chopps case DATA_IN_PHASE:
613 1.1 chopps if (count <= 0)
614 1.1 chopps goto abort;
615 1.1 chopps /* XXX use psuedo DMA if available */
616 1.1 chopps if (count >= 128 && dev->dma_xfer_in)
617 1.1 chopps (*dev->dma_xfer_in)(dev, count, addr, phase);
618 1.1 chopps else
619 1.5 chopps sci_ixfer_in (dev, count, addr, phase);
620 1.1 chopps phase = STATUS_PHASE;
621 1.1 chopps break;
622 1.1 chopps
623 1.1 chopps case DATA_OUT_PHASE:
624 1.1 chopps if (count <= 0)
625 1.1 chopps goto abort;
626 1.1 chopps /* XXX use psuedo DMA if available */
627 1.1 chopps if (count >= 128 && dev->dma_xfer_out)
628 1.1 chopps (*dev->dma_xfer_out)(dev, count, addr, phase);
629 1.1 chopps else
630 1.5 chopps if (sci_ixfer_out (dev, count, addr, phase))
631 1.1 chopps goto abort;
632 1.1 chopps phase = STATUS_PHASE;
633 1.1 chopps break;
634 1.1 chopps
635 1.1 chopps case MESG_IN_PHASE:
636 1.1 chopps dev->sc_msg[0] = 0xff;
637 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_msg,phase);
638 1.1 chopps dev->sc_flags &= ~SCI_SELECTED;
639 1.1 chopps while (*dev->sci_bus_csr & SCI_BUS_BSY);
640 1.1 chopps goto out;
641 1.1 chopps break;
642 1.1 chopps
643 1.1 chopps case MESG_OUT_PHASE:
644 1.1 chopps phase = STATUS_PHASE;
645 1.1 chopps break;
646 1.1 chopps
647 1.1 chopps case STATUS_PHASE:
648 1.5 chopps sci_ixfer_in (dev, 1, dev->sc_stat, phase);
649 1.1 chopps phase = MESG_IN_PHASE;
650 1.1 chopps break;
651 1.1 chopps
652 1.1 chopps case BUS_FREE_PHASE:
653 1.1 chopps goto out;
654 1.1 chopps
655 1.1 chopps default:
656 1.19 christos printf("sci: unexpected phase %d in icmd from %d\n",
657 1.5 chopps phase, target);
658 1.1 chopps goto abort;
659 1.1 chopps }
660 1.1 chopps }
661 1.1 chopps
662 1.1 chopps abort:
663 1.5 chopps sciabort(dev, "go");
664 1.1 chopps out:
665 1.1 chopps QPRINTF(("=STS:%02x=", dev->sc_stat[0]));
666 1.5 chopps return (1);
667 1.1 chopps }
668