sci.c revision 1.21.2.1
1 /* $NetBSD: sci.c,v 1.21.2.1 2000/11/20 19:58:41 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA NCR 5380 scsi adaptor driver 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/disklabel.h> 50 #include <sys/dkstat.h> 51 #include <sys/buf.h> 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <uvm/uvm_extern.h> 56 #include <machine/pmap.h> 57 #include <machine/cpu.h> 58 #include <amiga/amiga/device.h> 59 #include <amiga/amiga/custom.h> 60 #include <amiga/amiga/isr.h> 61 #include <amiga/dev/scireg.h> 62 #include <amiga/dev/scivar.h> 63 64 /* 65 * SCSI delays 66 * In u-seconds, primarily for state changes on the SPC. 67 */ 68 #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 69 #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 70 #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 71 72 int sciicmd __P((struct sci_softc *, int, void *, int, void *, int,u_char)); 73 int scigo __P((struct sci_softc *, struct scsipi_xfer *)); 74 int scigetsense __P((struct sci_softc *, struct scsipi_xfer *)); 75 int sciselectbus __P((struct sci_softc *, u_char, u_char)); 76 void sciabort __P((struct sci_softc *, char *)); 77 void scierror __P((struct sci_softc *, u_char)); 78 void scisetdelay __P((int)); 79 void sci_scsidone __P((struct sci_softc *, int)); 80 void sci_donextcmd __P((struct sci_softc *)); 81 int sci_ixfer_out __P((struct sci_softc *, int, register u_char *, int)); 82 void sci_ixfer_in __P((struct sci_softc *, int, register u_char *, int)); 83 84 int sci_cmd_wait = SCI_CMD_WAIT; 85 int sci_data_wait = SCI_DATA_WAIT; 86 int sci_init_wait = SCI_INIT_WAIT; 87 88 int sci_no_dma = 0; 89 90 #ifdef DEBUG 91 #define QPRINTF(a) if (sci_debug > 1) printf a 92 int sci_debug = 0; 93 #else 94 #define QPRINTF(a) 95 #endif 96 97 /* 98 * default minphys routine for sci based controllers 99 */ 100 void 101 sci_minphys(bp) 102 struct buf *bp; 103 { 104 105 /* 106 * No max transfer at this level. 107 */ 108 minphys(bp); 109 } 110 111 /* 112 * used by specific sci controller 113 * 114 * it appears that the higher level code does nothing with LUN's 115 * so I will too. I could plug it in, however so could they 116 * in scsi_scsipi_cmd(). 117 */ 118 void 119 sci_scsipi_request(chan, req, arg) 120 struct scsipi_channel *chan; 121 scsipi_adapter_req_t req; 122 void *arg; 123 { 124 struct scsipi_xfer *xs; 125 struct scsipi_periph *periph; 126 struct sci_pending *pendp; 127 struct sci_softc *dev = (void *)chan->chan_adapter->adapt_dev; 128 int flags, s; 129 130 switch (req) { 131 case ADAPTER_REQ_RUN_XFER: 132 xs = arg; 133 periph = xs->xs_periph; 134 flags = xs->xs_control; 135 136 if (flags & XS_CTL_DATA_UIO) 137 panic("sci: scsi data uio requested"); 138 139 if (dev->sc_xs && flags & XS_CTL_POLL) 140 panic("sci_scsicmd: busy"); 141 142 #ifdef DIAGNOSTIC 143 /* 144 * This should never happen as we track the resources 145 * in the mid-layer. 146 */ 147 if (dev->sc_xs) { 148 scsipi_printaddr(periph); 149 printf("unable to allocate scb\n"); 150 panic("sea_scsipi_request"); 151 } 152 #endif 153 154 dev->sc_xs = xs; 155 splx(s); 156 157 /* 158 * nothing is pending do it now. 159 */ 160 sci_donextcmd(dev); 161 162 return; 163 164 case ADAPTER_REQ_GROW_RESOURCES: 165 return; 166 167 case ADAPTER_REQ_SET_XFER_MODE: 168 return; 169 } 170 171 /* 172 * entered with dev->sc_xs pointing to the next xfer to perform 173 */ 174 void 175 sci_donextcmd(dev) 176 struct sci_softc *dev; 177 { 178 struct scsipi_xfer *xs; 179 struct scsipi_periph *periph; 180 int flags, phase, stat; 181 182 xs = dev->sc_xs; 183 periph = xs->xs_periph; 184 flags = xs->xs_control; 185 186 if (flags & XS_CTL_DATA_IN) 187 phase = DATA_IN_PHASE; 188 else if (flags & XS_CTL_DATA_OUT) 189 phase = DATA_OUT_PHASE; 190 else 191 phase = STATUS_PHASE; 192 193 if (flags & XS_CTL_RESET) 194 scireset(dev); 195 196 dev->sc_stat[0] = -1; 197 xs->cmd->bytes[0] |= periph->periph_lun << 5; 198 if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 199 stat = sciicmd(dev, periph->periph_target, xs->cmd, xs->cmdlen, 200 xs->data, xs->datalen, phase); 201 else if (scigo(dev, xs) == 0) 202 return; 203 else 204 stat = dev->sc_stat[0]; 205 206 sci_scsidone(dev, stat); 207 } 208 209 void 210 sci_scsidone(dev, stat) 211 struct sci_softc *dev; 212 int stat; 213 { 214 struct scsipi_xfer *xs; 215 216 xs = dev->sc_xs; 217 #ifdef DIAGNOSTIC 218 if (xs == NULL) 219 panic("sci_scsidone"); 220 #endif 221 /* 222 * is this right? 223 */ 224 xs->status = stat; 225 226 if (stat == 0) 227 xs->resid = 0; 228 else { 229 switch(stat) { 230 case SCSI_CHECK: 231 stat = scigetsense(dev, xs); 232 if (stat != 0) 233 goto bad_sense; 234 xs->error = XS_SENSE; 235 break; 236 case SCSI_BUSY: 237 xs->error = XS_BUSY; 238 break; 239 bad_sense: 240 default: 241 xs->error = XS_DRIVER_STUFFUP; 242 QPRINTF(("sci_scsicmd() bad %x\n", stat)); 243 break; 244 } 245 } 246 247 xs->xs_status |= XS_STS_DONE; 248 249 /* 250 * grab next command before scsipi_done() 251 * this way no single device can hog scsi resources. 252 */ 253 scsipi_done(xs); 254 255 } 256 257 int 258 scigetsense(dev, xs) 259 struct sci_softc *dev; 260 struct scsipi_xfer *xs; 261 { 262 struct scsipi_sense rqs; 263 struct scsipi_periph *periph; 264 265 periph = xs->xs_periph; 266 267 rqs.opcode = REQUEST_SENSE; 268 rqs.byte2 = periph->periph_lun << 5; 269 #ifdef not_yet 270 rqs.length = xs->req_sense_length ? xs->req_sense_length : 271 sizeof(xs->sense.scsi_sense); 272 #else 273 rqs.length = sizeof(xs->sense.scsi_sense); 274 #endif 275 276 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 277 278 return(sciicmd(dev, periph->periph_target, &rqs, sizeof(rqs), 279 &xs->sense.scsi_sense, 280 rqs.length, DATA_IN_PHASE)); 281 } 282 283 void 284 sciabort(dev, where) 285 struct sci_softc *dev; 286 char *where; 287 { 288 printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 289 dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr); 290 291 if (dev->sc_flags & SCI_SELECTED) { 292 293 /* lets just hope it worked.. */ 294 dev->sc_flags &= ~SCI_SELECTED; 295 /* XXX */ 296 scireset (dev); 297 } 298 } 299 300 /* 301 * XXX Set/reset long delays. 302 * 303 * if delay == 0, reset default delays 304 * if delay < 0, set both delays to default long initialization values 305 * if delay > 0, set both delays to this value 306 * 307 * Used when a devices is expected to respond slowly (e.g. during 308 * initialization). 309 */ 310 void 311 scisetdelay(del) 312 int del; 313 { 314 static int saved_cmd_wait, saved_data_wait; 315 316 if (del) { 317 saved_cmd_wait = sci_cmd_wait; 318 saved_data_wait = sci_data_wait; 319 if (del > 0) 320 sci_cmd_wait = sci_data_wait = del; 321 else 322 sci_cmd_wait = sci_data_wait = sci_init_wait; 323 } else { 324 sci_cmd_wait = saved_cmd_wait; 325 sci_data_wait = saved_data_wait; 326 } 327 } 328 329 void 330 scireset(dev) 331 struct sci_softc *dev; 332 { 333 u_int s; 334 u_char my_id; 335 336 dev->sc_flags &= ~SCI_SELECTED; 337 if (dev->sc_flags & SCI_ALIVE) 338 sciabort(dev, "reset"); 339 340 printf("%s: ", dev->sc_dev.dv_xname); 341 342 s = splbio(); 343 /* preserve our ID for now */ 344 my_id = 7; 345 346 /* 347 * Reset the chip 348 */ 349 *dev->sci_icmd = SCI_ICMD_TEST; 350 *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 351 delay (25); 352 *dev->sci_icmd = 0; 353 354 /* 355 * Set up various chip parameters 356 */ 357 *dev->sci_icmd = 0; 358 *dev->sci_tcmd = 0; 359 *dev->sci_sel_enb = 0; 360 361 /* anything else was zeroed by reset */ 362 363 splx (s); 364 365 printf("sci id %d\n", my_id); 366 dev->sc_flags |= SCI_ALIVE; 367 } 368 369 void 370 scierror(dev, csr) 371 struct sci_softc *dev; 372 u_char csr; 373 { 374 struct scsipi_xfer *xs; 375 376 xs = dev->sc_xs; 377 378 #ifdef DIAGNOSTIC 379 if (xs == NULL) 380 panic("scierror"); 381 #endif 382 if (xs->xs_control & XS_CTL_SILENT) 383 return; 384 385 printf("%s: ", dev->sc_dev.dv_xname); 386 printf("csr == 0x%02i\n", csr); /* XXX */ 387 } 388 389 /* 390 * select the bus, return when selected or error. 391 */ 392 int 393 sciselectbus(dev, target, our_addr) 394 struct sci_softc *dev; 395 u_char target, our_addr; 396 { 397 register int timeo = 2500; 398 399 QPRINTF (("sciselectbus %d\n", target)); 400 401 /* if we're already selected, return */ 402 if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 403 return 1; 404 405 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 406 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 407 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 408 return 1; 409 410 *dev->sci_tcmd = 0; 411 *dev->sci_odata = 0x80 + (1 << target); 412 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 413 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 414 if (--timeo > 0) { 415 delay(100); 416 } else { 417 break; 418 } 419 } 420 if (timeo) { 421 *dev->sci_icmd = 0; 422 dev->sc_flags |= SCI_SELECTED; 423 return (0); 424 } 425 *dev->sci_icmd = 0; 426 return (1); 427 } 428 429 int 430 sci_ixfer_out(dev, len, buf, phase) 431 register struct sci_softc *dev; 432 int len; 433 register u_char *buf; 434 int phase; 435 { 436 register int wait = sci_data_wait; 437 u_char csr; 438 439 QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 440 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 441 buf[6], buf[7], buf[8], buf[9])); 442 443 *dev->sci_tcmd = phase; 444 *dev->sci_icmd = SCI_ICMD_DATA; 445 for (;len > 0; len--) { 446 csr = *dev->sci_bus_csr; 447 while (!(csr & SCI_BUS_REQ)) { 448 if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 449 #ifdef DEBUG 450 if (sci_debug) 451 printf("sci_ixfer_out fail: l%d i%x w%d\n", 452 len, csr, wait); 453 #endif 454 return (len); 455 } 456 delay(1); 457 csr = *dev->sci_bus_csr; 458 } 459 460 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 461 break; 462 *dev->sci_odata = *buf; 463 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 464 buf++; 465 while (*dev->sci_bus_csr & SCI_BUS_REQ); 466 *dev->sci_icmd = SCI_ICMD_DATA; 467 } 468 469 QPRINTF(("sci_ixfer_out done\n")); 470 return (0); 471 } 472 473 void 474 sci_ixfer_in(dev, len, buf, phase) 475 struct sci_softc *dev; 476 int len; 477 register u_char *buf; 478 int phase; 479 { 480 int wait = sci_data_wait; 481 u_char csr; 482 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 483 volatile register u_char *sci_data = dev->sci_data; 484 volatile register u_char *sci_icmd = dev->sci_icmd; 485 #ifdef DEBUG 486 u_char *obp = buf; 487 #endif 488 489 csr = *sci_bus_csr; 490 491 QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 492 493 *dev->sci_tcmd = phase; 494 *sci_icmd = 0; 495 for (;len > 0; len--) { 496 csr = *sci_bus_csr; 497 while (!(csr & SCI_BUS_REQ)) { 498 if (!(csr & SCI_BUS_BSY) || --wait < 0) { 499 #ifdef DEBUG 500 if (sci_debug) 501 printf("sci_ixfer_in fail: l%d i%x w%d\n", 502 len, csr, wait); 503 #endif 504 return; 505 } 506 507 delay(1); 508 csr = *sci_bus_csr; 509 } 510 511 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 512 break; 513 *buf = *sci_data; 514 *sci_icmd = SCI_ICMD_ACK; 515 buf++; 516 while (*sci_bus_csr & SCI_BUS_REQ); 517 *sci_icmd = 0; 518 } 519 520 QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 521 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 522 obp[6], obp[7], obp[8], obp[9])); 523 } 524 525 /* 526 * SCSI 'immediate' command: issue a command to some SCSI device 527 * and get back an 'immediate' response (i.e., do programmed xfer 528 * to get the response data). 'cbuf' is a buffer containing a scsi 529 * command of length clen bytes. 'buf' is a buffer of length 'len' 530 * bytes for data. The transfer direction is determined by the device 531 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 532 * command must supply no data. 'xferphase' is the bus phase the 533 * caller expects to happen after the command is issued. It should 534 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 535 */ 536 int 537 sciicmd(dev, target, cbuf, clen, buf, len, xferphase) 538 struct sci_softc *dev; 539 void *cbuf, *buf; 540 int clen, len; 541 u_char xferphase; 542 { 543 u_char phase; 544 register int wait; 545 546 /* select the SCSI bus (it's an error if bus isn't free) */ 547 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 548 return -1; 549 /* 550 * Wait for a phase change (or error) then let the device 551 * sequence us through the various SCSI phases. 552 */ 553 dev->sc_stat[0] = 0xff; 554 dev->sc_msg[0] = 0xff; 555 phase = CMD_PHASE; 556 while (1) { 557 wait = sci_cmd_wait; 558 559 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 560 561 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 562 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 563 return -1; 564 } 565 phase = SCI_PHASE(*dev->sci_bus_csr); 566 567 switch (phase) { 568 case CMD_PHASE: 569 if (sci_ixfer_out (dev, clen, cbuf, phase)) 570 goto abort; 571 phase = xferphase; 572 break; 573 574 case DATA_IN_PHASE: 575 if (len <= 0) 576 goto abort; 577 wait = sci_data_wait; 578 sci_ixfer_in (dev, len, buf, phase); 579 phase = STATUS_PHASE; 580 break; 581 582 case DATA_OUT_PHASE: 583 if (len <= 0) 584 goto abort; 585 wait = sci_data_wait; 586 if (sci_ixfer_out (dev, len, buf, phase)) 587 goto abort; 588 phase = STATUS_PHASE; 589 break; 590 591 case MESG_IN_PHASE: 592 dev->sc_msg[0] = 0xff; 593 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 594 dev->sc_flags &= ~SCI_SELECTED; 595 while (*dev->sci_bus_csr & SCI_BUS_BSY); 596 goto out; 597 break; 598 599 case MESG_OUT_PHASE: 600 phase = STATUS_PHASE; 601 break; 602 603 case STATUS_PHASE: 604 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 605 phase = MESG_IN_PHASE; 606 break; 607 608 case BUS_FREE_PHASE: 609 goto out; 610 611 default: 612 printf("sci: unexpected phase %d in icmd from %d\n", 613 phase, target); 614 goto abort; 615 } 616 #if 0 617 if (wait <= 0) 618 goto abort; 619 #endif 620 } 621 622 abort: 623 sciabort(dev, "icmd"); 624 out: 625 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 626 return (dev->sc_stat[0]); 627 } 628 629 int 630 scigo(dev, xs) 631 struct sci_softc *dev; 632 struct scsipi_xfer *xs; 633 { 634 int count, target; 635 u_char phase, *addr; 636 637 target = xs->xs_periph->periph_target; 638 count = xs->datalen; 639 addr = xs->data; 640 641 if (sci_no_dma) { 642 sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 643 addr, count, 644 xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 645 646 return (1); 647 } 648 649 /* select the SCSI bus (it's an error if bus isn't free) */ 650 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 651 return -1; 652 /* 653 * Wait for a phase change (or error) then let the device 654 * sequence us through the various SCSI phases. 655 */ 656 dev->sc_stat[0] = 0xff; 657 dev->sc_msg[0] = 0xff; 658 phase = CMD_PHASE; 659 while (1) { 660 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 661 SCI_BUS_BSY); 662 663 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 664 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 665 goto abort; 666 } 667 phase = SCI_PHASE(*dev->sci_bus_csr); 668 669 switch (phase) { 670 case CMD_PHASE: 671 if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 672 goto abort; 673 phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 674 break; 675 676 case DATA_IN_PHASE: 677 if (count <= 0) 678 goto abort; 679 /* XXX use psuedo DMA if available */ 680 if (count >= 128 && dev->dma_xfer_in) 681 (*dev->dma_xfer_in)(dev, count, addr, phase); 682 else 683 sci_ixfer_in (dev, count, addr, phase); 684 phase = STATUS_PHASE; 685 break; 686 687 case DATA_OUT_PHASE: 688 if (count <= 0) 689 goto abort; 690 /* XXX use psuedo DMA if available */ 691 if (count >= 128 && dev->dma_xfer_out) 692 (*dev->dma_xfer_out)(dev, count, addr, phase); 693 else 694 if (sci_ixfer_out (dev, count, addr, phase)) 695 goto abort; 696 phase = STATUS_PHASE; 697 break; 698 699 case MESG_IN_PHASE: 700 dev->sc_msg[0] = 0xff; 701 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 702 dev->sc_flags &= ~SCI_SELECTED; 703 while (*dev->sci_bus_csr & SCI_BUS_BSY); 704 goto out; 705 break; 706 707 case MESG_OUT_PHASE: 708 phase = STATUS_PHASE; 709 break; 710 711 case STATUS_PHASE: 712 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 713 phase = MESG_IN_PHASE; 714 break; 715 716 case BUS_FREE_PHASE: 717 goto out; 718 719 default: 720 printf("sci: unexpected phase %d in icmd from %d\n", 721 phase, target); 722 goto abort; 723 } 724 } 725 726 abort: 727 sciabort(dev, "go"); 728 out: 729 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 730 return (1); 731 } 732
Indexes created Fri Sep 26 20:09:58 GMT 2025