sci.c revision 1.23
1 /* $NetBSD: sci.c,v 1.23 2000/06/26 14:20:31 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA NCR 5380 scsi adaptor driver 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/disklabel.h> 50 #include <sys/dkstat.h> 51 #include <sys/buf.h> 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <vm/vm.h> 56 #include <uvm/uvm_extern.h> 57 #include <machine/pmap.h> 58 #include <machine/cpu.h> 59 #include <amiga/amiga/device.h> 60 #include <amiga/amiga/custom.h> 61 #include <amiga/amiga/isr.h> 62 #include <amiga/dev/scireg.h> 63 #include <amiga/dev/scivar.h> 64 65 /* 66 * SCSI delays 67 * In u-seconds, primarily for state changes on the SPC. 68 */ 69 #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 70 #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 71 #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 72 73 int sciicmd __P((struct sci_softc *, int, void *, int, void *, int,u_char)); 74 int scigo __P((struct sci_softc *, struct scsipi_xfer *)); 75 int scigetsense __P((struct sci_softc *, struct scsipi_xfer *)); 76 int sciselectbus __P((struct sci_softc *, u_char, u_char)); 77 void sciabort __P((struct sci_softc *, char *)); 78 void scierror __P((struct sci_softc *, u_char)); 79 void scisetdelay __P((int)); 80 void sci_scsidone __P((struct sci_softc *, int)); 81 void sci_donextcmd __P((struct sci_softc *)); 82 int sci_ixfer_out __P((struct sci_softc *, int, register u_char *, int)); 83 void sci_ixfer_in __P((struct sci_softc *, int, register u_char *, int)); 84 85 int sci_cmd_wait = SCI_CMD_WAIT; 86 int sci_data_wait = SCI_DATA_WAIT; 87 int sci_init_wait = SCI_INIT_WAIT; 88 89 int sci_no_dma = 0; 90 91 #ifdef DEBUG 92 #define QPRINTF(a) if (sci_debug > 1) printf a 93 int sci_debug = 0; 94 #else 95 #define QPRINTF(a) 96 #endif 97 98 /* 99 * default minphys routine for sci based controllers 100 */ 101 void 102 sci_minphys(bp) 103 struct buf *bp; 104 { 105 106 /* 107 * No max transfer at this level. 108 */ 109 minphys(bp); 110 } 111 112 /* 113 * used by specific sci controller 114 * 115 * it appears that the higher level code does nothing with LUN's 116 * so I will too. I could plug it in, however so could they 117 * in scsi_scsipi_cmd(). 118 */ 119 int 120 sci_scsicmd(xs) 121 struct scsipi_xfer *xs; 122 { 123 struct sci_pending *pendp; 124 struct sci_softc *dev; 125 struct scsipi_link *slp; 126 int flags, s; 127 128 slp = xs->sc_link; 129 dev = slp->adapter_softc; 130 flags = xs->xs_control; 131 132 if (flags & XS_CTL_DATA_UIO) 133 panic("sci: scsi data uio requested"); 134 135 if (dev->sc_xs && flags & XS_CTL_POLL) 136 panic("sci_scsicmd: busy"); 137 138 s = splbio(); 139 pendp = &dev->sc_xsstore[slp->scsipi_scsi.target][slp->scsipi_scsi.lun]; 140 if (pendp->xs) { 141 splx(s); 142 return(TRY_AGAIN_LATER); 143 } 144 145 if (dev->sc_xs) { 146 pendp->xs = xs; 147 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 148 splx(s); 149 return(SUCCESSFULLY_QUEUED); 150 } 151 pendp->xs = NULL; 152 dev->sc_xs = xs; 153 splx(s); 154 155 /* 156 * nothing is pending do it now. 157 */ 158 sci_donextcmd(dev); 159 160 if (flags & XS_CTL_POLL) 161 return(COMPLETE); 162 return(SUCCESSFULLY_QUEUED); 163 } 164 165 /* 166 * entered with dev->sc_xs pointing to the next xfer to perform 167 */ 168 void 169 sci_donextcmd(dev) 170 struct sci_softc *dev; 171 { 172 struct scsipi_xfer *xs; 173 struct scsipi_link *slp; 174 int flags, phase, stat; 175 176 xs = dev->sc_xs; 177 slp = xs->sc_link; 178 flags = xs->xs_control; 179 180 if (flags & XS_CTL_DATA_IN) 181 phase = DATA_IN_PHASE; 182 else if (flags & XS_CTL_DATA_OUT) 183 phase = DATA_OUT_PHASE; 184 else 185 phase = STATUS_PHASE; 186 187 if (flags & XS_CTL_RESET) 188 scireset(dev); 189 190 dev->sc_stat[0] = -1; 191 xs->cmd->bytes[0] |= slp->scsipi_scsi.lun << 5; 192 if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 193 stat = sciicmd(dev, slp->scsipi_scsi.target, xs->cmd, xs->cmdlen, 194 xs->data, xs->datalen, phase); 195 else if (scigo(dev, xs) == 0) 196 return; 197 else 198 stat = dev->sc_stat[0]; 199 200 sci_scsidone(dev, stat); 201 } 202 203 void 204 sci_scsidone(dev, stat) 205 struct sci_softc *dev; 206 int stat; 207 { 208 struct sci_pending *pendp; 209 struct scsipi_xfer *xs; 210 int s, donext; 211 212 xs = dev->sc_xs; 213 #ifdef DIAGNOSTIC 214 if (xs == NULL) 215 panic("sci_scsidone"); 216 #endif 217 /* 218 * is this right? 219 */ 220 xs->status = stat; 221 222 if (stat == 0) 223 xs->resid = 0; 224 else { 225 switch(stat) { 226 case SCSI_CHECK: 227 stat = scigetsense(dev, xs); 228 if (stat != 0) 229 goto bad_sense; 230 xs->error = XS_SENSE; 231 break; 232 case SCSI_BUSY: 233 xs->error = XS_BUSY; 234 break; 235 bad_sense: 236 default: 237 xs->error = XS_DRIVER_STUFFUP; 238 QPRINTF(("sci_scsicmd() bad %x\n", stat)); 239 break; 240 } 241 } 242 243 xs->xs_status |= XS_STS_DONE; 244 245 /* 246 * grab next command before scsipi_done() 247 * this way no single device can hog scsi resources. 248 */ 249 s = splbio(); 250 pendp = dev->sc_xslist.tqh_first; 251 if (pendp == NULL) { 252 donext = 0; 253 dev->sc_xs = NULL; 254 } else { 255 donext = 1; 256 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 257 dev->sc_xs = pendp->xs; 258 pendp->xs = NULL; 259 } 260 splx(s); 261 scsipi_done(xs); 262 263 if (donext) 264 sci_donextcmd(dev); 265 } 266 267 int 268 scigetsense(dev, xs) 269 struct sci_softc *dev; 270 struct scsipi_xfer *xs; 271 { 272 struct scsipi_sense rqs; 273 struct scsipi_link *slp; 274 275 slp = xs->sc_link; 276 277 rqs.opcode = REQUEST_SENSE; 278 rqs.byte2 = slp->scsipi_scsi.lun << 5; 279 #ifdef not_yet 280 rqs.length = xs->req_sense_length ? xs->req_sense_length : 281 sizeof(xs->sense.scsi_sense); 282 #else 283 rqs.length = sizeof(xs->sense.scsi_sense); 284 #endif 285 286 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 287 288 return(sciicmd(dev, slp->scsipi_scsi.target, &rqs, sizeof(rqs), 289 &xs->sense.scsi_sense, 290 rqs.length, DATA_IN_PHASE)); 291 } 292 293 void 294 sciabort(dev, where) 295 struct sci_softc *dev; 296 char *where; 297 { 298 printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 299 dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr); 300 301 if (dev->sc_flags & SCI_SELECTED) { 302 303 /* lets just hope it worked.. */ 304 dev->sc_flags &= ~SCI_SELECTED; 305 /* XXX */ 306 scireset (dev); 307 } 308 } 309 310 /* 311 * XXX Set/reset long delays. 312 * 313 * if delay == 0, reset default delays 314 * if delay < 0, set both delays to default long initialization values 315 * if delay > 0, set both delays to this value 316 * 317 * Used when a devices is expected to respond slowly (e.g. during 318 * initialization). 319 */ 320 void 321 scisetdelay(del) 322 int del; 323 { 324 static int saved_cmd_wait, saved_data_wait; 325 326 if (del) { 327 saved_cmd_wait = sci_cmd_wait; 328 saved_data_wait = sci_data_wait; 329 if (del > 0) 330 sci_cmd_wait = sci_data_wait = del; 331 else 332 sci_cmd_wait = sci_data_wait = sci_init_wait; 333 } else { 334 sci_cmd_wait = saved_cmd_wait; 335 sci_data_wait = saved_data_wait; 336 } 337 } 338 339 void 340 scireset(dev) 341 struct sci_softc *dev; 342 { 343 u_int s; 344 u_char my_id; 345 346 dev->sc_flags &= ~SCI_SELECTED; 347 if (dev->sc_flags & SCI_ALIVE) 348 sciabort(dev, "reset"); 349 350 printf("%s: ", dev->sc_dev.dv_xname); 351 352 s = splbio(); 353 /* preserve our ID for now */ 354 my_id = 7; 355 356 /* 357 * Reset the chip 358 */ 359 *dev->sci_icmd = SCI_ICMD_TEST; 360 *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 361 delay (25); 362 *dev->sci_icmd = 0; 363 364 /* 365 * Set up various chip parameters 366 */ 367 *dev->sci_icmd = 0; 368 *dev->sci_tcmd = 0; 369 *dev->sci_sel_enb = 0; 370 371 /* anything else was zeroed by reset */ 372 373 splx (s); 374 375 printf("sci id %d\n", my_id); 376 dev->sc_flags |= SCI_ALIVE; 377 } 378 379 void 380 scierror(dev, csr) 381 struct sci_softc *dev; 382 u_char csr; 383 { 384 struct scsipi_xfer *xs; 385 386 xs = dev->sc_xs; 387 388 #ifdef DIAGNOSTIC 389 if (xs == NULL) 390 panic("scierror"); 391 #endif 392 if (xs->xs_control & XS_CTL_SILENT) 393 return; 394 395 printf("%s: ", dev->sc_dev.dv_xname); 396 printf("csr == 0x%02i\n", csr); /* XXX */ 397 } 398 399 /* 400 * select the bus, return when selected or error. 401 */ 402 int 403 sciselectbus(dev, target, our_addr) 404 struct sci_softc *dev; 405 u_char target, our_addr; 406 { 407 register int timeo = 2500; 408 409 QPRINTF (("sciselectbus %d\n", target)); 410 411 /* if we're already selected, return */ 412 if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 413 return 1; 414 415 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 416 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 417 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 418 return 1; 419 420 *dev->sci_tcmd = 0; 421 *dev->sci_odata = 0x80 + (1 << target); 422 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 423 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 424 if (--timeo > 0) { 425 delay(100); 426 } else { 427 break; 428 } 429 } 430 if (timeo) { 431 *dev->sci_icmd = 0; 432 dev->sc_flags |= SCI_SELECTED; 433 return (0); 434 } 435 *dev->sci_icmd = 0; 436 return (1); 437 } 438 439 int 440 sci_ixfer_out(dev, len, buf, phase) 441 register struct sci_softc *dev; 442 int len; 443 register u_char *buf; 444 int phase; 445 { 446 register int wait = sci_data_wait; 447 u_char csr; 448 449 QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 450 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 451 buf[6], buf[7], buf[8], buf[9])); 452 453 *dev->sci_tcmd = phase; 454 *dev->sci_icmd = SCI_ICMD_DATA; 455 for (;len > 0; len--) { 456 csr = *dev->sci_bus_csr; 457 while (!(csr & SCI_BUS_REQ)) { 458 if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 459 #ifdef DEBUG 460 if (sci_debug) 461 printf("sci_ixfer_out fail: l%d i%x w%d\n", 462 len, csr, wait); 463 #endif 464 return (len); 465 } 466 delay(1); 467 csr = *dev->sci_bus_csr; 468 } 469 470 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 471 break; 472 *dev->sci_odata = *buf; 473 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 474 buf++; 475 while (*dev->sci_bus_csr & SCI_BUS_REQ); 476 *dev->sci_icmd = SCI_ICMD_DATA; 477 } 478 479 QPRINTF(("sci_ixfer_out done\n")); 480 return (0); 481 } 482 483 void 484 sci_ixfer_in(dev, len, buf, phase) 485 struct sci_softc *dev; 486 int len; 487 register u_char *buf; 488 int phase; 489 { 490 int wait = sci_data_wait; 491 u_char csr; 492 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 493 volatile register u_char *sci_data = dev->sci_data; 494 volatile register u_char *sci_icmd = dev->sci_icmd; 495 #ifdef DEBUG 496 u_char *obp = buf; 497 #endif 498 499 csr = *sci_bus_csr; 500 501 QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 502 503 *dev->sci_tcmd = phase; 504 *sci_icmd = 0; 505 for (;len > 0; len--) { 506 csr = *sci_bus_csr; 507 while (!(csr & SCI_BUS_REQ)) { 508 if (!(csr & SCI_BUS_BSY) || --wait < 0) { 509 #ifdef DEBUG 510 if (sci_debug) 511 printf("sci_ixfer_in fail: l%d i%x w%d\n", 512 len, csr, wait); 513 #endif 514 return; 515 } 516 517 delay(1); 518 csr = *sci_bus_csr; 519 } 520 521 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 522 break; 523 *buf = *sci_data; 524 *sci_icmd = SCI_ICMD_ACK; 525 buf++; 526 while (*sci_bus_csr & SCI_BUS_REQ); 527 *sci_icmd = 0; 528 } 529 530 QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 531 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 532 obp[6], obp[7], obp[8], obp[9])); 533 } 534 535 /* 536 * SCSI 'immediate' command: issue a command to some SCSI device 537 * and get back an 'immediate' response (i.e., do programmed xfer 538 * to get the response data). 'cbuf' is a buffer containing a scsi 539 * command of length clen bytes. 'buf' is a buffer of length 'len' 540 * bytes for data. The transfer direction is determined by the device 541 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 542 * command must supply no data. 'xferphase' is the bus phase the 543 * caller expects to happen after the command is issued. It should 544 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 545 */ 546 int 547 sciicmd(dev, target, cbuf, clen, buf, len, xferphase) 548 struct sci_softc *dev; 549 void *cbuf, *buf; 550 int clen, len; 551 u_char xferphase; 552 { 553 u_char phase; 554 register int wait; 555 556 /* select the SCSI bus (it's an error if bus isn't free) */ 557 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 558 return -1; 559 /* 560 * Wait for a phase change (or error) then let the device 561 * sequence us through the various SCSI phases. 562 */ 563 dev->sc_stat[0] = 0xff; 564 dev->sc_msg[0] = 0xff; 565 phase = CMD_PHASE; 566 while (1) { 567 wait = sci_cmd_wait; 568 569 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 570 571 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 572 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 573 return -1; 574 } 575 phase = SCI_PHASE(*dev->sci_bus_csr); 576 577 switch (phase) { 578 case CMD_PHASE: 579 if (sci_ixfer_out (dev, clen, cbuf, phase)) 580 goto abort; 581 phase = xferphase; 582 break; 583 584 case DATA_IN_PHASE: 585 if (len <= 0) 586 goto abort; 587 wait = sci_data_wait; 588 sci_ixfer_in (dev, len, buf, phase); 589 phase = STATUS_PHASE; 590 break; 591 592 case DATA_OUT_PHASE: 593 if (len <= 0) 594 goto abort; 595 wait = sci_data_wait; 596 if (sci_ixfer_out (dev, len, buf, phase)) 597 goto abort; 598 phase = STATUS_PHASE; 599 break; 600 601 case MESG_IN_PHASE: 602 dev->sc_msg[0] = 0xff; 603 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 604 dev->sc_flags &= ~SCI_SELECTED; 605 while (*dev->sci_bus_csr & SCI_BUS_BSY); 606 goto out; 607 break; 608 609 case MESG_OUT_PHASE: 610 phase = STATUS_PHASE; 611 break; 612 613 case STATUS_PHASE: 614 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 615 phase = MESG_IN_PHASE; 616 break; 617 618 case BUS_FREE_PHASE: 619 goto out; 620 621 default: 622 printf("sci: unexpected phase %d in icmd from %d\n", 623 phase, target); 624 goto abort; 625 } 626 #if 0 627 if (wait <= 0) 628 goto abort; 629 #endif 630 } 631 632 abort: 633 sciabort(dev, "icmd"); 634 out: 635 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 636 return (dev->sc_stat[0]); 637 } 638 639 int 640 scigo(dev, xs) 641 struct sci_softc *dev; 642 struct scsipi_xfer *xs; 643 { 644 int count, target; 645 u_char phase, *addr; 646 647 target = xs->sc_link->scsipi_scsi.target; 648 count = xs->datalen; 649 addr = xs->data; 650 651 if (sci_no_dma) { 652 sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 653 addr, count, 654 xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 655 656 return (1); 657 } 658 659 /* select the SCSI bus (it's an error if bus isn't free) */ 660 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 661 return -1; 662 /* 663 * Wait for a phase change (or error) then let the device 664 * sequence us through the various SCSI phases. 665 */ 666 dev->sc_stat[0] = 0xff; 667 dev->sc_msg[0] = 0xff; 668 phase = CMD_PHASE; 669 while (1) { 670 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 671 SCI_BUS_BSY); 672 673 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 674 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 675 goto abort; 676 } 677 phase = SCI_PHASE(*dev->sci_bus_csr); 678 679 switch (phase) { 680 case CMD_PHASE: 681 if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 682 goto abort; 683 phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 684 break; 685 686 case DATA_IN_PHASE: 687 if (count <= 0) 688 goto abort; 689 /* XXX use psuedo DMA if available */ 690 if (count >= 128 && dev->dma_xfer_in) 691 (*dev->dma_xfer_in)(dev, count, addr, phase); 692 else 693 sci_ixfer_in (dev, count, addr, phase); 694 phase = STATUS_PHASE; 695 break; 696 697 case DATA_OUT_PHASE: 698 if (count <= 0) 699 goto abort; 700 /* XXX use psuedo DMA if available */ 701 if (count >= 128 && dev->dma_xfer_out) 702 (*dev->dma_xfer_out)(dev, count, addr, phase); 703 else 704 if (sci_ixfer_out (dev, count, addr, phase)) 705 goto abort; 706 phase = STATUS_PHASE; 707 break; 708 709 case MESG_IN_PHASE: 710 dev->sc_msg[0] = 0xff; 711 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 712 dev->sc_flags &= ~SCI_SELECTED; 713 while (*dev->sci_bus_csr & SCI_BUS_BSY); 714 goto out; 715 break; 716 717 case MESG_OUT_PHASE: 718 phase = STATUS_PHASE; 719 break; 720 721 case STATUS_PHASE: 722 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 723 phase = MESG_IN_PHASE; 724 break; 725 726 case BUS_FREE_PHASE: 727 goto out; 728 729 default: 730 printf("sci: unexpected phase %d in icmd from %d\n", 731 phase, target); 732 goto abort; 733 } 734 } 735 736 abort: 737 sciabort(dev, "go"); 738 out: 739 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 740 return (1); 741 } 742
Indexes created Wed Sep 24 05:09:52 GMT 2025