sci.c revision 1.24
1 /* $NetBSD: sci.c,v 1.24 2000/06/29 08:44:05 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA NCR 5380 scsi adaptor driver 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/disklabel.h> 50 #include <sys/dkstat.h> 51 #include <sys/buf.h> 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <uvm/uvm_extern.h> 56 #include <machine/pmap.h> 57 #include <machine/cpu.h> 58 #include <amiga/amiga/device.h> 59 #include <amiga/amiga/custom.h> 60 #include <amiga/amiga/isr.h> 61 #include <amiga/dev/scireg.h> 62 #include <amiga/dev/scivar.h> 63 64 /* 65 * SCSI delays 66 * In u-seconds, primarily for state changes on the SPC. 67 */ 68 #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 69 #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 70 #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 71 72 int sciicmd __P((struct sci_softc *, int, void *, int, void *, int,u_char)); 73 int scigo __P((struct sci_softc *, struct scsipi_xfer *)); 74 int scigetsense __P((struct sci_softc *, struct scsipi_xfer *)); 75 int sciselectbus __P((struct sci_softc *, u_char, u_char)); 76 void sciabort __P((struct sci_softc *, char *)); 77 void scierror __P((struct sci_softc *, u_char)); 78 void scisetdelay __P((int)); 79 void sci_scsidone __P((struct sci_softc *, int)); 80 void sci_donextcmd __P((struct sci_softc *)); 81 int sci_ixfer_out __P((struct sci_softc *, int, register u_char *, int)); 82 void sci_ixfer_in __P((struct sci_softc *, int, register u_char *, int)); 83 84 int sci_cmd_wait = SCI_CMD_WAIT; 85 int sci_data_wait = SCI_DATA_WAIT; 86 int sci_init_wait = SCI_INIT_WAIT; 87 88 int sci_no_dma = 0; 89 90 #ifdef DEBUG 91 #define QPRINTF(a) if (sci_debug > 1) printf a 92 int sci_debug = 0; 93 #else 94 #define QPRINTF(a) 95 #endif 96 97 /* 98 * default minphys routine for sci based controllers 99 */ 100 void 101 sci_minphys(bp) 102 struct buf *bp; 103 { 104 105 /* 106 * No max transfer at this level. 107 */ 108 minphys(bp); 109 } 110 111 /* 112 * used by specific sci controller 113 * 114 * it appears that the higher level code does nothing with LUN's 115 * so I will too. I could plug it in, however so could they 116 * in scsi_scsipi_cmd(). 117 */ 118 int 119 sci_scsicmd(xs) 120 struct scsipi_xfer *xs; 121 { 122 struct sci_pending *pendp; 123 struct sci_softc *dev; 124 struct scsipi_link *slp; 125 int flags, s; 126 127 slp = xs->sc_link; 128 dev = slp->adapter_softc; 129 flags = xs->xs_control; 130 131 if (flags & XS_CTL_DATA_UIO) 132 panic("sci: scsi data uio requested"); 133 134 if (dev->sc_xs && flags & XS_CTL_POLL) 135 panic("sci_scsicmd: busy"); 136 137 s = splbio(); 138 pendp = &dev->sc_xsstore[slp->scsipi_scsi.target][slp->scsipi_scsi.lun]; 139 if (pendp->xs) { 140 splx(s); 141 return(TRY_AGAIN_LATER); 142 } 143 144 if (dev->sc_xs) { 145 pendp->xs = xs; 146 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 147 splx(s); 148 return(SUCCESSFULLY_QUEUED); 149 } 150 pendp->xs = NULL; 151 dev->sc_xs = xs; 152 splx(s); 153 154 /* 155 * nothing is pending do it now. 156 */ 157 sci_donextcmd(dev); 158 159 if (flags & XS_CTL_POLL) 160 return(COMPLETE); 161 return(SUCCESSFULLY_QUEUED); 162 } 163 164 /* 165 * entered with dev->sc_xs pointing to the next xfer to perform 166 */ 167 void 168 sci_donextcmd(dev) 169 struct sci_softc *dev; 170 { 171 struct scsipi_xfer *xs; 172 struct scsipi_link *slp; 173 int flags, phase, stat; 174 175 xs = dev->sc_xs; 176 slp = xs->sc_link; 177 flags = xs->xs_control; 178 179 if (flags & XS_CTL_DATA_IN) 180 phase = DATA_IN_PHASE; 181 else if (flags & XS_CTL_DATA_OUT) 182 phase = DATA_OUT_PHASE; 183 else 184 phase = STATUS_PHASE; 185 186 if (flags & XS_CTL_RESET) 187 scireset(dev); 188 189 dev->sc_stat[0] = -1; 190 xs->cmd->bytes[0] |= slp->scsipi_scsi.lun << 5; 191 if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 192 stat = sciicmd(dev, slp->scsipi_scsi.target, xs->cmd, xs->cmdlen, 193 xs->data, xs->datalen, phase); 194 else if (scigo(dev, xs) == 0) 195 return; 196 else 197 stat = dev->sc_stat[0]; 198 199 sci_scsidone(dev, stat); 200 } 201 202 void 203 sci_scsidone(dev, stat) 204 struct sci_softc *dev; 205 int stat; 206 { 207 struct sci_pending *pendp; 208 struct scsipi_xfer *xs; 209 int s, donext; 210 211 xs = dev->sc_xs; 212 #ifdef DIAGNOSTIC 213 if (xs == NULL) 214 panic("sci_scsidone"); 215 #endif 216 /* 217 * is this right? 218 */ 219 xs->status = stat; 220 221 if (stat == 0) 222 xs->resid = 0; 223 else { 224 switch(stat) { 225 case SCSI_CHECK: 226 stat = scigetsense(dev, xs); 227 if (stat != 0) 228 goto bad_sense; 229 xs->error = XS_SENSE; 230 break; 231 case SCSI_BUSY: 232 xs->error = XS_BUSY; 233 break; 234 bad_sense: 235 default: 236 xs->error = XS_DRIVER_STUFFUP; 237 QPRINTF(("sci_scsicmd() bad %x\n", stat)); 238 break; 239 } 240 } 241 242 xs->xs_status |= XS_STS_DONE; 243 244 /* 245 * grab next command before scsipi_done() 246 * this way no single device can hog scsi resources. 247 */ 248 s = splbio(); 249 pendp = dev->sc_xslist.tqh_first; 250 if (pendp == NULL) { 251 donext = 0; 252 dev->sc_xs = NULL; 253 } else { 254 donext = 1; 255 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 256 dev->sc_xs = pendp->xs; 257 pendp->xs = NULL; 258 } 259 splx(s); 260 scsipi_done(xs); 261 262 if (donext) 263 sci_donextcmd(dev); 264 } 265 266 int 267 scigetsense(dev, xs) 268 struct sci_softc *dev; 269 struct scsipi_xfer *xs; 270 { 271 struct scsipi_sense rqs; 272 struct scsipi_link *slp; 273 274 slp = xs->sc_link; 275 276 rqs.opcode = REQUEST_SENSE; 277 rqs.byte2 = slp->scsipi_scsi.lun << 5; 278 #ifdef not_yet 279 rqs.length = xs->req_sense_length ? xs->req_sense_length : 280 sizeof(xs->sense.scsi_sense); 281 #else 282 rqs.length = sizeof(xs->sense.scsi_sense); 283 #endif 284 285 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 286 287 return(sciicmd(dev, slp->scsipi_scsi.target, &rqs, sizeof(rqs), 288 &xs->sense.scsi_sense, 289 rqs.length, DATA_IN_PHASE)); 290 } 291 292 void 293 sciabort(dev, where) 294 struct sci_softc *dev; 295 char *where; 296 { 297 printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 298 dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr); 299 300 if (dev->sc_flags & SCI_SELECTED) { 301 302 /* lets just hope it worked.. */ 303 dev->sc_flags &= ~SCI_SELECTED; 304 /* XXX */ 305 scireset (dev); 306 } 307 } 308 309 /* 310 * XXX Set/reset long delays. 311 * 312 * if delay == 0, reset default delays 313 * if delay < 0, set both delays to default long initialization values 314 * if delay > 0, set both delays to this value 315 * 316 * Used when a devices is expected to respond slowly (e.g. during 317 * initialization). 318 */ 319 void 320 scisetdelay(del) 321 int del; 322 { 323 static int saved_cmd_wait, saved_data_wait; 324 325 if (del) { 326 saved_cmd_wait = sci_cmd_wait; 327 saved_data_wait = sci_data_wait; 328 if (del > 0) 329 sci_cmd_wait = sci_data_wait = del; 330 else 331 sci_cmd_wait = sci_data_wait = sci_init_wait; 332 } else { 333 sci_cmd_wait = saved_cmd_wait; 334 sci_data_wait = saved_data_wait; 335 } 336 } 337 338 void 339 scireset(dev) 340 struct sci_softc *dev; 341 { 342 u_int s; 343 u_char my_id; 344 345 dev->sc_flags &= ~SCI_SELECTED; 346 if (dev->sc_flags & SCI_ALIVE) 347 sciabort(dev, "reset"); 348 349 printf("%s: ", dev->sc_dev.dv_xname); 350 351 s = splbio(); 352 /* preserve our ID for now */ 353 my_id = 7; 354 355 /* 356 * Reset the chip 357 */ 358 *dev->sci_icmd = SCI_ICMD_TEST; 359 *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 360 delay (25); 361 *dev->sci_icmd = 0; 362 363 /* 364 * Set up various chip parameters 365 */ 366 *dev->sci_icmd = 0; 367 *dev->sci_tcmd = 0; 368 *dev->sci_sel_enb = 0; 369 370 /* anything else was zeroed by reset */ 371 372 splx (s); 373 374 printf("sci id %d\n", my_id); 375 dev->sc_flags |= SCI_ALIVE; 376 } 377 378 void 379 scierror(dev, csr) 380 struct sci_softc *dev; 381 u_char csr; 382 { 383 struct scsipi_xfer *xs; 384 385 xs = dev->sc_xs; 386 387 #ifdef DIAGNOSTIC 388 if (xs == NULL) 389 panic("scierror"); 390 #endif 391 if (xs->xs_control & XS_CTL_SILENT) 392 return; 393 394 printf("%s: ", dev->sc_dev.dv_xname); 395 printf("csr == 0x%02i\n", csr); /* XXX */ 396 } 397 398 /* 399 * select the bus, return when selected or error. 400 */ 401 int 402 sciselectbus(dev, target, our_addr) 403 struct sci_softc *dev; 404 u_char target, our_addr; 405 { 406 register int timeo = 2500; 407 408 QPRINTF (("sciselectbus %d\n", target)); 409 410 /* if we're already selected, return */ 411 if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 412 return 1; 413 414 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 415 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 416 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 417 return 1; 418 419 *dev->sci_tcmd = 0; 420 *dev->sci_odata = 0x80 + (1 << target); 421 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 422 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 423 if (--timeo > 0) { 424 delay(100); 425 } else { 426 break; 427 } 428 } 429 if (timeo) { 430 *dev->sci_icmd = 0; 431 dev->sc_flags |= SCI_SELECTED; 432 return (0); 433 } 434 *dev->sci_icmd = 0; 435 return (1); 436 } 437 438 int 439 sci_ixfer_out(dev, len, buf, phase) 440 register struct sci_softc *dev; 441 int len; 442 register u_char *buf; 443 int phase; 444 { 445 register int wait = sci_data_wait; 446 u_char csr; 447 448 QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 449 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 450 buf[6], buf[7], buf[8], buf[9])); 451 452 *dev->sci_tcmd = phase; 453 *dev->sci_icmd = SCI_ICMD_DATA; 454 for (;len > 0; len--) { 455 csr = *dev->sci_bus_csr; 456 while (!(csr & SCI_BUS_REQ)) { 457 if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 458 #ifdef DEBUG 459 if (sci_debug) 460 printf("sci_ixfer_out fail: l%d i%x w%d\n", 461 len, csr, wait); 462 #endif 463 return (len); 464 } 465 delay(1); 466 csr = *dev->sci_bus_csr; 467 } 468 469 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 470 break; 471 *dev->sci_odata = *buf; 472 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 473 buf++; 474 while (*dev->sci_bus_csr & SCI_BUS_REQ); 475 *dev->sci_icmd = SCI_ICMD_DATA; 476 } 477 478 QPRINTF(("sci_ixfer_out done\n")); 479 return (0); 480 } 481 482 void 483 sci_ixfer_in(dev, len, buf, phase) 484 struct sci_softc *dev; 485 int len; 486 register u_char *buf; 487 int phase; 488 { 489 int wait = sci_data_wait; 490 u_char csr; 491 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 492 volatile register u_char *sci_data = dev->sci_data; 493 volatile register u_char *sci_icmd = dev->sci_icmd; 494 #ifdef DEBUG 495 u_char *obp = buf; 496 #endif 497 498 csr = *sci_bus_csr; 499 500 QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 501 502 *dev->sci_tcmd = phase; 503 *sci_icmd = 0; 504 for (;len > 0; len--) { 505 csr = *sci_bus_csr; 506 while (!(csr & SCI_BUS_REQ)) { 507 if (!(csr & SCI_BUS_BSY) || --wait < 0) { 508 #ifdef DEBUG 509 if (sci_debug) 510 printf("sci_ixfer_in fail: l%d i%x w%d\n", 511 len, csr, wait); 512 #endif 513 return; 514 } 515 516 delay(1); 517 csr = *sci_bus_csr; 518 } 519 520 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 521 break; 522 *buf = *sci_data; 523 *sci_icmd = SCI_ICMD_ACK; 524 buf++; 525 while (*sci_bus_csr & SCI_BUS_REQ); 526 *sci_icmd = 0; 527 } 528 529 QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 530 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 531 obp[6], obp[7], obp[8], obp[9])); 532 } 533 534 /* 535 * SCSI 'immediate' command: issue a command to some SCSI device 536 * and get back an 'immediate' response (i.e., do programmed xfer 537 * to get the response data). 'cbuf' is a buffer containing a scsi 538 * command of length clen bytes. 'buf' is a buffer of length 'len' 539 * bytes for data. The transfer direction is determined by the device 540 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 541 * command must supply no data. 'xferphase' is the bus phase the 542 * caller expects to happen after the command is issued. It should 543 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 544 */ 545 int 546 sciicmd(dev, target, cbuf, clen, buf, len, xferphase) 547 struct sci_softc *dev; 548 void *cbuf, *buf; 549 int clen, len; 550 u_char xferphase; 551 { 552 u_char phase; 553 register int wait; 554 555 /* select the SCSI bus (it's an error if bus isn't free) */ 556 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 557 return -1; 558 /* 559 * Wait for a phase change (or error) then let the device 560 * sequence us through the various SCSI phases. 561 */ 562 dev->sc_stat[0] = 0xff; 563 dev->sc_msg[0] = 0xff; 564 phase = CMD_PHASE; 565 while (1) { 566 wait = sci_cmd_wait; 567 568 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 569 570 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 571 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 572 return -1; 573 } 574 phase = SCI_PHASE(*dev->sci_bus_csr); 575 576 switch (phase) { 577 case CMD_PHASE: 578 if (sci_ixfer_out (dev, clen, cbuf, phase)) 579 goto abort; 580 phase = xferphase; 581 break; 582 583 case DATA_IN_PHASE: 584 if (len <= 0) 585 goto abort; 586 wait = sci_data_wait; 587 sci_ixfer_in (dev, len, buf, phase); 588 phase = STATUS_PHASE; 589 break; 590 591 case DATA_OUT_PHASE: 592 if (len <= 0) 593 goto abort; 594 wait = sci_data_wait; 595 if (sci_ixfer_out (dev, len, buf, phase)) 596 goto abort; 597 phase = STATUS_PHASE; 598 break; 599 600 case MESG_IN_PHASE: 601 dev->sc_msg[0] = 0xff; 602 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 603 dev->sc_flags &= ~SCI_SELECTED; 604 while (*dev->sci_bus_csr & SCI_BUS_BSY); 605 goto out; 606 break; 607 608 case MESG_OUT_PHASE: 609 phase = STATUS_PHASE; 610 break; 611 612 case STATUS_PHASE: 613 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 614 phase = MESG_IN_PHASE; 615 break; 616 617 case BUS_FREE_PHASE: 618 goto out; 619 620 default: 621 printf("sci: unexpected phase %d in icmd from %d\n", 622 phase, target); 623 goto abort; 624 } 625 #if 0 626 if (wait <= 0) 627 goto abort; 628 #endif 629 } 630 631 abort: 632 sciabort(dev, "icmd"); 633 out: 634 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 635 return (dev->sc_stat[0]); 636 } 637 638 int 639 scigo(dev, xs) 640 struct sci_softc *dev; 641 struct scsipi_xfer *xs; 642 { 643 int count, target; 644 u_char phase, *addr; 645 646 target = xs->sc_link->scsipi_scsi.target; 647 count = xs->datalen; 648 addr = xs->data; 649 650 if (sci_no_dma) { 651 sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 652 addr, count, 653 xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 654 655 return (1); 656 } 657 658 /* select the SCSI bus (it's an error if bus isn't free) */ 659 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 660 return -1; 661 /* 662 * Wait for a phase change (or error) then let the device 663 * sequence us through the various SCSI phases. 664 */ 665 dev->sc_stat[0] = 0xff; 666 dev->sc_msg[0] = 0xff; 667 phase = CMD_PHASE; 668 while (1) { 669 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 670 SCI_BUS_BSY); 671 672 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 673 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 674 goto abort; 675 } 676 phase = SCI_PHASE(*dev->sci_bus_csr); 677 678 switch (phase) { 679 case CMD_PHASE: 680 if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 681 goto abort; 682 phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 683 break; 684 685 case DATA_IN_PHASE: 686 if (count <= 0) 687 goto abort; 688 /* XXX use psuedo DMA if available */ 689 if (count >= 128 && dev->dma_xfer_in) 690 (*dev->dma_xfer_in)(dev, count, addr, phase); 691 else 692 sci_ixfer_in (dev, count, addr, phase); 693 phase = STATUS_PHASE; 694 break; 695 696 case DATA_OUT_PHASE: 697 if (count <= 0) 698 goto abort; 699 /* XXX use psuedo DMA if available */ 700 if (count >= 128 && dev->dma_xfer_out) 701 (*dev->dma_xfer_out)(dev, count, addr, phase); 702 else 703 if (sci_ixfer_out (dev, count, addr, phase)) 704 goto abort; 705 phase = STATUS_PHASE; 706 break; 707 708 case MESG_IN_PHASE: 709 dev->sc_msg[0] = 0xff; 710 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 711 dev->sc_flags &= ~SCI_SELECTED; 712 while (*dev->sci_bus_csr & SCI_BUS_BSY); 713 goto out; 714 break; 715 716 case MESG_OUT_PHASE: 717 phase = STATUS_PHASE; 718 break; 719 720 case STATUS_PHASE: 721 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 722 phase = MESG_IN_PHASE; 723 break; 724 725 case BUS_FREE_PHASE: 726 goto out; 727 728 default: 729 printf("sci: unexpected phase %d in icmd from %d\n", 730 phase, target); 731 goto abort; 732 } 733 } 734 735 abort: 736 sciabort(dev, "go"); 737 out: 738 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 739 return (1); 740 } 741
Indexes created Fri Sep 26 20:09:58 GMT 2025