sci.c revision 1.26
1 /* $NetBSD: sci.c,v 1.26 2002/01/26 13:41:00 aymeric Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA NCR 5380 scsi adaptor driver 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/disklabel.h> 50 #include <sys/dkstat.h> 51 #include <sys/buf.h> 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <uvm/uvm_extern.h> 56 #include <machine/pmap.h> 57 #include <machine/cpu.h> 58 #include <amiga/amiga/device.h> 59 #include <amiga/amiga/custom.h> 60 #include <amiga/amiga/isr.h> 61 #include <amiga/dev/scireg.h> 62 #include <amiga/dev/scivar.h> 63 64 /* 65 * SCSI delays 66 * In u-seconds, primarily for state changes on the SPC. 67 */ 68 #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 69 #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 70 #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 71 72 int sciicmd(struct sci_softc *, int, void *, int, void *, int,u_char); 73 int scigo(struct sci_softc *, struct scsipi_xfer *); 74 int sciselectbus(struct sci_softc *, u_char, u_char); 75 void sciabort(struct sci_softc *, char *); 76 void scierror(struct sci_softc *, u_char); 77 void scisetdelay(int); 78 void sci_scsidone(struct sci_softc *, int); 79 void sci_donextcmd(struct sci_softc *); 80 int sci_ixfer_out(struct sci_softc *, int, register u_char *, int); 81 void sci_ixfer_in(struct sci_softc *, int, register u_char *, int); 82 83 int sci_cmd_wait = SCI_CMD_WAIT; 84 int sci_data_wait = SCI_DATA_WAIT; 85 int sci_init_wait = SCI_INIT_WAIT; 86 87 int sci_no_dma = 0; 88 89 #ifdef DEBUG 90 #define QPRINTF(a) if (sci_debug > 1) printf a 91 int sci_debug = 0; 92 #else 93 #define QPRINTF(a) 94 #endif 95 96 /* 97 * default minphys routine for sci based controllers 98 */ 99 void 100 sci_minphys(struct buf *bp) 101 { 102 103 /* 104 * No max transfer at this level. 105 */ 106 minphys(bp); 107 } 108 109 /* 110 * used by specific sci controller 111 * 112 * it appears that the higher level code does nothing with LUN's 113 * so I will too. I could plug it in, however so could they 114 * in scsi_scsipi_cmd(). 115 */ 116 void 117 sci_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 118 void *arg) 119 { 120 struct scsipi_xfer *xs; 121 struct scsipi_periph *periph; 122 struct sci_softc *dev = (void *)chan->chan_adapter->adapt_dev; 123 int flags, s; 124 125 switch (req) { 126 case ADAPTER_REQ_RUN_XFER: 127 xs = arg; 128 periph = xs->xs_periph; 129 flags = xs->xs_control; 130 131 if (flags & XS_CTL_DATA_UIO) 132 panic("sci: scsi data uio requested"); 133 134 if (dev->sc_xs && flags & XS_CTL_POLL) 135 panic("sci_scsicmd: busy"); 136 137 #ifdef DIAGNOSTIC 138 /* 139 * This should never happen as we track the resources 140 * in the mid-layer. 141 */ 142 if (dev->sc_xs) { 143 scsipi_printaddr(periph); 144 printf("unable to allocate scb\n"); 145 panic("sea_scsipi_request"); 146 } 147 #endif 148 149 dev->sc_xs = xs; 150 splx(s); 151 152 /* 153 * nothing is pending do it now. 154 */ 155 sci_donextcmd(dev); 156 157 return; 158 159 case ADAPTER_REQ_GROW_RESOURCES: 160 return; 161 162 case ADAPTER_REQ_SET_XFER_MODE: 163 return; 164 } 165 } 166 167 /* 168 * entered with dev->sc_xs pointing to the next xfer to perform 169 */ 170 void 171 sci_donextcmd(struct sci_softc *dev) 172 { 173 struct scsipi_xfer *xs; 174 struct scsipi_periph *periph; 175 int flags, phase, stat; 176 177 xs = dev->sc_xs; 178 periph = xs->xs_periph; 179 flags = xs->xs_control; 180 181 if (flags & XS_CTL_DATA_IN) 182 phase = DATA_IN_PHASE; 183 else if (flags & XS_CTL_DATA_OUT) 184 phase = DATA_OUT_PHASE; 185 else 186 phase = STATUS_PHASE; 187 188 if (flags & XS_CTL_RESET) 189 scireset(dev); 190 191 dev->sc_stat[0] = -1; 192 xs->cmd->bytes[0] |= periph->periph_lun << 5; 193 if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 194 stat = sciicmd(dev, periph->periph_target, xs->cmd, xs->cmdlen, 195 xs->data, xs->datalen, phase); 196 else if (scigo(dev, xs) == 0) 197 return; 198 else 199 stat = dev->sc_stat[0]; 200 201 sci_scsidone(dev, stat); 202 } 203 204 void 205 sci_scsidone(struct sci_softc *dev, int stat) 206 { 207 struct scsipi_xfer *xs; 208 209 xs = dev->sc_xs; 210 #ifdef DIAGNOSTIC 211 if (xs == NULL) 212 panic("sci_scsidone"); 213 #endif 214 xs->status = stat; 215 if (stat == 0) 216 xs->resid = 0; 217 else { 218 switch(stat) { 219 case SCSI_CHECK: 220 xs->resid = 0; 221 /* FALLTHOUGH */ 222 case SCSI_BUSY: 223 xs->error = XS_BUSY; 224 break; 225 default: 226 xs->error = XS_DRIVER_STUFFUP; 227 QPRINTF(("sci_scsicmd() bad %x\n", stat)); 228 break; 229 } 230 } 231 232 scsipi_done(xs); 233 234 } 235 236 void 237 sciabort(struct sci_softc *dev, char *where) 238 { 239 printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 240 dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr); 241 242 if (dev->sc_flags & SCI_SELECTED) { 243 244 /* lets just hope it worked.. */ 245 dev->sc_flags &= ~SCI_SELECTED; 246 /* XXX */ 247 scireset (dev); 248 } 249 } 250 251 /* 252 * XXX Set/reset long delays. 253 * 254 * if delay == 0, reset default delays 255 * if delay < 0, set both delays to default long initialization values 256 * if delay > 0, set both delays to this value 257 * 258 * Used when a devices is expected to respond slowly (e.g. during 259 * initialization). 260 */ 261 void 262 scisetdelay(int del) 263 { 264 static int saved_cmd_wait, saved_data_wait; 265 266 if (del) { 267 saved_cmd_wait = sci_cmd_wait; 268 saved_data_wait = sci_data_wait; 269 if (del > 0) 270 sci_cmd_wait = sci_data_wait = del; 271 else 272 sci_cmd_wait = sci_data_wait = sci_init_wait; 273 } else { 274 sci_cmd_wait = saved_cmd_wait; 275 sci_data_wait = saved_data_wait; 276 } 277 } 278 279 void 280 scireset(struct sci_softc *dev) 281 { 282 u_int s; 283 u_char my_id; 284 285 dev->sc_flags &= ~SCI_SELECTED; 286 if (dev->sc_flags & SCI_ALIVE) 287 sciabort(dev, "reset"); 288 289 printf("%s: ", dev->sc_dev.dv_xname); 290 291 s = splbio(); 292 /* preserve our ID for now */ 293 my_id = 7; 294 295 /* 296 * Reset the chip 297 */ 298 *dev->sci_icmd = SCI_ICMD_TEST; 299 *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 300 delay (25); 301 *dev->sci_icmd = 0; 302 303 /* 304 * Set up various chip parameters 305 */ 306 *dev->sci_icmd = 0; 307 *dev->sci_tcmd = 0; 308 *dev->sci_sel_enb = 0; 309 310 /* anything else was zeroed by reset */ 311 312 splx (s); 313 314 printf("sci id %d\n", my_id); 315 dev->sc_flags |= SCI_ALIVE; 316 } 317 318 void 319 scierror(struct sci_softc *dev, u_char csr) 320 { 321 struct scsipi_xfer *xs; 322 323 xs = dev->sc_xs; 324 325 #ifdef DIAGNOSTIC 326 if (xs == NULL) 327 panic("scierror"); 328 #endif 329 if (xs->xs_control & XS_CTL_SILENT) 330 return; 331 332 printf("%s: ", dev->sc_dev.dv_xname); 333 printf("csr == 0x%02i\n", csr); /* XXX */ 334 } 335 336 /* 337 * select the bus, return when selected or error. 338 */ 339 int 340 sciselectbus(struct sci_softc *dev, u_char target, u_char our_addr) 341 { 342 register int timeo = 2500; 343 344 QPRINTF (("sciselectbus %d\n", target)); 345 346 /* if we're already selected, return */ 347 if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 348 return 1; 349 350 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 351 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 352 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 353 return 1; 354 355 *dev->sci_tcmd = 0; 356 *dev->sci_odata = 0x80 + (1 << target); 357 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 358 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 359 if (--timeo > 0) { 360 delay(100); 361 } else { 362 break; 363 } 364 } 365 if (timeo) { 366 *dev->sci_icmd = 0; 367 dev->sc_flags |= SCI_SELECTED; 368 return (0); 369 } 370 *dev->sci_icmd = 0; 371 return (1); 372 } 373 374 int 375 sci_ixfer_out(register struct sci_softc *dev, int len, register u_char *buf, 376 int phase) 377 { 378 register int wait = sci_data_wait; 379 u_char csr; 380 381 QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 382 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 383 buf[6], buf[7], buf[8], buf[9])); 384 385 *dev->sci_tcmd = phase; 386 *dev->sci_icmd = SCI_ICMD_DATA; 387 for (;len > 0; len--) { 388 csr = *dev->sci_bus_csr; 389 while (!(csr & SCI_BUS_REQ)) { 390 if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 391 #ifdef DEBUG 392 if (sci_debug) 393 printf("sci_ixfer_out fail: l%d i%x w%d\n", 394 len, csr, wait); 395 #endif 396 return (len); 397 } 398 delay(1); 399 csr = *dev->sci_bus_csr; 400 } 401 402 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 403 break; 404 *dev->sci_odata = *buf; 405 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 406 buf++; 407 while (*dev->sci_bus_csr & SCI_BUS_REQ); 408 *dev->sci_icmd = SCI_ICMD_DATA; 409 } 410 411 QPRINTF(("sci_ixfer_out done\n")); 412 return (0); 413 } 414 415 void 416 sci_ixfer_in(struct sci_softc *dev, int len, register u_char *buf, int phase) 417 { 418 int wait = sci_data_wait; 419 u_char csr; 420 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 421 volatile register u_char *sci_data = dev->sci_data; 422 volatile register u_char *sci_icmd = dev->sci_icmd; 423 #ifdef DEBUG 424 u_char *obp = buf; 425 #endif 426 427 csr = *sci_bus_csr; 428 429 QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 430 431 *dev->sci_tcmd = phase; 432 *sci_icmd = 0; 433 for (;len > 0; len--) { 434 csr = *sci_bus_csr; 435 while (!(csr & SCI_BUS_REQ)) { 436 if (!(csr & SCI_BUS_BSY) || --wait < 0) { 437 #ifdef DEBUG 438 if (sci_debug) 439 printf("sci_ixfer_in fail: l%d i%x w%d\n", 440 len, csr, wait); 441 #endif 442 return; 443 } 444 445 delay(1); 446 csr = *sci_bus_csr; 447 } 448 449 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 450 break; 451 *buf = *sci_data; 452 *sci_icmd = SCI_ICMD_ACK; 453 buf++; 454 while (*sci_bus_csr & SCI_BUS_REQ); 455 *sci_icmd = 0; 456 } 457 458 QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 459 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 460 obp[6], obp[7], obp[8], obp[9])); 461 } 462 463 /* 464 * SCSI 'immediate' command: issue a command to some SCSI device 465 * and get back an 'immediate' response (i.e., do programmed xfer 466 * to get the response data). 'cbuf' is a buffer containing a scsi 467 * command of length clen bytes. 'buf' is a buffer of length 'len' 468 * bytes for data. The transfer direction is determined by the device 469 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 470 * command must supply no data. 'xferphase' is the bus phase the 471 * caller expects to happen after the command is issued. It should 472 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 473 */ 474 int 475 sciicmd(struct sci_softc *dev, int target, void *cbuf, int clen, void *buf, 476 int len, u_char xferphase) 477 { 478 u_char phase; 479 register int wait; 480 481 /* select the SCSI bus (it's an error if bus isn't free) */ 482 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 483 return -1; 484 /* 485 * Wait for a phase change (or error) then let the device 486 * sequence us through the various SCSI phases. 487 */ 488 dev->sc_stat[0] = 0xff; 489 dev->sc_msg[0] = 0xff; 490 phase = CMD_PHASE; 491 while (1) { 492 wait = sci_cmd_wait; 493 494 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 495 496 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 497 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 498 return -1; 499 } 500 phase = SCI_PHASE(*dev->sci_bus_csr); 501 502 switch (phase) { 503 case CMD_PHASE: 504 if (sci_ixfer_out (dev, clen, cbuf, phase)) 505 goto abort; 506 phase = xferphase; 507 break; 508 509 case DATA_IN_PHASE: 510 if (len <= 0) 511 goto abort; 512 wait = sci_data_wait; 513 sci_ixfer_in (dev, len, buf, phase); 514 phase = STATUS_PHASE; 515 break; 516 517 case DATA_OUT_PHASE: 518 if (len <= 0) 519 goto abort; 520 wait = sci_data_wait; 521 if (sci_ixfer_out (dev, len, buf, phase)) 522 goto abort; 523 phase = STATUS_PHASE; 524 break; 525 526 case MESG_IN_PHASE: 527 dev->sc_msg[0] = 0xff; 528 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 529 dev->sc_flags &= ~SCI_SELECTED; 530 while (*dev->sci_bus_csr & SCI_BUS_BSY); 531 goto out; 532 break; 533 534 case MESG_OUT_PHASE: 535 phase = STATUS_PHASE; 536 break; 537 538 case STATUS_PHASE: 539 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 540 phase = MESG_IN_PHASE; 541 break; 542 543 case BUS_FREE_PHASE: 544 goto out; 545 546 default: 547 printf("sci: unexpected phase %d in icmd from %d\n", 548 phase, target); 549 goto abort; 550 } 551 #if 0 552 if (wait <= 0) 553 goto abort; 554 #endif 555 } 556 557 abort: 558 sciabort(dev, "icmd"); 559 out: 560 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 561 return (dev->sc_stat[0]); 562 } 563 564 int 565 scigo(struct sci_softc *dev, struct scsipi_xfer *xs) 566 { 567 int count, target; 568 u_char phase, *addr; 569 570 target = xs->xs_periph->periph_target; 571 count = xs->datalen; 572 addr = xs->data; 573 574 if (sci_no_dma) { 575 sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 576 addr, count, 577 xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 578 579 return (1); 580 } 581 582 /* select the SCSI bus (it's an error if bus isn't free) */ 583 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 584 return -1; 585 /* 586 * Wait for a phase change (or error) then let the device 587 * sequence us through the various SCSI phases. 588 */ 589 dev->sc_stat[0] = 0xff; 590 dev->sc_msg[0] = 0xff; 591 phase = CMD_PHASE; 592 while (1) { 593 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 594 SCI_BUS_BSY); 595 596 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 597 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 598 goto abort; 599 } 600 phase = SCI_PHASE(*dev->sci_bus_csr); 601 602 switch (phase) { 603 case CMD_PHASE: 604 if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 605 goto abort; 606 phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 607 break; 608 609 case DATA_IN_PHASE: 610 if (count <= 0) 611 goto abort; 612 /* XXX use psuedo DMA if available */ 613 if (count >= 128 && dev->dma_xfer_in) 614 (*dev->dma_xfer_in)(dev, count, addr, phase); 615 else 616 sci_ixfer_in (dev, count, addr, phase); 617 phase = STATUS_PHASE; 618 break; 619 620 case DATA_OUT_PHASE: 621 if (count <= 0) 622 goto abort; 623 /* XXX use psuedo DMA if available */ 624 if (count >= 128 && dev->dma_xfer_out) 625 (*dev->dma_xfer_out)(dev, count, addr, phase); 626 else 627 if (sci_ixfer_out (dev, count, addr, phase)) 628 goto abort; 629 phase = STATUS_PHASE; 630 break; 631 632 case MESG_IN_PHASE: 633 dev->sc_msg[0] = 0xff; 634 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 635 dev->sc_flags &= ~SCI_SELECTED; 636 while (*dev->sci_bus_csr & SCI_BUS_BSY); 637 goto out; 638 break; 639 640 case MESG_OUT_PHASE: 641 phase = STATUS_PHASE; 642 break; 643 644 case STATUS_PHASE: 645 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 646 phase = MESG_IN_PHASE; 647 break; 648 649 case BUS_FREE_PHASE: 650 goto out; 651 652 default: 653 printf("sci: unexpected phase %d in icmd from %d\n", 654 phase, target); 655 goto abort; 656 } 657 } 658 659 abort: 660 sciabort(dev, "go"); 661 out: 662 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 663 return (1); 664 } 665
Indexes created Wed Sep 24 15:09:51 GMT 2025