siop.c revision 1.14 1 1.1 mw /*
2 1.8 chopps * Copyright (c) 1994 Michael L. Hitch
3 1.1 mw * Copyright (c) 1990 The Regents of the University of California.
4 1.1 mw * All rights reserved.
5 1.1 mw *
6 1.1 mw * This code is derived from software contributed to Berkeley by
7 1.1 mw * Van Jacobson of Lawrence Berkeley Laboratory.
8 1.1 mw *
9 1.1 mw * Redistribution and use in source and binary forms, with or without
10 1.1 mw * modification, are permitted provided that the following conditions
11 1.1 mw * are met:
12 1.1 mw * 1. Redistributions of source code must retain the above copyright
13 1.1 mw * notice, this list of conditions and the following disclaimer.
14 1.1 mw * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 mw * notice, this list of conditions and the following disclaimer in the
16 1.1 mw * documentation and/or other materials provided with the distribution.
17 1.1 mw * 3. All advertising materials mentioning features or use of this software
18 1.1 mw * must display the following acknowledgement:
19 1.1 mw * This product includes software developed by the University of
20 1.1 mw * California, Berkeley and its contributors.
21 1.1 mw * 4. Neither the name of the University nor the names of its contributors
22 1.1 mw * may be used to endorse or promote products derived from this software
23 1.1 mw * without specific prior written permission.
24 1.1 mw *
25 1.1 mw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 1.1 mw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 1.1 mw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 1.1 mw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 1.1 mw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 1.1 mw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 1.1 mw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 1.1 mw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 1.1 mw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 1.1 mw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 1.1 mw * SUCH DAMAGE.
36 1.1 mw *
37 1.1 mw * @(#)siop.c 7.5 (Berkeley) 5/4/91
38 1.14 chopps * $Id: siop.c,v 1.14 1994/06/22 16:20:53 chopps Exp $
39 1.1 mw */
40 1.1 mw
41 1.1 mw /*
42 1.1 mw * AMIGA 53C710 scsi adaptor driver
43 1.1 mw */
44 1.2 chopps
45 1.2 chopps /* need to know if any tapes have been configured */
46 1.2 chopps #include "st.h"
47 1.2 chopps
48 1.4 chopps #include <sys/param.h>
49 1.4 chopps #include <sys/systm.h>
50 1.8 chopps #include <sys/device.h>
51 1.4 chopps #include <sys/buf.h>
52 1.8 chopps #include <scsi/scsi_all.h>
53 1.8 chopps #include <scsi/scsiconf.h>
54 1.8 chopps #include <machine/cpu.h>
55 1.8 chopps #include <amiga/amiga/custom.h>
56 1.8 chopps #include <amiga/dev/siopreg.h>
57 1.4 chopps #include <amiga/dev/siopvar.h>
58 1.1 mw
59 1.1 mw extern u_int kvtop();
60 1.1 mw
61 1.1 mw /*
62 1.1 mw * SCSI delays
63 1.1 mw * In u-seconds, primarily for state changes on the SPC.
64 1.1 mw */
65 1.11 chopps #define SCSI_CMD_WAIT 500000 /* wait per step of 'immediate' cmds */
66 1.11 chopps #define SCSI_DATA_WAIT 500000 /* wait per data in/out step */
67 1.11 chopps #define SCSI_INIT_WAIT 500000 /* wait per step (both) during init */
68 1.1 mw
69 1.8 chopps int siopicmd __P((struct siop_softc *, int, void *, int, void *, int));
70 1.8 chopps int siopgo __P((struct siop_softc *, struct scsi_xfer *));
71 1.8 chopps int siopgetsense __P((struct siop_softc *, struct scsi_xfer *));
72 1.8 chopps void siopabort __P((struct siop_softc *, siop_regmap_p, char *));
73 1.8 chopps void sioperror __P((struct siop_softc *, siop_regmap_p, u_char));
74 1.8 chopps void siopstart __P((struct siop_softc *));
75 1.8 chopps void siopreset __P((struct siop_softc *));
76 1.8 chopps void siopsetdelay __P((int));
77 1.8 chopps void siop_scsidone __P((struct siop_softc *, int));
78 1.8 chopps void siop_donextcmd __P((struct siop_softc *));
79 1.8 chopps int siopintr __P((struct siop_softc *));
80 1.1 mw
81 1.1 mw /* 53C710 script */
82 1.1 mw unsigned long scripts[] = {
83 1.14 chopps 0x47000000, 0x000002d0, /* 000 - 0 */
84 1.14 chopps 0x838b0000, 0x000000d0, /* 008 - 8 */
85 1.14 chopps 0x7a1b1000, 0x00000000, /* 010 - 16 */
86 1.14 chopps 0x828a0000, 0x00000088, /* 018 - 24 */
87 1.14 chopps 0x9e020000, 0x0000ff01, /* 020 - 32 */
88 1.14 chopps 0x72350000, 0x00000000, /* 028 - 40 */
89 1.14 chopps 0x808c0000, 0x00000048, /* 030 - 48 */
90 1.14 chopps 0x58000008, 0x00000000, /* 038 - 56 */
91 1.14 chopps 0x1e000024, 0x00000024, /* 040 - 64 */
92 1.14 chopps 0x838b0000, 0x00000090, /* 048 - 72 */
93 1.14 chopps 0x1f00002c, 0x0000002c, /* 050 - 80 */
94 1.14 chopps 0x838b0000, 0x00000080, /* 058 - 88 */
95 1.14 chopps 0x868a0000, 0xffffffd0, /* 060 - 96 */
96 1.14 chopps 0x838a0000, 0x00000070, /* 068 - 104 */
97 1.14 chopps 0x878a0000, 0x00000158, /* 070 - 112 */
98 1.14 chopps 0x80880000, 0x00000028, /* 078 - 120 */
99 1.14 chopps 0x1e000004, 0x00000004, /* 080 - 128 */
100 1.14 chopps 0x838b0000, 0x00000050, /* 088 - 136 */
101 1.14 chopps 0x868a0000, 0xffffffe8, /* 090 - 144 */
102 1.14 chopps 0x838a0000, 0x00000040, /* 098 - 152 */
103 1.14 chopps 0x878a0000, 0x00000128, /* 0a0 - 160 */
104 1.14 chopps 0x9a020000, 0x0000ff02, /* 0a8 - 168 */
105 1.14 chopps 0x1a00000c, 0x0000000c, /* 0b0 - 176 */
106 1.14 chopps 0x878b0000, 0x00000168, /* 0b8 - 184 */
107 1.14 chopps 0x838a0000, 0x00000018, /* 0c0 - 192 */
108 1.14 chopps 0x818a0000, 0x000000e8, /* 0c8 - 200 */
109 1.14 chopps 0x808a0000, 0x000000b8, /* 0d0 - 208 */
110 1.14 chopps 0x98080000, 0x0000ff03, /* 0d8 - 216 */
111 1.14 chopps 0x1b000014, 0x00000014, /* 0e0 - 224 */
112 1.14 chopps 0x72090000, 0x00000000, /* 0e8 - 232 */
113 1.14 chopps 0x6a340000, 0x00000000, /* 0f0 - 240 */
114 1.14 chopps 0x9f030000, 0x0000ff04, /* 0f8 - 248 */
115 1.14 chopps 0x1f00001c, 0x0000001c, /* 100 - 256 */
116 1.14 chopps 0x808c0007, 0x00000050, /* 108 - 264 */
117 1.14 chopps 0x98040000, 0x0000ff26, /* 110 - 272 */
118 1.14 chopps 0x60000040, 0x00000000, /* 118 - 280 */
119 1.14 chopps 0x48000000, 0x00000000, /* 120 - 288 */
120 1.14 chopps 0x7c1bef00, 0x00000000, /* 128 - 296 */
121 1.14 chopps 0x72340000, 0x00000000, /* 130 - 304 */
122 1.14 chopps 0x980c0002, 0x0000fffc, /* 138 - 312 */
123 1.14 chopps 0x980c0008, 0x0000fffb, /* 140 - 320 */
124 1.14 chopps 0x980c0018, 0x0000fffd, /* 148 - 328 */
125 1.14 chopps 0x98040000, 0x0000fffe, /* 150 - 336 */
126 1.14 chopps 0x98080000, 0x0000ff00, /* 158 - 344 */
127 1.14 chopps 0x60000008, 0x00000000, /* 160 - 352 */
128 1.14 chopps 0x98080000, 0x0000ff26, /* 168 - 360 */
129 1.14 chopps 0x60000040, 0x00000000, /* 170 - 368 */
130 1.14 chopps 0x828b0000, 0xffffff28, /* 178 - 376 */
131 1.14 chopps 0x838b0000, 0xffffff58, /* 180 - 384 */
132 1.14 chopps 0x878b0000, 0xffffff68, /* 188 - 392 */
133 1.14 chopps 0x18000034, 0x00000034, /* 190 - 400 */
134 1.14 chopps 0x808b0000, 0x000001c0, /* 198 - 408 */
135 1.14 chopps 0x838b0000, 0xffffff38, /* 1a0 - 416 */
136 1.14 chopps 0x878a0000, 0x000000d0, /* 1a8 - 424 */
137 1.14 chopps 0x98080000, 0x0000ff05, /* 1b0 - 432 */
138 1.14 chopps 0x19000034, 0x00000034, /* 1b8 - 440 */
139 1.14 chopps 0x818b0000, 0x00000160, /* 1c0 - 448 */
140 1.14 chopps 0x80880000, 0xffffffd0, /* 1c8 - 456 */
141 1.14 chopps 0x1f00001c, 0x0000001c, /* 1d0 - 464 */
142 1.14 chopps 0x808c0001, 0x00000018, /* 1d8 - 472 */
143 1.14 chopps 0x980c0002, 0x0000ff08, /* 1e0 - 480 */
144 1.14 chopps 0x808c0004, 0x00000020, /* 1e8 - 488 */
145 1.14 chopps 0x98080000, 0x0000ff06, /* 1f0 - 496 */
146 1.14 chopps 0x60000040, 0x00000000, /* 1f8 - 504 */
147 1.14 chopps 0x1f00002c, 0x0000002c, /* 200 - 512 */
148 1.14 chopps 0x98080000, 0x0000ff07, /* 208 - 520 */
149 1.14 chopps 0x60000040, 0x00000000, /* 210 - 528 */
150 1.14 chopps 0x48000000, 0x00000000, /* 218 - 536 */
151 1.14 chopps 0x98080000, 0x0000ff09, /* 220 - 544 */
152 1.14 chopps 0x1f00001c, 0x0000001c, /* 228 - 552 */
153 1.14 chopps 0x808c0001, 0x00000018, /* 230 - 560 */
154 1.14 chopps 0x980c0002, 0x0000ff10, /* 238 - 568 */
155 1.14 chopps 0x808c0004, 0x00000020, /* 240 - 576 */
156 1.14 chopps 0x98080000, 0x0000ff11, /* 248 - 584 */
157 1.14 chopps 0x60000040, 0x00000000, /* 250 - 592 */
158 1.14 chopps 0x1f00002c, 0x0000002c, /* 258 - 600 */
159 1.14 chopps 0x98080000, 0x0000ff12, /* 260 - 608 */
160 1.14 chopps 0x60000040, 0x00000000, /* 268 - 616 */
161 1.14 chopps 0x48000000, 0x00000000, /* 270 - 624 */
162 1.14 chopps 0x98080000, 0x0000ff13, /* 278 - 632 */
163 1.14 chopps 0x1f00001c, 0x0000001c, /* 280 - 640 */
164 1.14 chopps 0x808c0001, 0x00000018, /* 288 - 648 */
165 1.14 chopps 0x980c0002, 0x0000ff14, /* 290 - 656 */
166 1.14 chopps 0x808c0004, 0x00000020, /* 298 - 664 */
167 1.14 chopps 0x98080000, 0x0000ff15, /* 2a0 - 672 */
168 1.14 chopps 0x60000040, 0x00000000, /* 2a8 - 680 */
169 1.14 chopps 0x1f00002c, 0x0000002c, /* 2b0 - 688 */
170 1.14 chopps 0x98080000, 0x0000ff16, /* 2b8 - 696 */
171 1.14 chopps 0x60000040, 0x00000000, /* 2c0 - 704 */
172 1.14 chopps 0x48000000, 0x00000000, /* 2c8 - 712 */
173 1.14 chopps 0x98080000, 0x0000ff17, /* 2d0 - 720 */
174 1.14 chopps 0x54000000, 0x00000040, /* 2d8 - 728 */
175 1.14 chopps 0x9f030000, 0x0000ff18, /* 2e0 - 736 */
176 1.14 chopps 0x1f00001c, 0x0000001c, /* 2e8 - 744 */
177 1.14 chopps 0x990b0000, 0x0000ff19, /* 2f0 - 752 */
178 1.14 chopps 0x980a0000, 0x0000ff20, /* 2f8 - 760 */
179 1.14 chopps 0x9f0a0000, 0x0000ff21, /* 300 - 768 */
180 1.14 chopps 0x9b0a0000, 0x0000ff22, /* 308 - 776 */
181 1.14 chopps 0x9e0a0000, 0x0000ff23, /* 310 - 784 */
182 1.14 chopps 0x98080000, 0x0000ff24, /* 318 - 792 */
183 1.14 chopps 0x98080000, 0x0000ff25, /* 320 - 800 */
184 1.14 chopps 0x76100800, 0x00000000, /* 328 - 808 */
185 1.14 chopps 0x80840700, 0x00000008, /* 330 - 816 */
186 1.14 chopps 0x7e110100, 0x00000000, /* 338 - 824 */
187 1.14 chopps 0x6a100000, 0x00000000, /* 340 - 832 */
188 1.14 chopps 0x19000034, 0x00000034, /* 348 - 840 */
189 1.14 chopps 0x818b0000, 0xffffffd0, /* 350 - 848 */
190 1.14 chopps 0x98080000, 0x0000ff27, /* 358 - 856 */
191 1.14 chopps 0x76100800, 0x00000000, /* 360 - 864 */
192 1.14 chopps 0x80840700, 0x00000008, /* 368 - 872 */
193 1.14 chopps 0x7e110100, 0x00000000, /* 370 - 880 */
194 1.14 chopps 0x6a100000, 0x00000000, /* 378 - 888 */
195 1.14 chopps 0x18000034, 0x00000034, /* 380 - 896 */
196 1.14 chopps 0x808b0000, 0xffffffd0, /* 388 - 904 */
197 1.14 chopps 0x98080000, 0x0000ff27 /* 390 - 912 */
198 1.1 mw };
199 1.1 mw
200 1.1 mw #define Ent_msgout 0x00000018
201 1.14 chopps #define Ent_cmd 0x000000a8
202 1.1 mw #define Ent_status 0x000000e0
203 1.1 mw #define Ent_msgin 0x000000f8
204 1.14 chopps #define Ent_dataout 0x00000190
205 1.14 chopps #define Ent_datain 0x000001b8
206 1.1 mw
207 1.8 chopps /* default to not inhibit sync negotiation on any drive */
208 1.8 chopps /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */
209 1.14 chopps u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0 }; /* initialize, so patchable */
210 1.8 chopps int siop_no_dma = 0;
211 1.8 chopps
212 1.8 chopps int siop_reset_delay = 2000; /* delay after reset, in milleseconds */
213 1.8 chopps int siop_sync_period = 50; /* synchronous transfer period, in nanoseconds */
214 1.1 mw
215 1.1 mw int siop_cmd_wait = SCSI_CMD_WAIT;
216 1.1 mw int siop_data_wait = SCSI_DATA_WAIT;
217 1.1 mw int siop_init_wait = SCSI_INIT_WAIT;
218 1.1 mw
219 1.1 mw static struct {
220 1.1 mw unsigned char x; /* period from sync request message */
221 1.1 mw unsigned char y; /* siop_period << 4 | sbcl */
222 1.1 mw } xxx[] = {
223 1.1 mw {0x0f, 0x01},
224 1.1 mw {0x13, 0x11},
225 1.1 mw {0x17, 0x21},
226 1.1 mw /* {0x17, 0x02}, */
227 1.1 mw {0x1b, 0x31},
228 1.1 mw {0x1d, 0x12},
229 1.1 mw {0x1e, 0x41},
230 1.1 mw /* {0x1e, 0x03}, */
231 1.1 mw {0x22, 0x51},
232 1.1 mw {0x23, 0x22},
233 1.1 mw {0x26, 0x61},
234 1.1 mw /* {0x26, 0x13}, */
235 1.1 mw {0x29, 0x32},
236 1.1 mw {0x2a, 0x71},
237 1.1 mw {0x2d, 0x23},
238 1.1 mw {0x2e, 0x42},
239 1.1 mw {0x34, 0x52},
240 1.1 mw {0x35, 0x33},
241 1.1 mw {0x3a, 0x62},
242 1.1 mw {0x3c, 0x43},
243 1.1 mw {0x40, 0x72},
244 1.1 mw {0x44, 0x53},
245 1.1 mw {0x4b, 0x63},
246 1.1 mw {0x53, 0x73}
247 1.1 mw };
248 1.1 mw
249 1.1 mw #ifdef DEBUG
250 1.8 chopps #define QPRINTF(a) if (siop_debug > 1) printf a
251 1.8 chopps /*
252 1.8 chopps * 0x01 - full debug
253 1.8 chopps * 0x02 - DMA chaining
254 1.8 chopps * 0x04 - siopintr
255 1.8 chopps * 0x08 - phase mismatch
256 1.8 chopps * 0x10 - panic on phase mismatch
257 1.8 chopps */
258 1.8 chopps int siop_debug = 0;
259 1.8 chopps int siopsync_debug = 0;
260 1.8 chopps int siopdma_hits = 0;
261 1.8 chopps int siopdma_misses = 0;
262 1.14 chopps int siopchain_ints = 0;
263 1.1 mw #endif
264 1.8 chopps
265 1.8 chopps
266 1.8 chopps /*
267 1.8 chopps * default minphys routine for siop based controllers
268 1.8 chopps */
269 1.8 chopps void
270 1.8 chopps siop_minphys(bp)
271 1.8 chopps struct buf *bp;
272 1.8 chopps {
273 1.8 chopps /*
274 1.8 chopps * no max transfer at this level
275 1.8 chopps */
276 1.1 mw }
277 1.1 mw
278 1.8 chopps /*
279 1.8 chopps * must be used
280 1.8 chopps */
281 1.8 chopps u_int
282 1.8 chopps siop_adinfo()
283 1.8 chopps {
284 1.8 chopps /*
285 1.8 chopps * one request at a time please
286 1.8 chopps */
287 1.8 chopps return(1);
288 1.8 chopps }
289 1.1 mw
290 1.1 mw /*
291 1.8 chopps * used by specific siop controller
292 1.1 mw *
293 1.8 chopps * it appears that the higher level code does nothing with LUN's
294 1.8 chopps * so I will too. I could plug it in, however so could they
295 1.8 chopps * in scsi_scsi_cmd().
296 1.8 chopps */
297 1.8 chopps int
298 1.8 chopps siop_scsicmd(xs)
299 1.8 chopps struct scsi_xfer *xs;
300 1.8 chopps {
301 1.8 chopps struct siop_pending *pendp;
302 1.8 chopps struct siop_softc *dev;
303 1.8 chopps struct scsi_link *slp;
304 1.8 chopps int flags, s;
305 1.8 chopps
306 1.8 chopps slp = xs->sc_link;
307 1.8 chopps dev = slp->adapter_softc;
308 1.8 chopps flags = xs->flags;
309 1.8 chopps
310 1.8 chopps if (flags & SCSI_DATA_UIO)
311 1.8 chopps panic("siop: scsi data uio requested");
312 1.8 chopps
313 1.8 chopps if (dev->sc_xs && flags & SCSI_NOMASK)
314 1.8 chopps panic("siop_scsicmd: busy");
315 1.8 chopps
316 1.8 chopps s = splbio();
317 1.8 chopps pendp = &dev->sc_xsstore[slp->target][slp->lun];
318 1.8 chopps if (pendp->xs) {
319 1.8 chopps splx(s);
320 1.8 chopps return(TRY_AGAIN_LATER);
321 1.8 chopps }
322 1.8 chopps
323 1.8 chopps if (dev->sc_xs) {
324 1.8 chopps pendp->xs = xs;
325 1.8 chopps TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link);
326 1.8 chopps splx(s);
327 1.8 chopps return(SUCCESSFULLY_QUEUED);
328 1.8 chopps }
329 1.8 chopps pendp->xs = NULL;
330 1.8 chopps dev->sc_xs = xs;
331 1.8 chopps splx(s);
332 1.8 chopps
333 1.8 chopps /*
334 1.8 chopps * nothing is pending do it now.
335 1.8 chopps */
336 1.8 chopps siop_donextcmd(dev);
337 1.8 chopps
338 1.8 chopps if (flags & SCSI_NOMASK)
339 1.8 chopps return(COMPLETE);
340 1.8 chopps return(SUCCESSFULLY_QUEUED);
341 1.8 chopps }
342 1.8 chopps
343 1.8 chopps /*
344 1.8 chopps * entered with dev->sc_xs pointing to the next xfer to perform
345 1.1 mw */
346 1.1 mw void
347 1.8 chopps siop_donextcmd(dev)
348 1.8 chopps struct siop_softc *dev;
349 1.8 chopps {
350 1.8 chopps struct scsi_xfer *xs;
351 1.8 chopps struct scsi_link *slp;
352 1.8 chopps int flags, phase, stat;
353 1.8 chopps
354 1.8 chopps xs = dev->sc_xs;
355 1.8 chopps slp = xs->sc_link;
356 1.8 chopps flags = xs->flags;
357 1.8 chopps
358 1.8 chopps #if 0
359 1.8 chopps if (flags & SCSI_DATA_IN)
360 1.8 chopps phase = DATA_IN_PHASE;
361 1.8 chopps else if (flags & SCSI_DATA_OUT)
362 1.8 chopps phase = DATA_OUT_PHASE;
363 1.8 chopps else
364 1.8 chopps phase = STATUS_PHASE;
365 1.8 chopps #endif
366 1.8 chopps
367 1.8 chopps if (flags & SCSI_RESET)
368 1.8 chopps siopreset(dev);
369 1.8 chopps
370 1.8 chopps dev->sc_stat[0] = -1;
371 1.8 chopps #if 0
372 1.8 chopps if (phase == STATUS_PHASE || flags & SCSI_NOMASK)
373 1.8 chopps #else
374 1.10 chopps if (flags & SCSI_NOMASK || siop_no_dma)
375 1.8 chopps #endif
376 1.8 chopps stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen,
377 1.8 chopps xs->data, xs->datalen/*, phase*/);
378 1.8 chopps else if (siopgo(dev, xs) == 0)
379 1.8 chopps return;
380 1.8 chopps else
381 1.8 chopps stat = dev->sc_stat[0];
382 1.8 chopps
383 1.8 chopps siop_scsidone(dev, stat);
384 1.8 chopps }
385 1.8 chopps
386 1.8 chopps void
387 1.8 chopps siop_scsidone(dev, stat)
388 1.8 chopps struct siop_softc *dev;
389 1.8 chopps int stat;
390 1.1 mw {
391 1.8 chopps struct siop_pending *pendp;
392 1.8 chopps struct scsi_xfer *xs;
393 1.8 chopps int s, donext;
394 1.8 chopps
395 1.8 chopps xs = dev->sc_xs;
396 1.8 chopps #ifdef DIAGNOSTIC
397 1.8 chopps if (xs == NULL)
398 1.8 chopps panic("siop_scsidone");
399 1.8 chopps #endif
400 1.8 chopps /*
401 1.8 chopps * is this right?
402 1.8 chopps */
403 1.8 chopps xs->status = stat;
404 1.8 chopps
405 1.8 chopps if (stat == 0 || xs->flags & SCSI_ERR_OK)
406 1.8 chopps xs->resid = 0;
407 1.8 chopps else {
408 1.8 chopps switch(stat) {
409 1.8 chopps case SCSI_CHECK:
410 1.8 chopps if (stat = siopgetsense(dev, xs))
411 1.8 chopps goto bad_sense;
412 1.8 chopps xs->error = XS_SENSE;
413 1.8 chopps break;
414 1.8 chopps case SCSI_BUSY:
415 1.8 chopps xs->error = XS_BUSY;
416 1.8 chopps break;
417 1.8 chopps bad_sense:
418 1.8 chopps default:
419 1.8 chopps xs->error = XS_DRIVER_STUFFUP;
420 1.8 chopps QPRINTF(("siop_scsicmd() bad %x\n", stat));
421 1.8 chopps break;
422 1.8 chopps }
423 1.8 chopps }
424 1.8 chopps xs->flags |= ITSDONE;
425 1.1 mw
426 1.8 chopps /*
427 1.8 chopps * grab next command before scsi_done()
428 1.8 chopps * this way no single device can hog scsi resources.
429 1.8 chopps */
430 1.8 chopps s = splbio();
431 1.8 chopps pendp = dev->sc_xslist.tqh_first;
432 1.8 chopps if (pendp == NULL) {
433 1.8 chopps donext = 0;
434 1.8 chopps dev->sc_xs = NULL;
435 1.1 mw } else {
436 1.8 chopps donext = 1;
437 1.8 chopps TAILQ_REMOVE(&dev->sc_xslist, pendp, link);
438 1.8 chopps dev->sc_xs = pendp->xs;
439 1.8 chopps pendp->xs = NULL;
440 1.1 mw }
441 1.8 chopps splx(s);
442 1.8 chopps scsi_done(xs);
443 1.8 chopps
444 1.8 chopps if (donext)
445 1.8 chopps siop_donextcmd(dev);
446 1.1 mw }
447 1.1 mw
448 1.8 chopps int
449 1.8 chopps siopgetsense(dev, xs)
450 1.8 chopps struct siop_softc *dev;
451 1.8 chopps struct scsi_xfer *xs;
452 1.8 chopps {
453 1.8 chopps struct scsi_sense rqs;
454 1.8 chopps struct scsi_link *slp;
455 1.8 chopps int stat;
456 1.1 mw
457 1.8 chopps slp = xs->sc_link;
458 1.8 chopps
459 1.8 chopps rqs.op_code = REQUEST_SENSE;
460 1.8 chopps rqs.byte2 = slp->lun << 5;
461 1.9 chopps #ifdef not_yet
462 1.8 chopps rqs.length = xs->req_sense_length ? xs->req_sense_length :
463 1.8 chopps sizeof(xs->sense);
464 1.9 chopps #else
465 1.9 chopps rqs.length = sizeof(xs->sense);
466 1.9 chopps #endif
467 1.8 chopps if (rqs.length > sizeof (xs->sense))
468 1.8 chopps rqs.length = sizeof (xs->sense);
469 1.8 chopps rqs.unused[0] = rqs.unused[1] = rqs.control = 0;
470 1.8 chopps
471 1.8 chopps return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense,
472 1.8 chopps rqs.length));
473 1.8 chopps }
474 1.1 mw
475 1.8 chopps void
476 1.1 mw siopabort(dev, regs, where)
477 1.1 mw register struct siop_softc *dev;
478 1.8 chopps siop_regmap_p regs;
479 1.1 mw char *where;
480 1.1 mw {
481 1.1 mw
482 1.8 chopps printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n",
483 1.8 chopps dev->sc_dev.dv_xname,
484 1.1 mw where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl);
485 1.1 mw
486 1.1 mw if (dev->sc_flags & SIOP_SELECTED) {
487 1.1 mw #ifdef TODO
488 1.1 mw SET_SBIC_cmd (regs, SBIC_CMD_ABORT);
489 1.1 mw WAIT_CIP (regs);
490 1.1 mw
491 1.1 mw GET_SBIC_asr (regs, asr);
492 1.1 mw if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI))
493 1.1 mw {
494 1.1 mw /* ok, get more drastic.. */
495 1.1 mw
496 1.1 mw SET_SBIC_cmd (regs, SBIC_CMD_RESET);
497 1.11 chopps delay(25);
498 1.1 mw SBIC_WAIT(regs, SBIC_ASR_INT, 0);
499 1.1 mw GET_SBIC_csr (regs, csr); /* clears interrupt also */
500 1.1 mw
501 1.1 mw dev->sc_flags &= ~SIOP_SELECTED;
502 1.1 mw return;
503 1.1 mw }
504 1.1 mw
505 1.1 mw do
506 1.1 mw {
507 1.1 mw SBIC_WAIT (regs, SBIC_ASR_INT, 0);
508 1.1 mw GET_SBIC_csr (regs, csr);
509 1.1 mw }
510 1.1 mw while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1)
511 1.1 mw && (csr != SBIC_CSR_CMD_INVALID));
512 1.1 mw #endif
513 1.1 mw
514 1.1 mw /* lets just hope it worked.. */
515 1.1 mw dev->sc_flags &= ~SIOP_SELECTED;
516 1.1 mw }
517 1.1 mw }
518 1.1 mw
519 1.8 chopps /*
520 1.8 chopps * XXX Set/reset long delays.
521 1.8 chopps *
522 1.8 chopps * if delay == 0, reset default delays
523 1.8 chopps * if delay < 0, set both delays to default long initialization values
524 1.8 chopps * if delay > 0, set both delays to this value
525 1.8 chopps *
526 1.8 chopps * Used when a devices is expected to respond slowly (e.g. during
527 1.8 chopps * initialization).
528 1.8 chopps */
529 1.8 chopps void
530 1.8 chopps siop_delay(delay)
531 1.8 chopps int delay;
532 1.1 mw {
533 1.8 chopps static int saved_cmd_wait, saved_data_wait;
534 1.1 mw
535 1.8 chopps if (delay) {
536 1.8 chopps saved_cmd_wait = siop_cmd_wait;
537 1.8 chopps saved_data_wait = siop_data_wait;
538 1.8 chopps if (delay > 0)
539 1.8 chopps siop_cmd_wait = siop_data_wait = delay;
540 1.8 chopps else
541 1.8 chopps siop_cmd_wait = siop_data_wait = siop_init_wait;
542 1.8 chopps } else {
543 1.8 chopps siop_cmd_wait = saved_cmd_wait;
544 1.8 chopps siop_data_wait = saved_data_wait;
545 1.8 chopps }
546 1.1 mw }
547 1.1 mw
548 1.1 mw void
549 1.12 chopps siopinitialize(dev)
550 1.12 chopps struct siop_softc *dev;
551 1.12 chopps {
552 1.12 chopps /*
553 1.14 chopps * Need to check that scripts is on a long word boundary
554 1.14 chopps * and that DS is on a long word boundary.
555 1.14 chopps * Also need to verify that dev doesn't non-contiguous
556 1.14 chopps * physical pages.
557 1.12 chopps */
558 1.12 chopps dev->sc_scriptspa = kvtop(scripts);
559 1.12 chopps dev->sc_dspa = kvtop(&dev->sc_ds);
560 1.12 chopps dev->sc_lunpa = kvtop(&dev->sc_lun);
561 1.12 chopps dev->sc_statuspa = kvtop(&dev->sc_stat[0]);
562 1.12 chopps dev->sc_msgpa = kvtop(&dev->sc_msg[0]);
563 1.12 chopps siopreset (dev);
564 1.12 chopps }
565 1.12 chopps
566 1.12 chopps void
567 1.8 chopps siopreset(dev)
568 1.8 chopps struct siop_softc *dev;
569 1.1 mw {
570 1.8 chopps siop_regmap_p regs;
571 1.1 mw u_int i, s;
572 1.1 mw u_char my_id, csr;
573 1.1 mw
574 1.8 chopps regs = dev->sc_siopp;
575 1.8 chopps
576 1.1 mw if (dev->sc_flags & SIOP_ALIVE)
577 1.1 mw siopabort(dev, regs, "reset");
578 1.1 mw
579 1.14 chopps printf("%s: ", dev->sc_dev.dv_xname); /* XXXX */
580 1.1 mw
581 1.1 mw s = splbio();
582 1.1 mw my_id = 7;
583 1.1 mw
584 1.1 mw /*
585 1.1 mw * Reset the chip
586 1.1 mw * XXX - is this really needed?
587 1.1 mw */
588 1.1 mw regs->siop_sien &= ~SIOP_SIEN_RST;
589 1.1 mw regs->siop_scntl1 |= SIOP_SCNTL1_RST;
590 1.1 mw for (i = 0; i < 1000; ++i)
591 1.1 mw ;
592 1.1 mw regs->siop_scntl1 &= ~SIOP_SCNTL1_RST;
593 1.1 mw regs->siop_sien |= SIOP_SIEN_RST;
594 1.1 mw
595 1.1 mw /*
596 1.1 mw * Set up various chip parameters
597 1.1 mw */
598 1.1 mw regs->siop_istat = 0x40;
599 1.1 mw for (i = 0; i < 1000; ++i)
600 1.1 mw ;
601 1.1 mw regs->siop_istat = 0x00;
602 1.1 mw regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG;
603 1.8 chopps regs->siop_dcntl = dev->sc_clock_freq & 0xff;
604 1.8 chopps regs->siop_dmode = 0x80; /* burst length = 4 */
605 1.1 mw regs->siop_sien = 0x00; /* don't enable interrupts yet */
606 1.1 mw regs->siop_dien = 0x00; /* don't enable interrupts yet */
607 1.1 mw regs->siop_scid = 1 << my_id;
608 1.1 mw regs->siop_dwt = 0x00;
609 1.1 mw regs->siop_ctest0 |= 0x20; /* Enable Active Negation ?? */
610 1.8 chopps regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff;
611 1.1 mw
612 1.1 mw /* will need to re-negotiate sync xfers */
613 1.1 mw bzero(&dev->sc_sync, sizeof (dev->sc_sync));
614 1.1 mw
615 1.1 mw splx (s);
616 1.1 mw
617 1.11 chopps delay (siop_reset_delay * 1000);
618 1.8 chopps printf("siop id %d reset\n", my_id);
619 1.1 mw dev->sc_flags |= SIOP_ALIVE;
620 1.1 mw dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA);
621 1.1 mw }
622 1.1 mw
623 1.1 mw /*
624 1.1 mw * Setup Data Storage for 53C710 and start SCRIPTS processing
625 1.1 mw */
626 1.1 mw
627 1.8 chopps void
628 1.1 mw siop_setup (dev, target, cbuf, clen, buf, len)
629 1.1 mw struct siop_softc *dev;
630 1.1 mw int target;
631 1.1 mw u_char *cbuf;
632 1.1 mw int clen;
633 1.1 mw u_char *buf;
634 1.1 mw int len;
635 1.1 mw {
636 1.8 chopps siop_regmap_p regs = dev->sc_siopp;
637 1.1 mw int i;
638 1.1 mw int nchain;
639 1.1 mw int count, tcount;
640 1.1 mw char *addr, *dmaend;
641 1.1 mw
642 1.1 mw dev->sc_istat = 0;
643 1.1 mw dev->sc_lun = 0x80; /* XXX */
644 1.1 mw dev->sc_stat[0] = -1;
645 1.1 mw dev->sc_msg[0] = -1;
646 1.1 mw dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8);
647 1.1 mw dev->sc_ds.idlen = 1;
648 1.12 chopps dev->sc_ds.idbuf = (char *) dev->sc_lunpa;
649 1.1 mw dev->sc_ds.cmdlen = clen;
650 1.1 mw dev->sc_ds.cmdbuf = (char *) kvtop(cbuf);
651 1.1 mw dev->sc_ds.stslen = 1;
652 1.12 chopps dev->sc_ds.stsbuf = (char *) dev->sc_statuspa;
653 1.1 mw dev->sc_ds.msglen = 1;
654 1.12 chopps dev->sc_ds.msgbuf = (char *) dev->sc_msgpa;
655 1.1 mw dev->sc_ds.sdtrolen = 0;
656 1.1 mw dev->sc_ds.sdtrilen = 0;
657 1.14 chopps bzero(&dev->sc_ds.chain, sizeof (dev->sc_ds.chain));
658 1.1 mw
659 1.1 mw if (dev->sc_sync[target].state == SYNC_START) {
660 1.8 chopps if (siop_inhibit_sync[target]) {
661 1.1 mw dev->sc_sync[target].state = SYNC_DONE;
662 1.1 mw dev->sc_sync[target].offset = 0;
663 1.1 mw dev->sc_sync[target].period = 0;
664 1.1 mw #ifdef DEBUG
665 1.1 mw if (siopsync_debug)
666 1.1 mw printf ("Forcing target %d asynchronous\n", target);
667 1.1 mw #endif
668 1.1 mw }
669 1.1 mw else {
670 1.1 mw dev->sc_msg[1] = MSG_IDENTIFY;
671 1.1 mw dev->sc_msg[2] = MSG_EXT_MESSAGE;
672 1.1 mw dev->sc_msg[3] = 3;
673 1.1 mw dev->sc_msg[4] = MSG_SYNC_REQ;
674 1.8 chopps dev->sc_msg[5] = siop_sync_period / 4;
675 1.1 mw dev->sc_msg[6] = SIOP_MAX_OFFSET;
676 1.1 mw dev->sc_ds.sdtrolen = 6;
677 1.8 chopps dev->sc_ds.sdtrilen = 6;
678 1.14 chopps dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) (dev->sc_msgpa + 1);
679 1.1 mw dev->sc_sync[target].state = SYNC_SENT;
680 1.1 mw #ifdef DEBUG
681 1.1 mw if (siopsync_debug)
682 1.1 mw printf ("Sending sync request to target %d\n", target);
683 1.1 mw #endif
684 1.1 mw }
685 1.1 mw }
686 1.1 mw
687 1.1 mw /*
688 1.1 mw * If length is > 1 page, check for consecutive physical pages
689 1.1 mw * Need to set up chaining if not
690 1.1 mw */
691 1.1 mw nchain = 0;
692 1.1 mw count = len;
693 1.1 mw addr = buf;
694 1.1 mw dmaend = NULL;
695 1.1 mw while (count > 0) {
696 1.1 mw dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr);
697 1.1 mw if (count < (tcount = NBPG - ((int) addr & PGOFSET)))
698 1.1 mw tcount = count;
699 1.1 mw dev->sc_ds.chain[nchain].datalen = tcount;
700 1.1 mw addr += tcount;
701 1.1 mw count -= tcount;
702 1.1 mw if (dev->sc_ds.chain[nchain].databuf == dmaend) {
703 1.1 mw dmaend += dev->sc_ds.chain[nchain].datalen;
704 1.1 mw dev->sc_ds.chain[--nchain].datalen += tcount;
705 1.1 mw #ifdef DEBUG
706 1.1 mw ++siopdma_hits;
707 1.1 mw #endif
708 1.1 mw }
709 1.1 mw else {
710 1.1 mw dmaend = dev->sc_ds.chain[nchain].databuf +
711 1.1 mw dev->sc_ds.chain[nchain].datalen;
712 1.1 mw dev->sc_ds.chain[nchain].datalen = tcount;
713 1.1 mw #ifdef DEBUG
714 1.14 chopps if (nchain) /* Don't count miss on first one */
715 1.14 chopps ++siopdma_misses;
716 1.1 mw #endif
717 1.1 mw }
718 1.1 mw ++nchain;
719 1.14 chopps if (nchain < DMAMAXIO) /* force error if buffer too small */
720 1.14 chopps dev->sc_ds.chain[nchain].datalen = 0;
721 1.1 mw }
722 1.1 mw #ifdef DEBUG
723 1.1 mw if (nchain != 1 && len != 0 && siop_debug & 3) {
724 1.1 mw printf ("DMA chaining set: %d\n", nchain);
725 1.1 mw for (i = 0; i < nchain; ++i) {
726 1.1 mw printf (" [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf,
727 1.1 mw dev->sc_ds.chain[i].datalen);
728 1.1 mw }
729 1.1 mw }
730 1.1 mw #endif
731 1.1 mw
732 1.1 mw regs->siop_sbcl = dev->sc_sync[target].offset;
733 1.1 mw if (dev->sc_ds.sdtrolen)
734 1.1 mw regs->siop_scratch = regs->siop_scratch | 0x100;
735 1.1 mw else
736 1.1 mw regs->siop_scratch = regs->siop_scratch & ~0xff00;
737 1.12 chopps regs->siop_dsa = dev->sc_dspa;
738 1.14 chopps /* push data case on things the 53c710 needs to access */
739 1.12 chopps dma_cachectl (dev, sizeof (struct siop_softc));
740 1.12 chopps dma_cachectl (cbuf, clen);
741 1.12 chopps if (buf != NULL && len != 0)
742 1.12 chopps dma_cachectl (buf, len);
743 1.12 chopps regs->siop_dsp = dev->sc_scriptspa;
744 1.1 mw }
745 1.1 mw
746 1.1 mw /*
747 1.1 mw * Process a DMA or SCSI interrupt from the 53C710 SIOP
748 1.1 mw */
749 1.1 mw
750 1.8 chopps int
751 1.1 mw siop_checkintr(dev, istat, dstat, sstat0, status)
752 1.1 mw struct siop_softc *dev;
753 1.1 mw u_char istat;
754 1.1 mw u_char dstat;
755 1.1 mw u_char sstat0;
756 1.1 mw int *status;
757 1.1 mw {
758 1.8 chopps siop_regmap_p regs = dev->sc_siopp;
759 1.1 mw int target;
760 1.1 mw
761 1.1 mw regs->siop_ctest8 |= 0x04;
762 1.1 mw while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0)
763 1.1 mw ;
764 1.1 mw regs->siop_ctest8 &= ~0x04;
765 1.1 mw #ifdef DEBUG
766 1.1 mw if (siop_debug & 1) {
767 1.12 chopps DCIAS(dev->sc_statuspa); /* XXX */
768 1.1 mw printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
769 1.1 mw istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]);
770 1.1 mw }
771 1.1 mw #endif
772 1.1 mw if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 ||
773 1.1 mw regs->siop_dsps == 0xfffc)) {
774 1.1 mw /* Normal completion status, or check condition */
775 1.12 chopps if (regs->siop_dsa != dev->sc_dspa) {
776 1.1 mw printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa,
777 1.12 chopps dev->sc_dspa);
778 1.1 mw panic("*** siop DSA invalid ***");
779 1.1 mw }
780 1.1 mw target = dev->sc_slave;
781 1.1 mw if (dev->sc_sync[target].state == SYNC_SENT) {
782 1.1 mw #ifdef DEBUG
783 1.1 mw if (siopsync_debug)
784 1.1 mw printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n",
785 1.1 mw dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3],
786 1.1 mw dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]);
787 1.1 mw #endif
788 1.14 chopps if (dev->sc_msg[0] == MSG_REJECT)
789 1.14 chopps printf ("target %d sync request was rejected\n",
790 1.14 chopps target);
791 1.1 mw dev->sc_sync[target].state = SYNC_DONE;
792 1.1 mw dev->sc_sync[target].period = 0;
793 1.1 mw dev->sc_sync[target].offset = 0;
794 1.1 mw if (dev->sc_msg[1] == MSG_EXT_MESSAGE &&
795 1.1 mw dev->sc_msg[2] == 3 &&
796 1.8 chopps dev->sc_msg[3] == MSG_SYNC_REQ &&
797 1.8 chopps dev->sc_msg[5] != 0) {
798 1.8 chopps if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) {
799 1.8 chopps #ifdef DEBUG
800 1.8 chopps printf ("%d: target %d wanted %dns period\n",
801 1.8 chopps dev->sc_dev.dv_xname, target,
802 1.8 chopps dev->sc_msg[4] * 4);
803 1.8 chopps #endif
804 1.8 chopps /*
805 1.8 chopps * Kludge for Maxtor XT8580S
806 1.8 chopps * It accepts whatever we request, even
807 1.8 chopps * though it won't work. So we ask for
808 1.8 chopps * a short period than we can handle. If
809 1.8 chopps * the device says it can do it, use 208ns.
810 1.8 chopps * If the device says it can do less than
811 1.8 chopps * 100ns, then we limit it to 100ns.
812 1.8 chopps */
813 1.8 chopps if (dev->sc_msg[4] == siop_sync_period / 4)
814 1.8 chopps dev->sc_msg[4] = 208 / 4;
815 1.8 chopps else
816 1.8 chopps dev->sc_msg[4] = 100 / 4;
817 1.8 chopps }
818 1.8 chopps printf ("%s: target %d now synchronous, period=%dns, offset=%d\n",
819 1.8 chopps dev->sc_dev.dv_xname, target,
820 1.1 mw dev->sc_msg[4] * 4, dev->sc_msg[5]);
821 1.1 mw scsi_period_to_siop (dev, target);
822 1.1 mw }
823 1.1 mw }
824 1.12 chopps #if 0
825 1.14 chopps DCIAS(dev->sc_statuspa); /* XXX */
826 1.12 chopps #else
827 1.13 chopps dma_cachectl(&dev->sc_stat[0], 1);
828 1.11 chopps #endif
829 1.1 mw *status = dev->sc_stat[0];
830 1.1 mw return 1;
831 1.1 mw }
832 1.1 mw if (sstat0 & SIOP_SSTAT0_M_A) { /* Phase mismatch */
833 1.1 mw #ifdef DEBUG
834 1.1 mw if (siop_debug & 9)
835 1.1 mw printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl,
836 1.12 chopps regs->siop_dsp - dev->sc_scriptspa);
837 1.8 chopps if (siop_debug & 0x10)
838 1.8 chopps panic ("53c710 phase mismatch");
839 1.1 mw #endif
840 1.1 mw if ((regs->siop_sbcl & SIOP_REQ) == 0)
841 1.1 mw printf ("Phase mismatch: REQ not asserted! %02x\n",
842 1.1 mw regs->siop_sbcl);
843 1.1 mw switch (regs->siop_sbcl & 7) {
844 1.1 mw /*
845 1.1 mw * For data out and data in phase, check for DMA chaining
846 1.1 mw */
847 1.1 mw
848 1.1 mw /*
849 1.1 mw * for message in, check for possible reject for sync request
850 1.1 mw */
851 1.1 mw case 0:
852 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_dataout;
853 1.1 mw break;
854 1.1 mw case 1:
855 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_datain;
856 1.1 mw break;
857 1.1 mw case 2:
858 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_cmd;
859 1.1 mw break;
860 1.1 mw case 3:
861 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_status;
862 1.1 mw break;
863 1.1 mw case 6:
864 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_msgout;
865 1.1 mw break;
866 1.1 mw case 7:
867 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_msgin;
868 1.1 mw break;
869 1.1 mw default:
870 1.1 mw goto bad_phase;
871 1.1 mw }
872 1.1 mw return 0;
873 1.1 mw }
874 1.1 mw if (sstat0 & SIOP_SSTAT0_STO) { /* Select timed out */
875 1.1 mw *status = -1;
876 1.1 mw return 1;
877 1.1 mw }
878 1.1 mw if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 &&
879 1.1 mw (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) {
880 1.1 mw printf ("DMA chaining failed\n");
881 1.8 chopps siopreset (dev);
882 1.1 mw *status = -1;
883 1.1 mw return 1;
884 1.1 mw }
885 1.1 mw if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) {
886 1.1 mw #ifdef DEBUG
887 1.1 mw if (siop_debug & 3)
888 1.1 mw printf ("DMA chaining completed: dsa %x dnad %x addr %x\n",
889 1.1 mw regs->siop_dsa, regs->siop_dnad, regs->siop_addr);
890 1.14 chopps ++siopchain_ints;
891 1.1 mw #endif
892 1.12 chopps regs->siop_dsa = dev->sc_dspa;
893 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_status;
894 1.1 mw return 0;
895 1.1 mw }
896 1.1 mw target = dev->sc_slave;
897 1.1 mw if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 &&
898 1.1 mw dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) {
899 1.1 mw dev->sc_sync[target].state = SYNC_DONE;
900 1.1 mw dev->sc_sync[target].period = 0;
901 1.1 mw dev->sc_sync[target].offset = 0;
902 1.1 mw dev->sc_ds.sdtrolen = 0;
903 1.1 mw dev->sc_ds.sdtrilen = 0;
904 1.1 mw #ifdef DEBUG
905 1.1 mw if (siopsync_debug || 1)
906 1.1 mw printf ("target %d rejected sync, going asynchronous\n", target);
907 1.1 mw #endif
908 1.8 chopps siop_inhibit_sync[target] = -1;
909 1.1 mw if ((regs->siop_sbcl & 7) == 6) {
910 1.12 chopps regs->siop_dsp = dev->sc_scriptspa + Ent_msgout;
911 1.1 mw return (0);
912 1.1 mw }
913 1.14 chopps regs->siop_dcntl |= SIOP_DCNTL_STD;
914 1.14 chopps return (0);
915 1.1 mw }
916 1.8 chopps if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) ||
917 1.8 chopps sstat0 & SIOP_SSTAT0_UDC) {
918 1.8 chopps #ifdef DEBUG
919 1.8 chopps printf ("%s: target %d disconnected unexpectedly\n",
920 1.8 chopps dev->sc_dev.dv_xname, target);
921 1.8 chopps #endif
922 1.8 chopps #if 0
923 1.8 chopps siopabort (dev, regs, "siopchkintr");
924 1.8 chopps #endif
925 1.8 chopps *status = STS_BUSY;
926 1.8 chopps return 1;
927 1.8 chopps }
928 1.8 chopps if (dstat & SIOP_DSTAT_SIR &®s->siop_dsps == 0xfffb) {
929 1.8 chopps #if 0
930 1.8 chopps printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target);
931 1.8 chopps #endif
932 1.8 chopps #if 0
933 1.8 chopps siopabort (dev, regs, "siopchkintr");
934 1.8 chopps #endif
935 1.8 chopps *status = STS_BUSY;
936 1.8 chopps return 1;
937 1.8 chopps }
938 1.1 mw if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) {
939 1.12 chopps #if 0
940 1.12 chopps DCIAS(dev->sc_statuspa);
941 1.12 chopps #else
942 1.12 chopps dma_cachectl (&dev->sc_stat[0], 1);
943 1.12 chopps #endif
944 1.1 mw printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n",
945 1.1 mw regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0],
946 1.1 mw regs->siop_sbcl);
947 1.8 chopps siopreset (dev);
948 1.1 mw *status = -1;
949 1.1 mw return 1;
950 1.1 mw }
951 1.1 mw bad_phase:
952 1.1 mw /*
953 1.1 mw * temporary panic for unhandled conditions
954 1.1 mw * displays various things about the 53C710 status and registers
955 1.14 chopps * then panics.
956 1.14 chopps * XXXX need to clean this up to print out the info, reset, and continue
957 1.1 mw */
958 1.1 mw printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds);
959 1.12 chopps printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", dev->sc_scriptspa,
960 1.12 chopps dev->sc_dspa, kvtop(regs), regs->siop_dsp, *((long *)®s->siop_dcmd));
961 1.1 mw printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n",
962 1.1 mw istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, regs->siop_sbcl,
963 1.1 mw dev->sc_stat[0], dev->sc_msg[0]);
964 1.1 mw panic("siopchkintr: **** temp ****");
965 1.1 mw }
966 1.1 mw
967 1.1 mw /*
968 1.1 mw * SCSI 'immediate' command: issue a command to some SCSI device
969 1.1 mw * and get back an 'immediate' response (i.e., do programmed xfer
970 1.1 mw * to get the response data). 'cbuf' is a buffer containing a scsi
971 1.1 mw * command of length clen bytes. 'buf' is a buffer of length 'len'
972 1.1 mw * bytes for data. The transfer direction is determined by the device
973 1.1 mw * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the
974 1.1 mw * command must supply no data. 'xferphase' is the bus phase the
975 1.1 mw * caller expects to happen after the command is issued. It should
976 1.1 mw * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE.
977 1.1 mw *
978 1.1 mw * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a
979 1.1 mw * lot easier to do than to use programmed I/O).
980 1.1 mw *
981 1.1 mw */
982 1.8 chopps int
983 1.1 mw siopicmd(dev, target, cbuf, clen, buf, len)
984 1.1 mw struct siop_softc *dev;
985 1.1 mw int target;
986 1.8 chopps void *cbuf;
987 1.1 mw int clen;
988 1.8 chopps void *buf;
989 1.1 mw int len;
990 1.1 mw {
991 1.8 chopps siop_regmap_p regs = dev->sc_siopp;
992 1.1 mw int i;
993 1.1 mw int status;
994 1.1 mw u_char istat;
995 1.1 mw u_char dstat;
996 1.1 mw u_char sstat0;
997 1.1 mw
998 1.1 mw if (dev->sc_flags & SIOP_SELECTED) {
999 1.1 mw printf ("siopicmd%d: bus busy\n", target);
1000 1.1 mw return -1;
1001 1.1 mw }
1002 1.1 mw regs->siop_sien = 0x00; /* disable SCSI and DMA interrupts */
1003 1.1 mw regs->siop_dien = 0x00;
1004 1.1 mw dev->sc_flags |= SIOP_SELECTED;
1005 1.1 mw dev->sc_slave = target;
1006 1.1 mw #ifdef DEBUG
1007 1.1 mw if (siop_debug & 1)
1008 1.1 mw printf ("siopicmd: target %x cmd %02x ds %x\n", target,
1009 1.8 chopps *((char *)cbuf), &dev->sc_ds);
1010 1.1 mw #endif
1011 1.1 mw siop_setup (dev, target, cbuf, clen, buf, len);
1012 1.1 mw
1013 1.1 mw for (;;) {
1014 1.1 mw /* use cmd_wait values? */
1015 1.1 mw i = siop_cmd_wait << 1;
1016 1.1 mw while (((istat = regs->siop_istat) &
1017 1.1 mw (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) {
1018 1.1 mw if (--i <= 0) {
1019 1.1 mw printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n",
1020 1.8 chopps target, *((char *)cbuf),
1021 1.14 chopps regs->siop_sbcl, regs->siop_dsp,
1022 1.12 chopps regs->siop_dsp - dev->sc_scriptspa,
1023 1.1 mw *((long *)®s->siop_dcmd), &dev->sc_ds);
1024 1.1 mw i = siop_cmd_wait << 2;
1025 1.8 chopps /* XXXX need an upper limit and reset */
1026 1.1 mw }
1027 1.11 chopps delay(1);
1028 1.1 mw }
1029 1.1 mw dstat = regs->siop_dstat;
1030 1.1 mw sstat0 = regs->siop_sstat0;
1031 1.1 mw #ifdef DEBUG
1032 1.1 mw if (siop_debug & 1) {
1033 1.12 chopps DCIAS(dev->sc_statuspa); /* XXX should just invalidate dev->sc_stat */
1034 1.1 mw printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
1035 1.1 mw istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl,
1036 1.1 mw dev->sc_stat[0], dev->sc_msg[0]);
1037 1.1 mw }
1038 1.1 mw #endif
1039 1.1 mw if (siop_checkintr(dev, istat, dstat, sstat0, &status)) {
1040 1.1 mw dev->sc_flags &= ~SIOP_SELECTED;
1041 1.1 mw return (status);
1042 1.1 mw }
1043 1.1 mw }
1044 1.1 mw }
1045 1.1 mw
1046 1.1 mw int
1047 1.8 chopps siopgo(dev, xs)
1048 1.8 chopps struct siop_softc *dev;
1049 1.8 chopps struct scsi_xfer *xs;
1050 1.1 mw {
1051 1.8 chopps siop_regmap_p regs;
1052 1.1 mw int i;
1053 1.1 mw int nchain;
1054 1.1 mw int count, tcount;
1055 1.1 mw char *addr, *dmaend;
1056 1.1 mw
1057 1.1 mw #ifdef DEBUG
1058 1.1 mw if (siop_debug & 1)
1059 1.8 chopps printf ("%s: go ", dev->sc_dev.dv_xname);
1060 1.8 chopps #if 0
1061 1.1 mw if ((cdb->cdb[1] & 1) == 0 &&
1062 1.1 mw ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) ||
1063 1.1 mw (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0
1064 1.1 mw && cdb->cdb[4] == 0)))
1065 1.1 mw panic ("siopgo: attempted write to block < 0x100");
1066 1.1 mw #endif
1067 1.8 chopps #endif
1068 1.8 chopps #if 0
1069 1.1 mw cdb->cdb[1] |= unit << 5;
1070 1.8 chopps #endif
1071 1.1 mw
1072 1.1 mw if (dev->sc_flags & SIOP_SELECTED) {
1073 1.8 chopps printf ("%s: bus busy\n", dev->sc_dev.dv_xname);
1074 1.1 mw return 1;
1075 1.1 mw }
1076 1.1 mw
1077 1.1 mw dev->sc_flags |= SIOP_SELECTED | SIOP_DMA;
1078 1.8 chopps dev->sc_slave = xs->sc_link->target;
1079 1.8 chopps regs = dev->sc_siopp;
1080 1.1 mw /* enable SCSI and DMA interrupts */
1081 1.1 mw regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE |
1082 1.1 mw SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR;
1083 1.1 mw regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD |
1084 1.1 mw SIOP_DIEN_OPC;
1085 1.1 mw #ifdef DEBUG
1086 1.1 mw if (siop_debug & 1)
1087 1.10 chopps printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd->opcode, &dev->sc_ds);
1088 1.1 mw #endif
1089 1.1 mw
1090 1.8 chopps siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen);
1091 1.1 mw
1092 1.1 mw return (0);
1093 1.1 mw }
1094 1.1 mw
1095 1.1 mw /*
1096 1.8 chopps * Check for 53C710 interrupts
1097 1.1 mw */
1098 1.1 mw
1099 1.1 mw int
1100 1.8 chopps siopintr (dev)
1101 1.1 mw register struct siop_softc *dev;
1102 1.1 mw {
1103 1.8 chopps siop_regmap_p regs;
1104 1.1 mw register u_char istat, dstat, sstat0;
1105 1.1 mw int unit;
1106 1.1 mw int status;
1107 1.1 mw int found = 0;
1108 1.1 mw
1109 1.8 chopps regs = dev->sc_siopp;
1110 1.8 chopps istat = dev->sc_istat;
1111 1.8 chopps if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
1112 1.8 chopps return;
1113 1.8 chopps if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED)
1114 1.8 chopps return; /* doing non-interrupt I/O */
1115 1.1 mw /* Got a valid interrupt on this device */
1116 1.8 chopps dstat = dev->sc_dstat;
1117 1.8 chopps sstat0 = dev->sc_sstat0;
1118 1.8 chopps dev->sc_istat = 0;
1119 1.1 mw #ifdef DEBUG
1120 1.8 chopps if (siop_debug & 1)
1121 1.8 chopps printf ("%s: intr istat %x dstat %x sstat0 %x\n",
1122 1.8 chopps dev->sc_dev.dv_xname, istat, dstat, sstat0);
1123 1.8 chopps if ((dev->sc_flags & SIOP_DMA) == 0) {
1124 1.8 chopps printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n",
1125 1.8 chopps dev->sc_dev.dv_xname, istat, dstat, sstat0);
1126 1.8 chopps }
1127 1.1 mw #endif
1128 1.1 mw
1129 1.1 mw #ifdef DEBUG
1130 1.8 chopps if (siop_debug & 5) {
1131 1.12 chopps DCIAS(dev->sc_statuspa);
1132 1.8 chopps printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
1133 1.8 chopps unit, istat, dstat, sstat0, regs->siop_dsps,
1134 1.8 chopps regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]);
1135 1.8 chopps }
1136 1.1 mw #endif
1137 1.8 chopps if (siop_checkintr (dev, istat, dstat, sstat0, &status)) {
1138 1.1 mw #if 1
1139 1.8 chopps regs->siop_sien = 0;
1140 1.8 chopps regs->siop_dien = 0;
1141 1.8 chopps if (status == 0xff)
1142 1.8 chopps printf ("siopintr: status == 0xff\n");
1143 1.8 chopps #endif
1144 1.8 chopps dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED);
1145 1.8 chopps siop_scsidone(dev, dev->sc_stat[0]);
1146 1.1 mw }
1147 1.1 mw }
1148 1.1 mw
1149 1.8 chopps scsi_period_to_siop (dev, target)
1150 1.8 chopps struct siop_softc *dev;
1151 1.1 mw {
1152 1.8 chopps int period, offset, i, sxfer;
1153 1.1 mw
1154 1.8 chopps period = dev->sc_msg[4];
1155 1.8 chopps offset = dev->sc_msg[5];
1156 1.8 chopps sxfer = 0;
1157 1.8 chopps if (offset <= SIOP_MAX_OFFSET)
1158 1.8 chopps sxfer = offset;
1159 1.8 chopps for (i = 0; i < sizeof (xxx) / 2; ++i) {
1160 1.8 chopps if (period <= xxx[i].x) {
1161 1.8 chopps sxfer |= xxx[i].y & 0x70;
1162 1.8 chopps offset = xxx[i].y & 0x03;
1163 1.8 chopps break;
1164 1.8 chopps }
1165 1.8 chopps }
1166 1.8 chopps dev->sc_sync[target].period = sxfer;
1167 1.8 chopps dev->sc_sync[target].offset = offset;
1168 1.1 mw #ifdef DEBUG
1169 1.8 chopps printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset);
1170 1.1 mw #endif
1171 1.1 mw }
1172