siop.c revision 1.15
1 /* 2 * Copyright (c) 1994 Michael L. Hitch 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Van Jacobson of Lawrence Berkeley Laboratory. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)siop.c 7.5 (Berkeley) 5/4/91 38 * $Id: siop.c,v 1.15 1994/06/27 04:56:29 chopps Exp $ 39 */ 40 41 /* 42 * AMIGA 53C710 scsi adaptor driver 43 */ 44 45 /* need to know if any tapes have been configured */ 46 #include "st.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/buf.h> 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 #include <machine/cpu.h> 55 #include <amiga/amiga/custom.h> 56 #include <amiga/dev/siopreg.h> 57 #include <amiga/dev/siopvar.h> 58 59 extern u_int kvtop(); 60 61 /* 62 * SCSI delays 63 * In u-seconds, primarily for state changes on the SPC. 64 */ 65 #define SCSI_CMD_WAIT 500000 /* wait per step of 'immediate' cmds */ 66 #define SCSI_DATA_WAIT 500000 /* wait per data in/out step */ 67 #define SCSI_INIT_WAIT 500000 /* wait per step (both) during init */ 68 69 int siopicmd __P((struct siop_softc *, int, void *, int, void *, int)); 70 int siopgo __P((struct siop_softc *, struct scsi_xfer *)); 71 int siopgetsense __P((struct siop_softc *, struct scsi_xfer *)); 72 void siopabort __P((struct siop_softc *, siop_regmap_p, char *)); 73 void sioperror __P((struct siop_softc *, siop_regmap_p, u_char)); 74 void siopstart __P((struct siop_softc *)); 75 void siopreset __P((struct siop_softc *)); 76 void siopsetdelay __P((int)); 77 void siop_scsidone __P((struct siop_softc *, int)); 78 void siop_donextcmd __P((struct siop_softc *)); 79 int siopintr __P((struct siop_softc *)); 80 81 /* 53C710 script */ 82 unsigned long scripts[] = { 83 0x47000000, 0x000002d0, /* 000 - 0 */ 84 0x838b0000, 0x000000d0, /* 008 - 8 */ 85 0x7a1b1000, 0x00000000, /* 010 - 16 */ 86 0x828a0000, 0x00000088, /* 018 - 24 */ 87 0x9e020000, 0x0000ff01, /* 020 - 32 */ 88 0x72350000, 0x00000000, /* 028 - 40 */ 89 0x808c0000, 0x00000048, /* 030 - 48 */ 90 0x58000008, 0x00000000, /* 038 - 56 */ 91 0x1e000024, 0x00000024, /* 040 - 64 */ 92 0x838b0000, 0x00000090, /* 048 - 72 */ 93 0x1f00002c, 0x0000002c, /* 050 - 80 */ 94 0x838b0000, 0x00000080, /* 058 - 88 */ 95 0x868a0000, 0xffffffd0, /* 060 - 96 */ 96 0x838a0000, 0x00000070, /* 068 - 104 */ 97 0x878a0000, 0x00000158, /* 070 - 112 */ 98 0x80880000, 0x00000028, /* 078 - 120 */ 99 0x1e000004, 0x00000004, /* 080 - 128 */ 100 0x838b0000, 0x00000050, /* 088 - 136 */ 101 0x868a0000, 0xffffffe8, /* 090 - 144 */ 102 0x838a0000, 0x00000040, /* 098 - 152 */ 103 0x878a0000, 0x00000128, /* 0a0 - 160 */ 104 0x9a020000, 0x0000ff02, /* 0a8 - 168 */ 105 0x1a00000c, 0x0000000c, /* 0b0 - 176 */ 106 0x878b0000, 0x00000168, /* 0b8 - 184 */ 107 0x838a0000, 0x00000018, /* 0c0 - 192 */ 108 0x818a0000, 0x000000e8, /* 0c8 - 200 */ 109 0x808a0000, 0x000000b8, /* 0d0 - 208 */ 110 0x98080000, 0x0000ff03, /* 0d8 - 216 */ 111 0x1b000014, 0x00000014, /* 0e0 - 224 */ 112 0x72090000, 0x00000000, /* 0e8 - 232 */ 113 0x6a340000, 0x00000000, /* 0f0 - 240 */ 114 0x9f030000, 0x0000ff04, /* 0f8 - 248 */ 115 0x1f00001c, 0x0000001c, /* 100 - 256 */ 116 0x808c0007, 0x00000050, /* 108 - 264 */ 117 0x98040000, 0x0000ff26, /* 110 - 272 */ 118 0x60000040, 0x00000000, /* 118 - 280 */ 119 0x48000000, 0x00000000, /* 120 - 288 */ 120 0x7c1bef00, 0x00000000, /* 128 - 296 */ 121 0x72340000, 0x00000000, /* 130 - 304 */ 122 0x980c0002, 0x0000fffc, /* 138 - 312 */ 123 0x980c0008, 0x0000fffb, /* 140 - 320 */ 124 0x980c0018, 0x0000fffd, /* 148 - 328 */ 125 0x98040000, 0x0000fffe, /* 150 - 336 */ 126 0x98080000, 0x0000ff00, /* 158 - 344 */ 127 0x60000008, 0x00000000, /* 160 - 352 */ 128 0x98080000, 0x0000ff26, /* 168 - 360 */ 129 0x60000040, 0x00000000, /* 170 - 368 */ 130 0x828b0000, 0xffffff28, /* 178 - 376 */ 131 0x838b0000, 0xffffff58, /* 180 - 384 */ 132 0x878b0000, 0xffffff68, /* 188 - 392 */ 133 0x18000034, 0x00000034, /* 190 - 400 */ 134 0x808b0000, 0x000001c0, /* 198 - 408 */ 135 0x838b0000, 0xffffff38, /* 1a0 - 416 */ 136 0x878a0000, 0x000000d0, /* 1a8 - 424 */ 137 0x98080000, 0x0000ff05, /* 1b0 - 432 */ 138 0x19000034, 0x00000034, /* 1b8 - 440 */ 139 0x818b0000, 0x00000160, /* 1c0 - 448 */ 140 0x80880000, 0xffffffd0, /* 1c8 - 456 */ 141 0x1f00001c, 0x0000001c, /* 1d0 - 464 */ 142 0x808c0001, 0x00000018, /* 1d8 - 472 */ 143 0x980c0002, 0x0000ff08, /* 1e0 - 480 */ 144 0x808c0004, 0x00000020, /* 1e8 - 488 */ 145 0x98080000, 0x0000ff06, /* 1f0 - 496 */ 146 0x60000040, 0x00000000, /* 1f8 - 504 */ 147 0x1f00002c, 0x0000002c, /* 200 - 512 */ 148 0x98080000, 0x0000ff07, /* 208 - 520 */ 149 0x60000040, 0x00000000, /* 210 - 528 */ 150 0x48000000, 0x00000000, /* 218 - 536 */ 151 0x98080000, 0x0000ff09, /* 220 - 544 */ 152 0x1f00001c, 0x0000001c, /* 228 - 552 */ 153 0x808c0001, 0x00000018, /* 230 - 560 */ 154 0x980c0002, 0x0000ff10, /* 238 - 568 */ 155 0x808c0004, 0x00000020, /* 240 - 576 */ 156 0x98080000, 0x0000ff11, /* 248 - 584 */ 157 0x60000040, 0x00000000, /* 250 - 592 */ 158 0x1f00002c, 0x0000002c, /* 258 - 600 */ 159 0x98080000, 0x0000ff12, /* 260 - 608 */ 160 0x60000040, 0x00000000, /* 268 - 616 */ 161 0x48000000, 0x00000000, /* 270 - 624 */ 162 0x98080000, 0x0000ff13, /* 278 - 632 */ 163 0x1f00001c, 0x0000001c, /* 280 - 640 */ 164 0x808c0001, 0x00000018, /* 288 - 648 */ 165 0x980c0002, 0x0000ff14, /* 290 - 656 */ 166 0x808c0004, 0x00000020, /* 298 - 664 */ 167 0x98080000, 0x0000ff15, /* 2a0 - 672 */ 168 0x60000040, 0x00000000, /* 2a8 - 680 */ 169 0x1f00002c, 0x0000002c, /* 2b0 - 688 */ 170 0x98080000, 0x0000ff16, /* 2b8 - 696 */ 171 0x60000040, 0x00000000, /* 2c0 - 704 */ 172 0x48000000, 0x00000000, /* 2c8 - 712 */ 173 0x98080000, 0x0000ff17, /* 2d0 - 720 */ 174 0x54000000, 0x00000040, /* 2d8 - 728 */ 175 0x9f030000, 0x0000ff18, /* 2e0 - 736 */ 176 0x1f00001c, 0x0000001c, /* 2e8 - 744 */ 177 0x990b0000, 0x0000ff19, /* 2f0 - 752 */ 178 0x980a0000, 0x0000ff20, /* 2f8 - 760 */ 179 0x9f0a0000, 0x0000ff21, /* 300 - 768 */ 180 0x9b0a0000, 0x0000ff22, /* 308 - 776 */ 181 0x9e0a0000, 0x0000ff23, /* 310 - 784 */ 182 0x98080000, 0x0000ff24, /* 318 - 792 */ 183 0x98080000, 0x0000ff25, /* 320 - 800 */ 184 0x76100800, 0x00000000, /* 328 - 808 */ 185 0x80840700, 0x00000008, /* 330 - 816 */ 186 0x7e110100, 0x00000000, /* 338 - 824 */ 187 0x6a100000, 0x00000000, /* 340 - 832 */ 188 0x19000034, 0x00000034, /* 348 - 840 */ 189 0x818b0000, 0xffffffd0, /* 350 - 848 */ 190 0x98080000, 0x0000ff27, /* 358 - 856 */ 191 0x76100800, 0x00000000, /* 360 - 864 */ 192 0x80840700, 0x00000008, /* 368 - 872 */ 193 0x7e110100, 0x00000000, /* 370 - 880 */ 194 0x6a100000, 0x00000000, /* 378 - 888 */ 195 0x18000034, 0x00000034, /* 380 - 896 */ 196 0x808b0000, 0xffffffd0, /* 388 - 904 */ 197 0x98080000, 0x0000ff27 /* 390 - 912 */ 198 }; 199 200 #define Ent_msgout 0x00000018 201 #define Ent_cmd 0x000000a8 202 #define Ent_status 0x000000e0 203 #define Ent_msgin 0x000000f8 204 #define Ent_dataout 0x00000190 205 #define Ent_datain 0x000001b8 206 207 /* default to not inhibit sync negotiation on any drive */ 208 /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */ 209 u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0 }; /* initialize, so patchable */ 210 int siop_no_dma = 0; 211 212 int siop_reset_delay = 2000; /* delay after reset, in milleseconds */ 213 int siop_sync_period = 50; /* synchronous transfer period, in nanoseconds */ 214 215 int siop_cmd_wait = SCSI_CMD_WAIT; 216 int siop_data_wait = SCSI_DATA_WAIT; 217 int siop_init_wait = SCSI_INIT_WAIT; 218 219 static struct { 220 unsigned char x; /* period from sync request message */ 221 unsigned char y; /* siop_period << 4 | sbcl */ 222 } xxx[] = { 223 {0x0f, 0x01}, 224 {0x13, 0x11}, 225 {0x17, 0x21}, 226 /* {0x17, 0x02}, */ 227 {0x1b, 0x31}, 228 {0x1d, 0x12}, 229 {0x1e, 0x41}, 230 /* {0x1e, 0x03}, */ 231 {0x22, 0x51}, 232 {0x23, 0x22}, 233 {0x26, 0x61}, 234 /* {0x26, 0x13}, */ 235 {0x29, 0x32}, 236 {0x2a, 0x71}, 237 {0x2d, 0x23}, 238 {0x2e, 0x42}, 239 {0x34, 0x52}, 240 {0x35, 0x33}, 241 {0x3a, 0x62}, 242 {0x3c, 0x43}, 243 {0x40, 0x72}, 244 {0x44, 0x53}, 245 {0x4b, 0x63}, 246 {0x53, 0x73} 247 }; 248 249 #ifdef DEBUG 250 #define QPRINTF(a) if (siop_debug > 1) printf a 251 /* 252 * 0x01 - full debug 253 * 0x02 - DMA chaining 254 * 0x04 - siopintr 255 * 0x08 - phase mismatch 256 * 0x10 - panic on phase mismatch 257 * 0x20 - panic on unhandled exceptions 258 */ 259 int siop_debug = 0; 260 int siopsync_debug = 0; 261 int siopdma_hits = 0; 262 int siopdma_misses = 0; 263 int siopchain_ints = 0; 264 #endif 265 266 267 /* 268 * default minphys routine for siop based controllers 269 */ 270 void 271 siop_minphys(bp) 272 struct buf *bp; 273 { 274 /* 275 * no max transfer at this level 276 */ 277 } 278 279 /* 280 * must be used 281 */ 282 u_int 283 siop_adinfo() 284 { 285 /* 286 * one request at a time please 287 */ 288 return(1); 289 } 290 291 /* 292 * used by specific siop controller 293 * 294 * it appears that the higher level code does nothing with LUN's 295 * so I will too. I could plug it in, however so could they 296 * in scsi_scsi_cmd(). 297 */ 298 int 299 siop_scsicmd(xs) 300 struct scsi_xfer *xs; 301 { 302 struct siop_pending *pendp; 303 struct siop_softc *dev; 304 struct scsi_link *slp; 305 int flags, s; 306 307 slp = xs->sc_link; 308 dev = slp->adapter_softc; 309 flags = xs->flags; 310 311 if (flags & SCSI_DATA_UIO) 312 panic("siop: scsi data uio requested"); 313 314 if (dev->sc_xs && flags & SCSI_NOMASK) 315 panic("siop_scsicmd: busy"); 316 317 s = splbio(); 318 pendp = &dev->sc_xsstore[slp->target][slp->lun]; 319 if (pendp->xs) { 320 splx(s); 321 return(TRY_AGAIN_LATER); 322 } 323 324 if (dev->sc_xs) { 325 pendp->xs = xs; 326 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 327 splx(s); 328 return(SUCCESSFULLY_QUEUED); 329 } 330 pendp->xs = NULL; 331 dev->sc_xs = xs; 332 splx(s); 333 334 /* 335 * nothing is pending do it now. 336 */ 337 siop_donextcmd(dev); 338 339 if (flags & SCSI_NOMASK) 340 return(COMPLETE); 341 return(SUCCESSFULLY_QUEUED); 342 } 343 344 /* 345 * entered with dev->sc_xs pointing to the next xfer to perform 346 */ 347 void 348 siop_donextcmd(dev) 349 struct siop_softc *dev; 350 { 351 struct scsi_xfer *xs; 352 struct scsi_link *slp; 353 int flags, phase, stat; 354 355 xs = dev->sc_xs; 356 slp = xs->sc_link; 357 flags = xs->flags; 358 359 #if 0 360 if (flags & SCSI_DATA_IN) 361 phase = DATA_IN_PHASE; 362 else if (flags & SCSI_DATA_OUT) 363 phase = DATA_OUT_PHASE; 364 else 365 phase = STATUS_PHASE; 366 #endif 367 368 if (flags & SCSI_RESET) 369 siopreset(dev); 370 371 dev->sc_stat[0] = -1; 372 #if 0 373 if (phase == STATUS_PHASE || flags & SCSI_NOMASK) 374 #else 375 if (flags & SCSI_NOMASK || siop_no_dma) 376 #endif 377 stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen, 378 xs->data, xs->datalen/*, phase*/); 379 else if (siopgo(dev, xs) == 0) 380 return; 381 else 382 stat = dev->sc_stat[0]; 383 384 siop_scsidone(dev, stat); 385 } 386 387 void 388 siop_scsidone(dev, stat) 389 struct siop_softc *dev; 390 int stat; 391 { 392 struct siop_pending *pendp; 393 struct scsi_xfer *xs; 394 int s, donext; 395 396 xs = dev->sc_xs; 397 #ifdef DIAGNOSTIC 398 if (xs == NULL) 399 panic("siop_scsidone"); 400 #endif 401 /* 402 * is this right? 403 */ 404 xs->status = stat; 405 406 if (stat == 0 || xs->flags & SCSI_ERR_OK) 407 xs->resid = 0; 408 else { 409 switch(stat) { 410 case SCSI_CHECK: 411 if (stat = siopgetsense(dev, xs)) 412 goto bad_sense; 413 xs->error = XS_SENSE; 414 break; 415 case SCSI_BUSY: 416 xs->error = XS_BUSY; 417 break; 418 bad_sense: 419 default: 420 xs->error = XS_DRIVER_STUFFUP; 421 QPRINTF(("siop_scsicmd() bad %x\n", stat)); 422 break; 423 } 424 } 425 xs->flags |= ITSDONE; 426 427 /* 428 * grab next command before scsi_done() 429 * this way no single device can hog scsi resources. 430 */ 431 s = splbio(); 432 pendp = dev->sc_xslist.tqh_first; 433 if (pendp == NULL) { 434 donext = 0; 435 dev->sc_xs = NULL; 436 } else { 437 donext = 1; 438 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 439 dev->sc_xs = pendp->xs; 440 pendp->xs = NULL; 441 } 442 splx(s); 443 scsi_done(xs); 444 445 if (donext) 446 siop_donextcmd(dev); 447 } 448 449 int 450 siopgetsense(dev, xs) 451 struct siop_softc *dev; 452 struct scsi_xfer *xs; 453 { 454 struct scsi_sense rqs; 455 struct scsi_link *slp; 456 int stat; 457 458 slp = xs->sc_link; 459 460 rqs.op_code = REQUEST_SENSE; 461 rqs.byte2 = slp->lun << 5; 462 #ifdef not_yet 463 rqs.length = xs->req_sense_length ? xs->req_sense_length : 464 sizeof(xs->sense); 465 #else 466 rqs.length = sizeof(xs->sense); 467 #endif 468 if (rqs.length > sizeof (xs->sense)) 469 rqs.length = sizeof (xs->sense); 470 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 471 472 return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense, 473 rqs.length)); 474 } 475 476 void 477 siopabort(dev, regs, where) 478 register struct siop_softc *dev; 479 siop_regmap_p regs; 480 char *where; 481 { 482 483 printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n", 484 dev->sc_dev.dv_xname, 485 where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl); 486 487 if (dev->sc_flags & SIOP_SELECTED) { 488 #ifdef TODO 489 SET_SBIC_cmd (regs, SBIC_CMD_ABORT); 490 WAIT_CIP (regs); 491 492 GET_SBIC_asr (regs, asr); 493 if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) 494 { 495 /* ok, get more drastic.. */ 496 497 SET_SBIC_cmd (regs, SBIC_CMD_RESET); 498 delay(25); 499 SBIC_WAIT(regs, SBIC_ASR_INT, 0); 500 GET_SBIC_csr (regs, csr); /* clears interrupt also */ 501 502 dev->sc_flags &= ~SIOP_SELECTED; 503 return; 504 } 505 506 do 507 { 508 SBIC_WAIT (regs, SBIC_ASR_INT, 0); 509 GET_SBIC_csr (regs, csr); 510 } 511 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) 512 && (csr != SBIC_CSR_CMD_INVALID)); 513 #endif 514 515 /* lets just hope it worked.. */ 516 dev->sc_flags &= ~SIOP_SELECTED; 517 } 518 } 519 520 /* 521 * XXX Set/reset long delays. 522 * 523 * if delay == 0, reset default delays 524 * if delay < 0, set both delays to default long initialization values 525 * if delay > 0, set both delays to this value 526 * 527 * Used when a devices is expected to respond slowly (e.g. during 528 * initialization). 529 */ 530 void 531 siop_delay(delay) 532 int delay; 533 { 534 static int saved_cmd_wait, saved_data_wait; 535 536 if (delay) { 537 saved_cmd_wait = siop_cmd_wait; 538 saved_data_wait = siop_data_wait; 539 if (delay > 0) 540 siop_cmd_wait = siop_data_wait = delay; 541 else 542 siop_cmd_wait = siop_data_wait = siop_init_wait; 543 } else { 544 siop_cmd_wait = saved_cmd_wait; 545 siop_data_wait = saved_data_wait; 546 } 547 } 548 549 void 550 siopinitialize(dev) 551 struct siop_softc *dev; 552 { 553 /* 554 * Need to check that scripts is on a long word boundary 555 * and that DS is on a long word boundary. 556 * Also need to verify that dev doesn't non-contiguous 557 * physical pages. 558 */ 559 dev->sc_scriptspa = kvtop(scripts); 560 dev->sc_dspa = kvtop(&dev->sc_ds); 561 dev->sc_lunpa = kvtop(&dev->sc_lun); 562 dev->sc_statuspa = kvtop(&dev->sc_stat[0]); 563 dev->sc_msgpa = kvtop(&dev->sc_msg[0]); 564 siopreset (dev); 565 } 566 567 void 568 siopreset(dev) 569 struct siop_softc *dev; 570 { 571 siop_regmap_p regs; 572 u_int i, s; 573 u_char my_id, csr; 574 575 regs = dev->sc_siopp; 576 577 if (dev->sc_flags & SIOP_ALIVE) 578 siopabort(dev, regs, "reset"); 579 580 printf("%s: ", dev->sc_dev.dv_xname); /* XXXX */ 581 582 s = splbio(); 583 my_id = 7; 584 585 /* 586 * Reset the chip 587 * XXX - is this really needed? 588 */ 589 regs->siop_sien &= ~SIOP_SIEN_RST; 590 regs->siop_scntl1 |= SIOP_SCNTL1_RST; 591 for (i = 0; i < 1000; ++i) 592 ; 593 regs->siop_scntl1 &= ~SIOP_SCNTL1_RST; 594 regs->siop_sien |= SIOP_SIEN_RST; 595 596 /* 597 * Set up various chip parameters 598 */ 599 regs->siop_istat = 0x40; 600 for (i = 0; i < 1000; ++i) 601 ; 602 regs->siop_istat = 0x00; 603 regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG; 604 regs->siop_dcntl = dev->sc_clock_freq & 0xff; 605 regs->siop_dmode = 0x80; /* burst length = 4 */ 606 regs->siop_sien = 0x00; /* don't enable interrupts yet */ 607 regs->siop_dien = 0x00; /* don't enable interrupts yet */ 608 regs->siop_scid = 1 << my_id; 609 regs->siop_dwt = 0x00; 610 regs->siop_ctest0 |= 0x20; /* Enable Active Negation ?? */ 611 regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff; 612 613 /* will need to re-negotiate sync xfers */ 614 bzero(&dev->sc_sync, sizeof (dev->sc_sync)); 615 616 splx (s); 617 618 delay (siop_reset_delay * 1000); 619 printf("siop id %d reset\n", my_id); 620 dev->sc_flags |= SIOP_ALIVE; 621 dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA); 622 } 623 624 /* 625 * Setup Data Storage for 53C710 and start SCRIPTS processing 626 */ 627 628 void 629 siop_setup (dev, target, cbuf, clen, buf, len) 630 struct siop_softc *dev; 631 int target; 632 u_char *cbuf; 633 int clen; 634 u_char *buf; 635 int len; 636 { 637 siop_regmap_p regs = dev->sc_siopp; 638 int i; 639 int nchain; 640 int count, tcount; 641 char *addr, *dmaend; 642 643 dev->sc_istat = 0; 644 dev->sc_lun = 0x80; /* XXX */ 645 dev->sc_stat[0] = -1; 646 dev->sc_msg[0] = -1; 647 dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8); 648 dev->sc_ds.idlen = 1; 649 dev->sc_ds.idbuf = (char *) dev->sc_lunpa; 650 dev->sc_ds.cmdlen = clen; 651 dev->sc_ds.cmdbuf = (char *) kvtop(cbuf); 652 dev->sc_ds.stslen = 1; 653 dev->sc_ds.stsbuf = (char *) dev->sc_statuspa; 654 dev->sc_ds.msglen = 1; 655 dev->sc_ds.msgbuf = (char *) dev->sc_msgpa; 656 dev->sc_ds.sdtrolen = 0; 657 dev->sc_ds.sdtrilen = 0; 658 bzero(&dev->sc_ds.chain, sizeof (dev->sc_ds.chain)); 659 660 if (dev->sc_sync[target].state == SYNC_START) { 661 if (siop_inhibit_sync[target]) { 662 dev->sc_sync[target].state = SYNC_DONE; 663 dev->sc_sync[target].offset = 0; 664 dev->sc_sync[target].period = 0; 665 #ifdef DEBUG 666 if (siopsync_debug) 667 printf ("Forcing target %d asynchronous\n", target); 668 #endif 669 } 670 else { 671 dev->sc_msg[1] = MSG_IDENTIFY; 672 dev->sc_msg[2] = MSG_EXT_MESSAGE; 673 dev->sc_msg[3] = 3; 674 dev->sc_msg[4] = MSG_SYNC_REQ; 675 dev->sc_msg[5] = siop_sync_period / 4; 676 dev->sc_msg[6] = SIOP_MAX_OFFSET; 677 dev->sc_ds.sdtrolen = 6; 678 dev->sc_ds.sdtrilen = 6; 679 dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) (dev->sc_msgpa + 1); 680 dev->sc_sync[target].state = SYNC_SENT; 681 #ifdef DEBUG 682 if (siopsync_debug) 683 printf ("Sending sync request to target %d\n", target); 684 #endif 685 } 686 } 687 688 /* 689 * If length is > 1 page, check for consecutive physical pages 690 * Need to set up chaining if not 691 */ 692 nchain = 0; 693 count = len; 694 addr = buf; 695 dmaend = NULL; 696 while (count > 0) { 697 dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr); 698 if (count < (tcount = NBPG - ((int) addr & PGOFSET))) 699 tcount = count; 700 dev->sc_ds.chain[nchain].datalen = tcount; 701 addr += tcount; 702 count -= tcount; 703 if (dev->sc_ds.chain[nchain].databuf == dmaend) { 704 dmaend += dev->sc_ds.chain[nchain].datalen; 705 dev->sc_ds.chain[--nchain].datalen += tcount; 706 #ifdef DEBUG 707 ++siopdma_hits; 708 #endif 709 } 710 else { 711 dmaend = dev->sc_ds.chain[nchain].databuf + 712 dev->sc_ds.chain[nchain].datalen; 713 dev->sc_ds.chain[nchain].datalen = tcount; 714 #ifdef DEBUG 715 if (nchain) /* Don't count miss on first one */ 716 ++siopdma_misses; 717 #endif 718 } 719 ++nchain; 720 if (nchain < DMAMAXIO) /* force error if buffer too small */ 721 dev->sc_ds.chain[nchain].datalen = 0; 722 } 723 #ifdef DEBUG 724 if (nchain != 1 && len != 0 && siop_debug & 3) { 725 printf ("DMA chaining set: %d\n", nchain); 726 for (i = 0; i < nchain; ++i) { 727 printf (" [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf, 728 dev->sc_ds.chain[i].datalen); 729 } 730 } 731 #endif 732 733 regs->siop_sbcl = dev->sc_sync[target].offset; 734 if (dev->sc_ds.sdtrolen) 735 regs->siop_scratch = regs->siop_scratch | 0x100; 736 else 737 regs->siop_scratch = regs->siop_scratch & ~0xff00; 738 regs->siop_dsa = dev->sc_dspa; 739 /* push data case on things the 53c710 needs to access */ 740 dma_cachectl (dev, sizeof (struct siop_softc)); 741 dma_cachectl (cbuf, clen); 742 if (buf != NULL && len != 0) 743 dma_cachectl (buf, len); 744 regs->siop_dsp = dev->sc_scriptspa; 745 } 746 747 /* 748 * Process a DMA or SCSI interrupt from the 53C710 SIOP 749 */ 750 751 int 752 siop_checkintr(dev, istat, dstat, sstat0, status) 753 struct siop_softc *dev; 754 u_char istat; 755 u_char dstat; 756 u_char sstat0; 757 int *status; 758 { 759 siop_regmap_p regs = dev->sc_siopp; 760 int target; 761 762 regs->siop_ctest8 |= 0x04; 763 while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0) 764 ; 765 regs->siop_ctest8 &= ~0x04; 766 #ifdef DEBUG 767 if (siop_debug & 1) { 768 DCIAS(dev->sc_statuspa); /* XXX */ 769 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 770 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 771 } 772 #endif 773 if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 || 774 regs->siop_dsps == 0xfffc)) { 775 /* Normal completion status, or check condition */ 776 if (regs->siop_dsa != dev->sc_dspa) { 777 printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa, 778 dev->sc_dspa); 779 panic("*** siop DSA invalid ***"); 780 } 781 target = dev->sc_slave; 782 if (dev->sc_sync[target].state == SYNC_SENT) { 783 #ifdef DEBUG 784 if (siopsync_debug) 785 printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", 786 dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3], 787 dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]); 788 #endif 789 if (dev->sc_msg[0] == MSG_REJECT) 790 printf ("target %d sync request was rejected\n", 791 target); 792 dev->sc_sync[target].state = SYNC_DONE; 793 dev->sc_sync[target].period = 0; 794 dev->sc_sync[target].offset = 0; 795 if (dev->sc_msg[1] == MSG_EXT_MESSAGE && 796 dev->sc_msg[2] == 3 && 797 dev->sc_msg[3] == MSG_SYNC_REQ && 798 dev->sc_msg[5] != 0) { 799 if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) { 800 #ifdef DEBUG 801 printf ("%d: target %d wanted %dns period\n", 802 dev->sc_dev.dv_xname, target, 803 dev->sc_msg[4] * 4); 804 #endif 805 /* 806 * Kludge for Maxtor XT8580S 807 * It accepts whatever we request, even 808 * though it won't work. So we ask for 809 * a short period than we can handle. If 810 * the device says it can do it, use 208ns. 811 * If the device says it can do less than 812 * 100ns, then we limit it to 100ns. 813 */ 814 if (dev->sc_msg[4] == siop_sync_period / 4) 815 dev->sc_msg[4] = 208 / 4; 816 else 817 dev->sc_msg[4] = 100 / 4; 818 } 819 printf ("%s: target %d now synchronous, period=%dns, offset=%d\n", 820 dev->sc_dev.dv_xname, target, 821 dev->sc_msg[4] * 4, dev->sc_msg[5]); 822 scsi_period_to_siop (dev, target); 823 } 824 } 825 #if 0 826 DCIAS(dev->sc_statuspa); /* XXX */ 827 #else 828 dma_cachectl(&dev->sc_stat[0], 1); 829 #endif 830 *status = dev->sc_stat[0]; 831 return 1; 832 } 833 if (sstat0 & SIOP_SSTAT0_M_A) { /* Phase mismatch */ 834 #ifdef DEBUG 835 if (siop_debug & 9) 836 printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl, 837 regs->siop_dsp - dev->sc_scriptspa); 838 if (siop_debug & 0x10) 839 panic ("53c710 phase mismatch"); 840 #endif 841 if ((regs->siop_sbcl & SIOP_REQ) == 0) 842 printf ("Phase mismatch: REQ not asserted! %02x\n", 843 regs->siop_sbcl); 844 switch (regs->siop_sbcl & 7) { 845 /* 846 * For data out and data in phase, check for DMA chaining 847 */ 848 849 /* 850 * for message in, check for possible reject for sync request 851 */ 852 case 0: 853 regs->siop_dsp = dev->sc_scriptspa + Ent_dataout; 854 break; 855 case 1: 856 regs->siop_dsp = dev->sc_scriptspa + Ent_datain; 857 break; 858 case 2: 859 regs->siop_dsp = dev->sc_scriptspa + Ent_cmd; 860 break; 861 case 3: 862 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 863 break; 864 case 6: 865 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 866 break; 867 case 7: 868 regs->siop_dsp = dev->sc_scriptspa + Ent_msgin; 869 break; 870 default: 871 goto bad_phase; 872 } 873 return 0; 874 } 875 if (sstat0 & SIOP_SSTAT0_STO) { /* Select timed out */ 876 *status = -1; 877 return 1; 878 } 879 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 && 880 (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) { 881 printf ("DMA chaining failed\n"); 882 siopreset (dev); 883 *status = -1; 884 return 1; 885 } 886 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) { 887 #ifdef DEBUG 888 if (siop_debug & 3) 889 printf ("DMA chaining completed: dsa %x dnad %x addr %x\n", 890 regs->siop_dsa, regs->siop_dnad, regs->siop_addr); 891 ++siopchain_ints; 892 #endif 893 regs->siop_dsa = dev->sc_dspa; 894 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 895 return 0; 896 } 897 target = dev->sc_slave; 898 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 && 899 dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) { 900 dev->sc_sync[target].state = SYNC_DONE; 901 dev->sc_sync[target].period = 0; 902 dev->sc_sync[target].offset = 0; 903 dev->sc_ds.sdtrolen = 0; 904 dev->sc_ds.sdtrilen = 0; 905 #ifdef DEBUG 906 if (siopsync_debug || 1) 907 printf ("target %d rejected sync, going asynchronous\n", target); 908 #endif 909 siop_inhibit_sync[target] = -1; 910 if ((regs->siop_sbcl & 7) == 6) { 911 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 912 return (0); 913 } 914 regs->siop_dcntl |= SIOP_DCNTL_STD; 915 return (0); 916 } 917 if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) || 918 sstat0 & SIOP_SSTAT0_UDC) { 919 #ifdef DEBUG 920 printf ("%s: target %d disconnected unexpectedly\n", 921 dev->sc_dev.dv_xname, target); 922 #endif 923 #if 0 924 siopabort (dev, regs, "siopchkintr"); 925 #endif 926 *status = STS_BUSY; 927 return 1; 928 } 929 if (dstat & SIOP_DSTAT_SIR &®s->siop_dsps == 0xfffb) { 930 #if 0 931 printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target); 932 #endif 933 #if 0 934 siopabort (dev, regs, "siopchkintr"); 935 #endif 936 *status = STS_BUSY; 937 return 1; 938 } 939 if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) { 940 #if 0 941 DCIAS(dev->sc_statuspa); 942 #else 943 dma_cachectl (&dev->sc_stat[0], 1); 944 #endif 945 printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n", 946 regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0], 947 regs->siop_sbcl); 948 siopreset (dev); 949 *status = -1; 950 return 1; 951 } 952 if (sstat0 & SIOP_SSTAT0_SGE) 953 printf ("SIOP: SCSI Gross Error\n"); 954 if (sstat0 & SIOP_SSTAT0_PAR) 955 printf ("SIOP: Parity Error\n"); 956 if (dstat & SIOP_DSTAT_OPC) 957 printf ("SIOP: Invalid SCRIPTS Opcode\n"); 958 bad_phase: 959 /* 960 * temporary panic for unhandled conditions 961 * displays various things about the 53C710 status and registers 962 * then panics. 963 * XXXX need to clean this up to print out the info, reset, and continue 964 */ 965 printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds); 966 printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", dev->sc_scriptspa, 967 dev->sc_dspa, kvtop(regs), regs->siop_dsp, 968 *((long *)®s->siop_dcmd)); 969 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n", 970 istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, 971 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 972 #ifdef DEBUG 973 if (siop_debug & 0x20) 974 panic("siopchkintr: **** temp ****"); 975 #endif 976 siopreset (dev); /* hard reset */ 977 *status = -1; 978 return 1; 979 } 980 981 /* 982 * SCSI 'immediate' command: issue a command to some SCSI device 983 * and get back an 'immediate' response (i.e., do programmed xfer 984 * to get the response data). 'cbuf' is a buffer containing a scsi 985 * command of length clen bytes. 'buf' is a buffer of length 'len' 986 * bytes for data. The transfer direction is determined by the device 987 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 988 * command must supply no data. 'xferphase' is the bus phase the 989 * caller expects to happen after the command is issued. It should 990 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 991 * 992 * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a 993 * lot easier to do than to use programmed I/O). 994 * 995 */ 996 int 997 siopicmd(dev, target, cbuf, clen, buf, len) 998 struct siop_softc *dev; 999 int target; 1000 void *cbuf; 1001 int clen; 1002 void *buf; 1003 int len; 1004 { 1005 siop_regmap_p regs = dev->sc_siopp; 1006 int i; 1007 int status; 1008 u_char istat; 1009 u_char dstat; 1010 u_char sstat0; 1011 1012 if (dev->sc_flags & SIOP_SELECTED) { 1013 printf ("siopicmd%d: bus busy\n", target); 1014 return -1; 1015 } 1016 regs->siop_sien = 0x00; /* disable SCSI and DMA interrupts */ 1017 regs->siop_dien = 0x00; 1018 dev->sc_flags |= SIOP_SELECTED; 1019 dev->sc_slave = target; 1020 #ifdef DEBUG 1021 if (siop_debug & 1) 1022 printf ("siopicmd: target %x cmd %02x ds %x\n", target, 1023 *((char *)cbuf), &dev->sc_ds); 1024 #endif 1025 siop_setup (dev, target, cbuf, clen, buf, len); 1026 1027 for (;;) { 1028 /* use cmd_wait values? */ 1029 i = siop_cmd_wait << 1; 1030 while (((istat = regs->siop_istat) & 1031 (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { 1032 if (--i <= 0) { 1033 printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n", 1034 target, *((char *)cbuf), 1035 regs->siop_sbcl, regs->siop_dsp, 1036 regs->siop_dsp - dev->sc_scriptspa, 1037 *((long *)®s->siop_dcmd), &dev->sc_ds); 1038 i = siop_cmd_wait << 2; 1039 /* XXXX need an upper limit and reset */ 1040 } 1041 delay(1); 1042 } 1043 dstat = regs->siop_dstat; 1044 sstat0 = regs->siop_sstat0; 1045 #ifdef DEBUG 1046 if (siop_debug & 1) { 1047 DCIAS(dev->sc_statuspa); /* XXX should just invalidate dev->sc_stat */ 1048 printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1049 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, 1050 dev->sc_stat[0], dev->sc_msg[0]); 1051 } 1052 #endif 1053 if (siop_checkintr(dev, istat, dstat, sstat0, &status)) { 1054 dev->sc_flags &= ~SIOP_SELECTED; 1055 return (status); 1056 } 1057 } 1058 } 1059 1060 int 1061 siopgo(dev, xs) 1062 struct siop_softc *dev; 1063 struct scsi_xfer *xs; 1064 { 1065 siop_regmap_p regs; 1066 int i; 1067 int nchain; 1068 int count, tcount; 1069 char *addr, *dmaend; 1070 1071 #ifdef DEBUG 1072 if (siop_debug & 1) 1073 printf ("%s: go ", dev->sc_dev.dv_xname); 1074 #if 0 1075 if ((cdb->cdb[1] & 1) == 0 && 1076 ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) || 1077 (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0 1078 && cdb->cdb[4] == 0))) 1079 panic ("siopgo: attempted write to block < 0x100"); 1080 #endif 1081 #endif 1082 #if 0 1083 cdb->cdb[1] |= unit << 5; 1084 #endif 1085 1086 if (dev->sc_flags & SIOP_SELECTED) { 1087 printf ("%s: bus busy\n", dev->sc_dev.dv_xname); 1088 return 1; 1089 } 1090 1091 dev->sc_flags |= SIOP_SELECTED | SIOP_DMA; 1092 dev->sc_slave = xs->sc_link->target; 1093 regs = dev->sc_siopp; 1094 /* enable SCSI and DMA interrupts */ 1095 regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE | 1096 SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; 1097 regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD | 1098 SIOP_DIEN_OPC; 1099 #ifdef DEBUG 1100 if (siop_debug & 1) 1101 printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd->opcode, &dev->sc_ds); 1102 #endif 1103 1104 siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen); 1105 1106 return (0); 1107 } 1108 1109 /* 1110 * Check for 53C710 interrupts 1111 */ 1112 1113 int 1114 siopintr (dev) 1115 register struct siop_softc *dev; 1116 { 1117 siop_regmap_p regs; 1118 register u_char istat, dstat, sstat0; 1119 int unit; 1120 int status; 1121 int found = 0; 1122 1123 regs = dev->sc_siopp; 1124 istat = dev->sc_istat; 1125 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 1126 return; 1127 if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED) 1128 return; /* doing non-interrupt I/O */ 1129 /* Got a valid interrupt on this device */ 1130 dstat = dev->sc_dstat; 1131 sstat0 = dev->sc_sstat0; 1132 dev->sc_istat = 0; 1133 #ifdef DEBUG 1134 if (siop_debug & 1) 1135 printf ("%s: intr istat %x dstat %x sstat0 %x\n", 1136 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1137 if ((dev->sc_flags & SIOP_DMA) == 0) { 1138 printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n", 1139 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1140 } 1141 #endif 1142 1143 #ifdef DEBUG 1144 if (siop_debug & 5) { 1145 DCIAS(dev->sc_statuspa); 1146 printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1147 unit, istat, dstat, sstat0, regs->siop_dsps, 1148 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 1149 } 1150 #endif 1151 if (siop_checkintr (dev, istat, dstat, sstat0, &status)) { 1152 #if 1 1153 regs->siop_sien = 0; 1154 regs->siop_dien = 0; 1155 if (status == 0xff) 1156 printf ("siopintr: status == 0xff\n"); 1157 #endif 1158 dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED); 1159 siop_scsidone(dev, dev->sc_stat[0]); 1160 } 1161 } 1162 1163 scsi_period_to_siop (dev, target) 1164 struct siop_softc *dev; 1165 { 1166 int period, offset, i, sxfer; 1167 1168 period = dev->sc_msg[4]; 1169 offset = dev->sc_msg[5]; 1170 sxfer = 0; 1171 if (offset <= SIOP_MAX_OFFSET) 1172 sxfer = offset; 1173 for (i = 0; i < sizeof (xxx) / 2; ++i) { 1174 if (period <= xxx[i].x) { 1175 sxfer |= xxx[i].y & 0x70; 1176 offset = xxx[i].y & 0x03; 1177 break; 1178 } 1179 } 1180 dev->sc_sync[target].period = sxfer; 1181 dev->sc_sync[target].offset = offset; 1182 #ifdef DEBUG 1183 printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset); 1184 #endif 1185 } 1186
Indexes created Wed Sep 24 15:09:51 GMT 2025