siop.c revision 1.16
1 /* 2 * Copyright (c) 1994 Michael L. Hitch 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Van Jacobson of Lawrence Berkeley Laboratory. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)siop.c 7.5 (Berkeley) 5/4/91 38 * $Id: siop.c,v 1.16 1994/07/18 08:06:40 chopps Exp $ 39 */ 40 41 /* 42 * AMIGA 53C710 scsi adaptor driver 43 */ 44 45 /* need to know if any tapes have been configured */ 46 #include "st.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/buf.h> 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 #include <machine/cpu.h> 55 #include <amiga/amiga/custom.h> 56 #include <amiga/dev/siopreg.h> 57 #include <amiga/dev/siopvar.h> 58 59 extern u_int kvtop(); 60 61 /* 62 * SCSI delays 63 * In u-seconds, primarily for state changes on the SPC. 64 */ 65 #define SCSI_CMD_WAIT 500000 /* wait per step of 'immediate' cmds */ 66 #define SCSI_DATA_WAIT 500000 /* wait per data in/out step */ 67 #define SCSI_INIT_WAIT 500000 /* wait per step (both) during init */ 68 69 int siopicmd __P((struct siop_softc *, int, void *, int, void *, int)); 70 int siopgo __P((struct siop_softc *, struct scsi_xfer *)); 71 int siopgetsense __P((struct siop_softc *, struct scsi_xfer *)); 72 void siopabort __P((struct siop_softc *, siop_regmap_p, char *)); 73 void sioperror __P((struct siop_softc *, siop_regmap_p, u_char)); 74 void siopstart __P((struct siop_softc *)); 75 void siopreset __P((struct siop_softc *)); 76 void siopsetdelay __P((int)); 77 void siop_scsidone __P((struct siop_softc *, int)); 78 void siop_donextcmd __P((struct siop_softc *)); 79 int siopintr __P((struct siop_softc *)); 80 81 /* 53C710 script */ 82 unsigned long scripts[] = { 83 0x47000000, 0x000002d0, /* 000 - 0 */ 84 0x838b0000, 0x000000d0, /* 008 - 8 */ 85 0x7a1b1000, 0x00000000, /* 010 - 16 */ 86 0x828a0000, 0x00000088, /* 018 - 24 */ 87 0x9e020000, 0x0000ff01, /* 020 - 32 */ 88 0x72350000, 0x00000000, /* 028 - 40 */ 89 0x808c0000, 0x00000048, /* 030 - 48 */ 90 0x58000008, 0x00000000, /* 038 - 56 */ 91 0x1e000024, 0x00000024, /* 040 - 64 */ 92 0x838b0000, 0x00000090, /* 048 - 72 */ 93 0x1f00002c, 0x0000002c, /* 050 - 80 */ 94 0x838b0000, 0x00000080, /* 058 - 88 */ 95 0x868a0000, 0xffffffd0, /* 060 - 96 */ 96 0x838a0000, 0x00000070, /* 068 - 104 */ 97 0x878a0000, 0x00000158, /* 070 - 112 */ 98 0x80880000, 0x00000028, /* 078 - 120 */ 99 0x1e000004, 0x00000004, /* 080 - 128 */ 100 0x838b0000, 0x00000050, /* 088 - 136 */ 101 0x868a0000, 0xffffffe8, /* 090 - 144 */ 102 0x838a0000, 0x00000040, /* 098 - 152 */ 103 0x878a0000, 0x00000128, /* 0a0 - 160 */ 104 0x9a020000, 0x0000ff02, /* 0a8 - 168 */ 105 0x1a00000c, 0x0000000c, /* 0b0 - 176 */ 106 0x878b0000, 0x00000168, /* 0b8 - 184 */ 107 0x838a0000, 0x00000018, /* 0c0 - 192 */ 108 0x818a0000, 0x000000e8, /* 0c8 - 200 */ 109 0x808a0000, 0x000000b8, /* 0d0 - 208 */ 110 0x98080000, 0x0000ff03, /* 0d8 - 216 */ 111 0x1b000014, 0x00000014, /* 0e0 - 224 */ 112 0x72090000, 0x00000000, /* 0e8 - 232 */ 113 0x6a340000, 0x00000000, /* 0f0 - 240 */ 114 0x9f030000, 0x0000ff04, /* 0f8 - 248 */ 115 0x1f00001c, 0x0000001c, /* 100 - 256 */ 116 0x808c0007, 0x00000050, /* 108 - 264 */ 117 0x98040000, 0x0000ff26, /* 110 - 272 */ 118 0x60000040, 0x00000000, /* 118 - 280 */ 119 0x48000000, 0x00000000, /* 120 - 288 */ 120 0x7c1bef00, 0x00000000, /* 128 - 296 */ 121 0x72340000, 0x00000000, /* 130 - 304 */ 122 0x980c0002, 0x0000fffc, /* 138 - 312 */ 123 0x980c0008, 0x0000fffb, /* 140 - 320 */ 124 0x980c0018, 0x0000fffd, /* 148 - 328 */ 125 0x98040000, 0x0000fffe, /* 150 - 336 */ 126 0x98080000, 0x0000ff00, /* 158 - 344 */ 127 0x60000008, 0x00000000, /* 160 - 352 */ 128 0x98080000, 0x0000ff26, /* 168 - 360 */ 129 0x60000040, 0x00000000, /* 170 - 368 */ 130 0x828b0000, 0xffffff28, /* 178 - 376 */ 131 0x838b0000, 0xffffff58, /* 180 - 384 */ 132 0x878b0000, 0xffffff68, /* 188 - 392 */ 133 0x18000034, 0x00000034, /* 190 - 400 */ 134 0x808b0000, 0x000001c0, /* 198 - 408 */ 135 0x838b0000, 0xffffff38, /* 1a0 - 416 */ 136 0x878a0000, 0x000000d0, /* 1a8 - 424 */ 137 0x98080000, 0x0000ff05, /* 1b0 - 432 */ 138 0x19000034, 0x00000034, /* 1b8 - 440 */ 139 0x818b0000, 0x00000160, /* 1c0 - 448 */ 140 0x80880000, 0xffffffd0, /* 1c8 - 456 */ 141 0x1f00001c, 0x0000001c, /* 1d0 - 464 */ 142 0x808c0001, 0x00000018, /* 1d8 - 472 */ 143 0x980c0002, 0x0000ff08, /* 1e0 - 480 */ 144 0x808c0004, 0x00000020, /* 1e8 - 488 */ 145 0x98080000, 0x0000ff06, /* 1f0 - 496 */ 146 0x60000040, 0x00000000, /* 1f8 - 504 */ 147 0x1f00002c, 0x0000002c, /* 200 - 512 */ 148 0x98080000, 0x0000ff07, /* 208 - 520 */ 149 0x60000040, 0x00000000, /* 210 - 528 */ 150 0x48000000, 0x00000000, /* 218 - 536 */ 151 0x98080000, 0x0000ff09, /* 220 - 544 */ 152 0x1f00001c, 0x0000001c, /* 228 - 552 */ 153 0x808c0001, 0x00000018, /* 230 - 560 */ 154 0x980c0002, 0x0000ff10, /* 238 - 568 */ 155 0x808c0004, 0x00000020, /* 240 - 576 */ 156 0x98080000, 0x0000ff11, /* 248 - 584 */ 157 0x60000040, 0x00000000, /* 250 - 592 */ 158 0x1f00002c, 0x0000002c, /* 258 - 600 */ 159 0x98080000, 0x0000ff12, /* 260 - 608 */ 160 0x60000040, 0x00000000, /* 268 - 616 */ 161 0x48000000, 0x00000000, /* 270 - 624 */ 162 0x98080000, 0x0000ff13, /* 278 - 632 */ 163 0x1f00001c, 0x0000001c, /* 280 - 640 */ 164 0x808c0001, 0x00000018, /* 288 - 648 */ 165 0x980c0002, 0x0000ff14, /* 290 - 656 */ 166 0x808c0004, 0x00000020, /* 298 - 664 */ 167 0x98080000, 0x0000ff15, /* 2a0 - 672 */ 168 0x60000040, 0x00000000, /* 2a8 - 680 */ 169 0x1f00002c, 0x0000002c, /* 2b0 - 688 */ 170 0x98080000, 0x0000ff16, /* 2b8 - 696 */ 171 0x60000040, 0x00000000, /* 2c0 - 704 */ 172 0x48000000, 0x00000000, /* 2c8 - 712 */ 173 0x98080000, 0x0000ff17, /* 2d0 - 720 */ 174 0x54000000, 0x00000040, /* 2d8 - 728 */ 175 0x9f030000, 0x0000ff18, /* 2e0 - 736 */ 176 0x1f00001c, 0x0000001c, /* 2e8 - 744 */ 177 0x990b0000, 0x0000ff19, /* 2f0 - 752 */ 178 0x980a0000, 0x0000ff20, /* 2f8 - 760 */ 179 0x9f0a0000, 0x0000ff21, /* 300 - 768 */ 180 0x9b0a0000, 0x0000ff22, /* 308 - 776 */ 181 0x9e0a0000, 0x0000ff23, /* 310 - 784 */ 182 0x98080000, 0x0000ff24, /* 318 - 792 */ 183 0x98080000, 0x0000ff25, /* 320 - 800 */ 184 0x76100800, 0x00000000, /* 328 - 808 */ 185 0x80840700, 0x00000008, /* 330 - 816 */ 186 0x7e110100, 0x00000000, /* 338 - 824 */ 187 0x6a100000, 0x00000000, /* 340 - 832 */ 188 0x19000034, 0x00000034, /* 348 - 840 */ 189 0x818b0000, 0xffffffd0, /* 350 - 848 */ 190 0x98080000, 0x0000ff27, /* 358 - 856 */ 191 0x76100800, 0x00000000, /* 360 - 864 */ 192 0x80840700, 0x00000008, /* 368 - 872 */ 193 0x7e110100, 0x00000000, /* 370 - 880 */ 194 0x6a100000, 0x00000000, /* 378 - 888 */ 195 0x18000034, 0x00000034, /* 380 - 896 */ 196 0x808b0000, 0xffffffd0, /* 388 - 904 */ 197 0x98080000, 0x0000ff27 /* 390 - 912 */ 198 }; 199 200 #define Ent_msgout 0x00000018 201 #define Ent_cmd 0x000000a8 202 #define Ent_status 0x000000e0 203 #define Ent_msgin 0x000000f8 204 #define Ent_dataout 0x00000190 205 #define Ent_datain 0x000001b8 206 207 /* default to not inhibit sync negotiation on any drive */ 208 /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */ 209 u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0 }; /* initialize, so patchable */ 210 int siop_no_dma = 0; 211 212 int siop_reset_delay = 2000; /* delay after reset, in milleseconds */ 213 int siop_sync_period = 50; /* synchronous transfer period, in nanoseconds */ 214 215 int siop_cmd_wait = SCSI_CMD_WAIT; 216 int siop_data_wait = SCSI_DATA_WAIT; 217 int siop_init_wait = SCSI_INIT_WAIT; 218 219 static struct { 220 unsigned char x; /* period from sync request message */ 221 unsigned char y; /* siop_period << 4 | sbcl */ 222 } xxx[] = { 223 {0x0f, 0x01}, 224 {0x13, 0x11}, 225 {0x17, 0x21}, 226 /* {0x17, 0x02}, */ 227 {0x1b, 0x31}, 228 {0x1d, 0x12}, 229 {0x1e, 0x41}, 230 /* {0x1e, 0x03}, */ 231 {0x22, 0x51}, 232 {0x23, 0x22}, 233 {0x26, 0x61}, 234 /* {0x26, 0x13}, */ 235 {0x29, 0x32}, 236 {0x2a, 0x71}, 237 {0x2d, 0x23}, 238 {0x2e, 0x42}, 239 {0x34, 0x52}, 240 {0x35, 0x33}, 241 {0x3a, 0x62}, 242 {0x3c, 0x43}, 243 {0x40, 0x72}, 244 {0x44, 0x53}, 245 {0x4b, 0x63}, 246 {0x53, 0x73} 247 }; 248 249 #ifdef DEBUG 250 #define QPRINTF(a) if (siop_debug > 1) printf a 251 /* 252 * 0x01 - full debug 253 * 0x02 - DMA chaining 254 * 0x04 - siopintr 255 * 0x08 - phase mismatch 256 * 0x10 - panic on phase mismatch 257 * 0x20 - panic on unhandled exceptions 258 */ 259 int siop_debug = 0; 260 int siopsync_debug = 0; 261 int siopdma_hits = 0; 262 int siopdma_misses = 0; 263 int siopchain_ints = 0; 264 #else 265 #define QPRINTF(a) 266 #endif 267 268 269 /* 270 * default minphys routine for siop based controllers 271 */ 272 void 273 siop_minphys(bp) 274 struct buf *bp; 275 { 276 /* 277 * no max transfer at this level 278 */ 279 } 280 281 /* 282 * must be used 283 */ 284 u_int 285 siop_adinfo() 286 { 287 /* 288 * one request at a time please 289 */ 290 return(1); 291 } 292 293 /* 294 * used by specific siop controller 295 * 296 * it appears that the higher level code does nothing with LUN's 297 * so I will too. I could plug it in, however so could they 298 * in scsi_scsi_cmd(). 299 */ 300 int 301 siop_scsicmd(xs) 302 struct scsi_xfer *xs; 303 { 304 struct siop_pending *pendp; 305 struct siop_softc *dev; 306 struct scsi_link *slp; 307 int flags, s; 308 309 slp = xs->sc_link; 310 dev = slp->adapter_softc; 311 flags = xs->flags; 312 313 if (flags & SCSI_DATA_UIO) 314 panic("siop: scsi data uio requested"); 315 316 if (dev->sc_xs && flags & SCSI_NOMASK) 317 panic("siop_scsicmd: busy"); 318 319 s = splbio(); 320 pendp = &dev->sc_xsstore[slp->target][slp->lun]; 321 if (pendp->xs) { 322 splx(s); 323 return(TRY_AGAIN_LATER); 324 } 325 326 if (dev->sc_xs) { 327 pendp->xs = xs; 328 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 329 splx(s); 330 return(SUCCESSFULLY_QUEUED); 331 } 332 pendp->xs = NULL; 333 dev->sc_xs = xs; 334 splx(s); 335 336 /* 337 * nothing is pending do it now. 338 */ 339 siop_donextcmd(dev); 340 341 if (flags & SCSI_NOMASK) 342 return(COMPLETE); 343 return(SUCCESSFULLY_QUEUED); 344 } 345 346 /* 347 * entered with dev->sc_xs pointing to the next xfer to perform 348 */ 349 void 350 siop_donextcmd(dev) 351 struct siop_softc *dev; 352 { 353 struct scsi_xfer *xs; 354 struct scsi_link *slp; 355 int flags, phase, stat; 356 357 xs = dev->sc_xs; 358 slp = xs->sc_link; 359 flags = xs->flags; 360 361 #if 0 362 if (flags & SCSI_DATA_IN) 363 phase = DATA_IN_PHASE; 364 else if (flags & SCSI_DATA_OUT) 365 phase = DATA_OUT_PHASE; 366 else 367 phase = STATUS_PHASE; 368 #endif 369 370 if (flags & SCSI_RESET) 371 siopreset(dev); 372 373 dev->sc_stat[0] = -1; 374 #if 0 375 if (phase == STATUS_PHASE || flags & SCSI_NOMASK) 376 #else 377 if (flags & SCSI_NOMASK || siop_no_dma) 378 #endif 379 stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen, 380 xs->data, xs->datalen/*, phase*/); 381 else if (siopgo(dev, xs) == 0) 382 return; 383 else 384 stat = dev->sc_stat[0]; 385 386 siop_scsidone(dev, stat); 387 } 388 389 void 390 siop_scsidone(dev, stat) 391 struct siop_softc *dev; 392 int stat; 393 { 394 struct siop_pending *pendp; 395 struct scsi_xfer *xs; 396 int s, donext; 397 398 xs = dev->sc_xs; 399 #ifdef DIAGNOSTIC 400 if (xs == NULL) 401 panic("siop_scsidone"); 402 #endif 403 /* 404 * is this right? 405 */ 406 xs->status = stat; 407 408 if (stat == 0 || xs->flags & SCSI_ERR_OK) 409 xs->resid = 0; 410 else { 411 switch(stat) { 412 case SCSI_CHECK: 413 if (stat = siopgetsense(dev, xs)) 414 goto bad_sense; 415 xs->error = XS_SENSE; 416 break; 417 case SCSI_BUSY: 418 xs->error = XS_BUSY; 419 break; 420 bad_sense: 421 default: 422 xs->error = XS_DRIVER_STUFFUP; 423 QPRINTF(("siop_scsicmd() bad %x\n", stat)); 424 break; 425 } 426 } 427 xs->flags |= ITSDONE; 428 429 /* 430 * grab next command before scsi_done() 431 * this way no single device can hog scsi resources. 432 */ 433 s = splbio(); 434 pendp = dev->sc_xslist.tqh_first; 435 if (pendp == NULL) { 436 donext = 0; 437 dev->sc_xs = NULL; 438 } else { 439 donext = 1; 440 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 441 dev->sc_xs = pendp->xs; 442 pendp->xs = NULL; 443 } 444 splx(s); 445 scsi_done(xs); 446 447 if (donext) 448 siop_donextcmd(dev); 449 } 450 451 int 452 siopgetsense(dev, xs) 453 struct siop_softc *dev; 454 struct scsi_xfer *xs; 455 { 456 struct scsi_sense rqs; 457 struct scsi_link *slp; 458 int stat; 459 460 slp = xs->sc_link; 461 462 rqs.op_code = REQUEST_SENSE; 463 rqs.byte2 = slp->lun << 5; 464 #ifdef not_yet 465 rqs.length = xs->req_sense_length ? xs->req_sense_length : 466 sizeof(xs->sense); 467 #else 468 rqs.length = sizeof(xs->sense); 469 #endif 470 if (rqs.length > sizeof (xs->sense)) 471 rqs.length = sizeof (xs->sense); 472 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 473 474 return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense, 475 rqs.length)); 476 } 477 478 void 479 siopabort(dev, regs, where) 480 register struct siop_softc *dev; 481 siop_regmap_p regs; 482 char *where; 483 { 484 485 printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n", 486 dev->sc_dev.dv_xname, 487 where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl); 488 489 if (dev->sc_flags & SIOP_SELECTED) { 490 #ifdef TODO 491 SET_SBIC_cmd (regs, SBIC_CMD_ABORT); 492 WAIT_CIP (regs); 493 494 GET_SBIC_asr (regs, asr); 495 if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) 496 { 497 /* ok, get more drastic.. */ 498 499 SET_SBIC_cmd (regs, SBIC_CMD_RESET); 500 delay(25); 501 SBIC_WAIT(regs, SBIC_ASR_INT, 0); 502 GET_SBIC_csr (regs, csr); /* clears interrupt also */ 503 504 dev->sc_flags &= ~SIOP_SELECTED; 505 return; 506 } 507 508 do 509 { 510 SBIC_WAIT (regs, SBIC_ASR_INT, 0); 511 GET_SBIC_csr (regs, csr); 512 } 513 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) 514 && (csr != SBIC_CSR_CMD_INVALID)); 515 #endif 516 517 /* lets just hope it worked.. */ 518 dev->sc_flags &= ~SIOP_SELECTED; 519 } 520 } 521 522 /* 523 * XXX Set/reset long delays. 524 * 525 * if delay == 0, reset default delays 526 * if delay < 0, set both delays to default long initialization values 527 * if delay > 0, set both delays to this value 528 * 529 * Used when a devices is expected to respond slowly (e.g. during 530 * initialization). 531 */ 532 void 533 siop_delay(delay) 534 int delay; 535 { 536 static int saved_cmd_wait, saved_data_wait; 537 538 if (delay) { 539 saved_cmd_wait = siop_cmd_wait; 540 saved_data_wait = siop_data_wait; 541 if (delay > 0) 542 siop_cmd_wait = siop_data_wait = delay; 543 else 544 siop_cmd_wait = siop_data_wait = siop_init_wait; 545 } else { 546 siop_cmd_wait = saved_cmd_wait; 547 siop_data_wait = saved_data_wait; 548 } 549 } 550 551 void 552 siopinitialize(dev) 553 struct siop_softc *dev; 554 { 555 /* 556 * Need to check that scripts is on a long word boundary 557 * and that DS is on a long word boundary. 558 * Also need to verify that dev doesn't non-contiguous 559 * physical pages. 560 */ 561 dev->sc_scriptspa = kvtop(scripts); 562 dev->sc_dspa = kvtop(&dev->sc_ds); 563 dev->sc_lunpa = kvtop(&dev->sc_lun); 564 dev->sc_statuspa = kvtop(&dev->sc_stat[0]); 565 dev->sc_msgpa = kvtop(&dev->sc_msg[0]); 566 siopreset (dev); 567 } 568 569 void 570 siopreset(dev) 571 struct siop_softc *dev; 572 { 573 siop_regmap_p regs; 574 u_int i, s; 575 u_char my_id, csr; 576 577 regs = dev->sc_siopp; 578 579 if (dev->sc_flags & SIOP_ALIVE) 580 siopabort(dev, regs, "reset"); 581 582 printf("%s: ", dev->sc_dev.dv_xname); /* XXXX */ 583 584 s = splbio(); 585 my_id = 7; 586 587 /* 588 * Reset the chip 589 * XXX - is this really needed? 590 */ 591 regs->siop_sien &= ~SIOP_SIEN_RST; 592 regs->siop_scntl1 |= SIOP_SCNTL1_RST; 593 for (i = 0; i < 1000; ++i) 594 ; 595 regs->siop_scntl1 &= ~SIOP_SCNTL1_RST; 596 regs->siop_sien |= SIOP_SIEN_RST; 597 598 /* 599 * Set up various chip parameters 600 */ 601 regs->siop_istat = 0x40; 602 for (i = 0; i < 1000; ++i) 603 ; 604 regs->siop_istat = 0x00; 605 regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG; 606 regs->siop_dcntl = dev->sc_clock_freq & 0xff; 607 regs->siop_dmode = 0x80; /* burst length = 4 */ 608 regs->siop_sien = 0x00; /* don't enable interrupts yet */ 609 regs->siop_dien = 0x00; /* don't enable interrupts yet */ 610 regs->siop_scid = 1 << my_id; 611 regs->siop_dwt = 0x00; 612 regs->siop_ctest0 |= 0x20; /* Enable Active Negation ?? */ 613 regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff; 614 615 /* will need to re-negotiate sync xfers */ 616 bzero(&dev->sc_sync, sizeof (dev->sc_sync)); 617 618 splx (s); 619 620 delay (siop_reset_delay * 1000); 621 printf("siop id %d reset\n", my_id); 622 dev->sc_flags |= SIOP_ALIVE; 623 dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA); 624 } 625 626 /* 627 * Setup Data Storage for 53C710 and start SCRIPTS processing 628 */ 629 630 void 631 siop_setup (dev, target, cbuf, clen, buf, len) 632 struct siop_softc *dev; 633 int target; 634 u_char *cbuf; 635 int clen; 636 u_char *buf; 637 int len; 638 { 639 siop_regmap_p regs = dev->sc_siopp; 640 int i; 641 int nchain; 642 int count, tcount; 643 char *addr, *dmaend; 644 645 dev->sc_istat = 0; 646 dev->sc_lun = 0x80; /* XXX */ 647 dev->sc_stat[0] = -1; 648 dev->sc_msg[0] = -1; 649 dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8); 650 dev->sc_ds.idlen = 1; 651 dev->sc_ds.idbuf = (char *) dev->sc_lunpa; 652 dev->sc_ds.cmdlen = clen; 653 dev->sc_ds.cmdbuf = (char *) kvtop(cbuf); 654 dev->sc_ds.stslen = 1; 655 dev->sc_ds.stsbuf = (char *) dev->sc_statuspa; 656 dev->sc_ds.msglen = 1; 657 dev->sc_ds.msgbuf = (char *) dev->sc_msgpa; 658 dev->sc_ds.sdtrolen = 0; 659 dev->sc_ds.sdtrilen = 0; 660 bzero(&dev->sc_ds.chain, sizeof (dev->sc_ds.chain)); 661 662 if (dev->sc_sync[target].state == SYNC_START) { 663 if (siop_inhibit_sync[target]) { 664 dev->sc_sync[target].state = SYNC_DONE; 665 dev->sc_sync[target].offset = 0; 666 dev->sc_sync[target].period = 0; 667 #ifdef DEBUG 668 if (siopsync_debug) 669 printf ("Forcing target %d asynchronous\n", target); 670 #endif 671 } 672 else { 673 dev->sc_msg[1] = MSG_IDENTIFY; 674 dev->sc_msg[2] = MSG_EXT_MESSAGE; 675 dev->sc_msg[3] = 3; 676 dev->sc_msg[4] = MSG_SYNC_REQ; 677 dev->sc_msg[5] = siop_sync_period / 4; 678 dev->sc_msg[6] = SIOP_MAX_OFFSET; 679 dev->sc_ds.sdtrolen = 6; 680 dev->sc_ds.sdtrilen = 6; 681 dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) (dev->sc_msgpa + 1); 682 dev->sc_sync[target].state = SYNC_SENT; 683 #ifdef DEBUG 684 if (siopsync_debug) 685 printf ("Sending sync request to target %d\n", target); 686 #endif 687 } 688 } 689 690 /* 691 * If length is > 1 page, check for consecutive physical pages 692 * Need to set up chaining if not 693 */ 694 nchain = 0; 695 count = len; 696 addr = buf; 697 dmaend = NULL; 698 while (count > 0) { 699 dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr); 700 if (count < (tcount = NBPG - ((int) addr & PGOFSET))) 701 tcount = count; 702 dev->sc_ds.chain[nchain].datalen = tcount; 703 addr += tcount; 704 count -= tcount; 705 if (dev->sc_ds.chain[nchain].databuf == dmaend) { 706 dmaend += dev->sc_ds.chain[nchain].datalen; 707 dev->sc_ds.chain[--nchain].datalen += tcount; 708 #ifdef DEBUG 709 ++siopdma_hits; 710 #endif 711 } 712 else { 713 dmaend = dev->sc_ds.chain[nchain].databuf + 714 dev->sc_ds.chain[nchain].datalen; 715 dev->sc_ds.chain[nchain].datalen = tcount; 716 #ifdef DEBUG 717 if (nchain) /* Don't count miss on first one */ 718 ++siopdma_misses; 719 #endif 720 } 721 ++nchain; 722 if (nchain < DMAMAXIO) /* force error if buffer too small */ 723 dev->sc_ds.chain[nchain].datalen = 0; 724 } 725 #ifdef DEBUG 726 if (nchain != 1 && len != 0 && siop_debug & 3) { 727 printf ("DMA chaining set: %d\n", nchain); 728 for (i = 0; i < nchain; ++i) { 729 printf (" [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf, 730 dev->sc_ds.chain[i].datalen); 731 } 732 } 733 #endif 734 735 regs->siop_sbcl = dev->sc_sync[target].offset; 736 if (dev->sc_ds.sdtrolen) 737 regs->siop_scratch = regs->siop_scratch | 0x100; 738 else 739 regs->siop_scratch = regs->siop_scratch & ~0xff00; 740 regs->siop_dsa = dev->sc_dspa; 741 /* push data case on things the 53c710 needs to access */ 742 dma_cachectl (dev, sizeof (struct siop_softc)); 743 dma_cachectl (cbuf, clen); 744 if (buf != NULL && len != 0) 745 dma_cachectl (buf, len); 746 regs->siop_dsp = dev->sc_scriptspa; 747 } 748 749 /* 750 * Process a DMA or SCSI interrupt from the 53C710 SIOP 751 */ 752 753 int 754 siop_checkintr(dev, istat, dstat, sstat0, status) 755 struct siop_softc *dev; 756 u_char istat; 757 u_char dstat; 758 u_char sstat0; 759 int *status; 760 { 761 siop_regmap_p regs = dev->sc_siopp; 762 int target; 763 764 regs->siop_ctest8 |= 0x04; 765 while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0) 766 ; 767 regs->siop_ctest8 &= ~0x04; 768 #ifdef DEBUG 769 if (siop_debug & 1) { 770 DCIAS(dev->sc_statuspa); /* XXX */ 771 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 772 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 773 } 774 #endif 775 if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 || 776 regs->siop_dsps == 0xfffc)) { 777 /* Normal completion status, or check condition */ 778 if (regs->siop_dsa != dev->sc_dspa) { 779 printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa, 780 dev->sc_dspa); 781 panic("*** siop DSA invalid ***"); 782 } 783 target = dev->sc_slave; 784 if (dev->sc_sync[target].state == SYNC_SENT) { 785 #ifdef DEBUG 786 if (siopsync_debug) 787 printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", 788 dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3], 789 dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]); 790 #endif 791 if (dev->sc_msg[0] == MSG_REJECT) 792 printf ("target %d sync request was rejected\n", 793 target); 794 dev->sc_sync[target].state = SYNC_DONE; 795 dev->sc_sync[target].period = 0; 796 dev->sc_sync[target].offset = 0; 797 if (dev->sc_msg[1] == MSG_EXT_MESSAGE && 798 dev->sc_msg[2] == 3 && 799 dev->sc_msg[3] == MSG_SYNC_REQ && 800 dev->sc_msg[5] != 0) { 801 if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) { 802 #ifdef DEBUG 803 printf ("%d: target %d wanted %dns period\n", 804 dev->sc_dev.dv_xname, target, 805 dev->sc_msg[4] * 4); 806 #endif 807 /* 808 * Kludge for Maxtor XT8580S 809 * It accepts whatever we request, even 810 * though it won't work. So we ask for 811 * a short period than we can handle. If 812 * the device says it can do it, use 208ns. 813 * If the device says it can do less than 814 * 100ns, then we limit it to 100ns. 815 */ 816 if (dev->sc_msg[4] == siop_sync_period / 4) 817 dev->sc_msg[4] = 208 / 4; 818 else 819 dev->sc_msg[4] = 100 / 4; 820 } 821 printf ("%s: target %d now synchronous, period=%dns, offset=%d\n", 822 dev->sc_dev.dv_xname, target, 823 dev->sc_msg[4] * 4, dev->sc_msg[5]); 824 scsi_period_to_siop (dev, target); 825 } 826 } 827 #if 0 828 DCIAS(dev->sc_statuspa); /* XXX */ 829 #else 830 dma_cachectl(&dev->sc_stat[0], 1); 831 #endif 832 *status = dev->sc_stat[0]; 833 return 1; 834 } 835 if (sstat0 & SIOP_SSTAT0_M_A) { /* Phase mismatch */ 836 #ifdef DEBUG 837 if (siop_debug & 9) 838 printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl, 839 regs->siop_dsp - dev->sc_scriptspa); 840 if (siop_debug & 0x10) 841 panic ("53c710 phase mismatch"); 842 #endif 843 if ((regs->siop_sbcl & SIOP_REQ) == 0) 844 printf ("Phase mismatch: REQ not asserted! %02x\n", 845 regs->siop_sbcl); 846 switch (regs->siop_sbcl & 7) { 847 /* 848 * For data out and data in phase, check for DMA chaining 849 */ 850 851 /* 852 * for message in, check for possible reject for sync request 853 */ 854 case 0: 855 regs->siop_dsp = dev->sc_scriptspa + Ent_dataout; 856 break; 857 case 1: 858 regs->siop_dsp = dev->sc_scriptspa + Ent_datain; 859 break; 860 case 2: 861 regs->siop_dsp = dev->sc_scriptspa + Ent_cmd; 862 break; 863 case 3: 864 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 865 break; 866 case 6: 867 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 868 break; 869 case 7: 870 regs->siop_dsp = dev->sc_scriptspa + Ent_msgin; 871 break; 872 default: 873 goto bad_phase; 874 } 875 return 0; 876 } 877 if (sstat0 & SIOP_SSTAT0_STO) { /* Select timed out */ 878 *status = -1; 879 return 1; 880 } 881 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 && 882 (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) { 883 printf ("DMA chaining failed\n"); 884 siopreset (dev); 885 *status = -1; 886 return 1; 887 } 888 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) { 889 #ifdef DEBUG 890 if (siop_debug & 3) 891 printf ("DMA chaining completed: dsa %x dnad %x addr %x\n", 892 regs->siop_dsa, regs->siop_dnad, regs->siop_addr); 893 ++siopchain_ints; 894 #endif 895 regs->siop_dsa = dev->sc_dspa; 896 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 897 return 0; 898 } 899 target = dev->sc_slave; 900 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 && 901 dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) { 902 dev->sc_sync[target].state = SYNC_DONE; 903 dev->sc_sync[target].period = 0; 904 dev->sc_sync[target].offset = 0; 905 dev->sc_ds.sdtrolen = 0; 906 dev->sc_ds.sdtrilen = 0; 907 #ifdef DEBUG 908 if (siopsync_debug || 1) 909 printf ("target %d rejected sync, going asynchronous\n", target); 910 #endif 911 siop_inhibit_sync[target] = -1; 912 if ((regs->siop_sbcl & 7) == 6) { 913 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 914 return (0); 915 } 916 regs->siop_dcntl |= SIOP_DCNTL_STD; 917 return (0); 918 } 919 if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) || 920 sstat0 & SIOP_SSTAT0_UDC) { 921 #ifdef DEBUG 922 printf ("%s: target %d disconnected unexpectedly\n", 923 dev->sc_dev.dv_xname, target); 924 #endif 925 #if 0 926 siopabort (dev, regs, "siopchkintr"); 927 #endif 928 *status = STS_BUSY; 929 return 1; 930 } 931 if (dstat & SIOP_DSTAT_SIR &®s->siop_dsps == 0xfffb) { 932 #if 0 933 printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target); 934 #endif 935 #if 0 936 siopabort (dev, regs, "siopchkintr"); 937 #endif 938 *status = STS_BUSY; 939 return 1; 940 } 941 if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) { 942 #if 0 943 DCIAS(dev->sc_statuspa); 944 #else 945 dma_cachectl (&dev->sc_stat[0], 1); 946 #endif 947 printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n", 948 regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0], 949 regs->siop_sbcl); 950 siopreset (dev); 951 *status = -1; 952 return 1; 953 } 954 if (sstat0 & SIOP_SSTAT0_SGE) 955 printf ("SIOP: SCSI Gross Error\n"); 956 if (sstat0 & SIOP_SSTAT0_PAR) 957 printf ("SIOP: Parity Error\n"); 958 if (dstat & SIOP_DSTAT_OPC) 959 printf ("SIOP: Invalid SCRIPTS Opcode\n"); 960 bad_phase: 961 /* 962 * temporary panic for unhandled conditions 963 * displays various things about the 53C710 status and registers 964 * then panics. 965 * XXXX need to clean this up to print out the info, reset, and continue 966 */ 967 printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds); 968 printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", dev->sc_scriptspa, 969 dev->sc_dspa, kvtop(regs), regs->siop_dsp, 970 *((long *)®s->siop_dcmd)); 971 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n", 972 istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, 973 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 974 #ifdef DEBUG 975 if (siop_debug & 0x20) 976 panic("siopchkintr: **** temp ****"); 977 #endif 978 siopreset (dev); /* hard reset */ 979 *status = -1; 980 return 1; 981 } 982 983 /* 984 * SCSI 'immediate' command: issue a command to some SCSI device 985 * and get back an 'immediate' response (i.e., do programmed xfer 986 * to get the response data). 'cbuf' is a buffer containing a scsi 987 * command of length clen bytes. 'buf' is a buffer of length 'len' 988 * bytes for data. The transfer direction is determined by the device 989 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 990 * command must supply no data. 'xferphase' is the bus phase the 991 * caller expects to happen after the command is issued. It should 992 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 993 * 994 * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a 995 * lot easier to do than to use programmed I/O). 996 * 997 */ 998 int 999 siopicmd(dev, target, cbuf, clen, buf, len) 1000 struct siop_softc *dev; 1001 int target; 1002 void *cbuf; 1003 int clen; 1004 void *buf; 1005 int len; 1006 { 1007 siop_regmap_p regs = dev->sc_siopp; 1008 int i; 1009 int status; 1010 u_char istat; 1011 u_char dstat; 1012 u_char sstat0; 1013 1014 if (dev->sc_flags & SIOP_SELECTED) { 1015 printf ("siopicmd%d: bus busy\n", target); 1016 return -1; 1017 } 1018 regs->siop_sien = 0x00; /* disable SCSI and DMA interrupts */ 1019 regs->siop_dien = 0x00; 1020 dev->sc_flags |= SIOP_SELECTED; 1021 dev->sc_slave = target; 1022 #ifdef DEBUG 1023 if (siop_debug & 1) 1024 printf ("siopicmd: target %x cmd %02x ds %x\n", target, 1025 *((char *)cbuf), &dev->sc_ds); 1026 #endif 1027 siop_setup (dev, target, cbuf, clen, buf, len); 1028 1029 for (;;) { 1030 /* use cmd_wait values? */ 1031 i = siop_cmd_wait << 1; 1032 while (((istat = regs->siop_istat) & 1033 (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { 1034 if (--i <= 0) { 1035 printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n", 1036 target, *((char *)cbuf), 1037 regs->siop_sbcl, regs->siop_dsp, 1038 regs->siop_dsp - dev->sc_scriptspa, 1039 *((long *)®s->siop_dcmd), &dev->sc_ds); 1040 i = siop_cmd_wait << 2; 1041 /* XXXX need an upper limit and reset */ 1042 } 1043 delay(1); 1044 } 1045 dstat = regs->siop_dstat; 1046 sstat0 = regs->siop_sstat0; 1047 #ifdef DEBUG 1048 if (siop_debug & 1) { 1049 DCIAS(dev->sc_statuspa); /* XXX should just invalidate dev->sc_stat */ 1050 printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1051 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, 1052 dev->sc_stat[0], dev->sc_msg[0]); 1053 } 1054 #endif 1055 if (siop_checkintr(dev, istat, dstat, sstat0, &status)) { 1056 dev->sc_flags &= ~SIOP_SELECTED; 1057 return (status); 1058 } 1059 } 1060 } 1061 1062 int 1063 siopgo(dev, xs) 1064 struct siop_softc *dev; 1065 struct scsi_xfer *xs; 1066 { 1067 siop_regmap_p regs; 1068 int i; 1069 int nchain; 1070 int count, tcount; 1071 char *addr, *dmaend; 1072 1073 #ifdef DEBUG 1074 if (siop_debug & 1) 1075 printf ("%s: go ", dev->sc_dev.dv_xname); 1076 #if 0 1077 if ((cdb->cdb[1] & 1) == 0 && 1078 ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) || 1079 (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0 1080 && cdb->cdb[4] == 0))) 1081 panic ("siopgo: attempted write to block < 0x100"); 1082 #endif 1083 #endif 1084 #if 0 1085 cdb->cdb[1] |= unit << 5; 1086 #endif 1087 1088 if (dev->sc_flags & SIOP_SELECTED) { 1089 printf ("%s: bus busy\n", dev->sc_dev.dv_xname); 1090 return 1; 1091 } 1092 1093 dev->sc_flags |= SIOP_SELECTED | SIOP_DMA; 1094 dev->sc_slave = xs->sc_link->target; 1095 regs = dev->sc_siopp; 1096 /* enable SCSI and DMA interrupts */ 1097 regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE | 1098 SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; 1099 regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD | 1100 SIOP_DIEN_OPC; 1101 #ifdef DEBUG 1102 if (siop_debug & 1) 1103 printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd->opcode, &dev->sc_ds); 1104 #endif 1105 1106 siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen); 1107 1108 return (0); 1109 } 1110 1111 /* 1112 * Check for 53C710 interrupts 1113 */ 1114 1115 int 1116 siopintr (dev) 1117 register struct siop_softc *dev; 1118 { 1119 siop_regmap_p regs; 1120 register u_char istat, dstat, sstat0; 1121 int unit; 1122 int status; 1123 int found = 0; 1124 1125 regs = dev->sc_siopp; 1126 istat = dev->sc_istat; 1127 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 1128 return; 1129 if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED) 1130 return; /* doing non-interrupt I/O */ 1131 /* Got a valid interrupt on this device */ 1132 dstat = dev->sc_dstat; 1133 sstat0 = dev->sc_sstat0; 1134 dev->sc_istat = 0; 1135 #ifdef DEBUG 1136 if (siop_debug & 1) 1137 printf ("%s: intr istat %x dstat %x sstat0 %x\n", 1138 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1139 if ((dev->sc_flags & SIOP_DMA) == 0) { 1140 printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n", 1141 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1142 } 1143 #endif 1144 1145 #ifdef DEBUG 1146 if (siop_debug & 5) { 1147 DCIAS(dev->sc_statuspa); 1148 printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1149 unit, istat, dstat, sstat0, regs->siop_dsps, 1150 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 1151 } 1152 #endif 1153 if (siop_checkintr (dev, istat, dstat, sstat0, &status)) { 1154 #if 1 1155 regs->siop_sien = 0; 1156 regs->siop_dien = 0; 1157 if (status == 0xff) 1158 printf ("siopintr: status == 0xff\n"); 1159 #endif 1160 dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED); 1161 siop_scsidone(dev, dev->sc_stat[0]); 1162 } 1163 } 1164 1165 scsi_period_to_siop (dev, target) 1166 struct siop_softc *dev; 1167 { 1168 int period, offset, i, sxfer; 1169 1170 period = dev->sc_msg[4]; 1171 offset = dev->sc_msg[5]; 1172 sxfer = 0; 1173 if (offset <= SIOP_MAX_OFFSET) 1174 sxfer = offset; 1175 for (i = 0; i < sizeof (xxx) / 2; ++i) { 1176 if (period <= xxx[i].x) { 1177 sxfer |= xxx[i].y & 0x70; 1178 offset = xxx[i].y & 0x03; 1179 break; 1180 } 1181 } 1182 dev->sc_sync[target].period = sxfer; 1183 dev->sc_sync[target].offset = offset; 1184 #ifdef DEBUG 1185 printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset); 1186 #endif 1187 } 1188
Indexes created Wed Sep 24 02:09:48 GMT 2025