siop.c revision 1.17
1 /* $NetBSD: siop.c,v 1.17 1994/10/26 02:04:56 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)siop.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA 53C710 scsi adaptor driver 44 */ 45 46 /* need to know if any tapes have been configured */ 47 #include "st.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/buf.h> 53 #include <scsi/scsi_all.h> 54 #include <scsi/scsiconf.h> 55 #include <machine/cpu.h> 56 #include <amiga/amiga/custom.h> 57 #include <amiga/dev/siopreg.h> 58 #include <amiga/dev/siopvar.h> 59 60 extern u_int kvtop(); 61 62 /* 63 * SCSI delays 64 * In u-seconds, primarily for state changes on the SPC. 65 */ 66 #define SCSI_CMD_WAIT 500000 /* wait per step of 'immediate' cmds */ 67 #define SCSI_DATA_WAIT 500000 /* wait per data in/out step */ 68 #define SCSI_INIT_WAIT 500000 /* wait per step (both) during init */ 69 70 int siopicmd __P((struct siop_softc *, int, void *, int, void *, int)); 71 int siopgo __P((struct siop_softc *, struct scsi_xfer *)); 72 int siopgetsense __P((struct siop_softc *, struct scsi_xfer *)); 73 void siopabort __P((struct siop_softc *, siop_regmap_p, char *)); 74 void sioperror __P((struct siop_softc *, siop_regmap_p, u_char)); 75 void siopstart __P((struct siop_softc *)); 76 void siopreset __P((struct siop_softc *)); 77 void siopsetdelay __P((int)); 78 void siop_scsidone __P((struct siop_softc *, int)); 79 void siop_donextcmd __P((struct siop_softc *)); 80 int siopintr __P((struct siop_softc *)); 81 82 /* 53C710 script */ 83 unsigned long scripts[] = { 84 0x47000000, 0x000002d0, /* 000 - 0 */ 85 0x838b0000, 0x000000d0, /* 008 - 8 */ 86 0x7a1b1000, 0x00000000, /* 010 - 16 */ 87 0x828a0000, 0x00000088, /* 018 - 24 */ 88 0x9e020000, 0x0000ff01, /* 020 - 32 */ 89 0x72350000, 0x00000000, /* 028 - 40 */ 90 0x808c0000, 0x00000048, /* 030 - 48 */ 91 0x58000008, 0x00000000, /* 038 - 56 */ 92 0x1e000024, 0x00000024, /* 040 - 64 */ 93 0x838b0000, 0x00000090, /* 048 - 72 */ 94 0x1f00002c, 0x0000002c, /* 050 - 80 */ 95 0x838b0000, 0x00000080, /* 058 - 88 */ 96 0x868a0000, 0xffffffd0, /* 060 - 96 */ 97 0x838a0000, 0x00000070, /* 068 - 104 */ 98 0x878a0000, 0x00000158, /* 070 - 112 */ 99 0x80880000, 0x00000028, /* 078 - 120 */ 100 0x1e000004, 0x00000004, /* 080 - 128 */ 101 0x838b0000, 0x00000050, /* 088 - 136 */ 102 0x868a0000, 0xffffffe8, /* 090 - 144 */ 103 0x838a0000, 0x00000040, /* 098 - 152 */ 104 0x878a0000, 0x00000128, /* 0a0 - 160 */ 105 0x9a020000, 0x0000ff02, /* 0a8 - 168 */ 106 0x1a00000c, 0x0000000c, /* 0b0 - 176 */ 107 0x878b0000, 0x00000168, /* 0b8 - 184 */ 108 0x838a0000, 0x00000018, /* 0c0 - 192 */ 109 0x818a0000, 0x000000e8, /* 0c8 - 200 */ 110 0x808a0000, 0x000000b8, /* 0d0 - 208 */ 111 0x98080000, 0x0000ff03, /* 0d8 - 216 */ 112 0x1b000014, 0x00000014, /* 0e0 - 224 */ 113 0x72090000, 0x00000000, /* 0e8 - 232 */ 114 0x6a340000, 0x00000000, /* 0f0 - 240 */ 115 0x9f030000, 0x0000ff04, /* 0f8 - 248 */ 116 0x1f00001c, 0x0000001c, /* 100 - 256 */ 117 0x808c0007, 0x00000050, /* 108 - 264 */ 118 0x98040000, 0x0000ff26, /* 110 - 272 */ 119 0x60000040, 0x00000000, /* 118 - 280 */ 120 0x48000000, 0x00000000, /* 120 - 288 */ 121 0x7c1bef00, 0x00000000, /* 128 - 296 */ 122 0x72340000, 0x00000000, /* 130 - 304 */ 123 0x980c0002, 0x0000fffc, /* 138 - 312 */ 124 0x980c0008, 0x0000fffb, /* 140 - 320 */ 125 0x980c0018, 0x0000fffd, /* 148 - 328 */ 126 0x98040000, 0x0000fffe, /* 150 - 336 */ 127 0x98080000, 0x0000ff00, /* 158 - 344 */ 128 0x60000008, 0x00000000, /* 160 - 352 */ 129 0x98080000, 0x0000ff26, /* 168 - 360 */ 130 0x60000040, 0x00000000, /* 170 - 368 */ 131 0x828b0000, 0xffffff28, /* 178 - 376 */ 132 0x838b0000, 0xffffff58, /* 180 - 384 */ 133 0x878b0000, 0xffffff68, /* 188 - 392 */ 134 0x18000034, 0x00000034, /* 190 - 400 */ 135 0x808b0000, 0x000001c0, /* 198 - 408 */ 136 0x838b0000, 0xffffff38, /* 1a0 - 416 */ 137 0x878a0000, 0x000000d0, /* 1a8 - 424 */ 138 0x98080000, 0x0000ff05, /* 1b0 - 432 */ 139 0x19000034, 0x00000034, /* 1b8 - 440 */ 140 0x818b0000, 0x00000160, /* 1c0 - 448 */ 141 0x80880000, 0xffffffd0, /* 1c8 - 456 */ 142 0x1f00001c, 0x0000001c, /* 1d0 - 464 */ 143 0x808c0001, 0x00000018, /* 1d8 - 472 */ 144 0x980c0002, 0x0000ff08, /* 1e0 - 480 */ 145 0x808c0004, 0x00000020, /* 1e8 - 488 */ 146 0x98080000, 0x0000ff06, /* 1f0 - 496 */ 147 0x60000040, 0x00000000, /* 1f8 - 504 */ 148 0x1f00002c, 0x0000002c, /* 200 - 512 */ 149 0x98080000, 0x0000ff07, /* 208 - 520 */ 150 0x60000040, 0x00000000, /* 210 - 528 */ 151 0x48000000, 0x00000000, /* 218 - 536 */ 152 0x98080000, 0x0000ff09, /* 220 - 544 */ 153 0x1f00001c, 0x0000001c, /* 228 - 552 */ 154 0x808c0001, 0x00000018, /* 230 - 560 */ 155 0x980c0002, 0x0000ff10, /* 238 - 568 */ 156 0x808c0004, 0x00000020, /* 240 - 576 */ 157 0x98080000, 0x0000ff11, /* 248 - 584 */ 158 0x60000040, 0x00000000, /* 250 - 592 */ 159 0x1f00002c, 0x0000002c, /* 258 - 600 */ 160 0x98080000, 0x0000ff12, /* 260 - 608 */ 161 0x60000040, 0x00000000, /* 268 - 616 */ 162 0x48000000, 0x00000000, /* 270 - 624 */ 163 0x98080000, 0x0000ff13, /* 278 - 632 */ 164 0x1f00001c, 0x0000001c, /* 280 - 640 */ 165 0x808c0001, 0x00000018, /* 288 - 648 */ 166 0x980c0002, 0x0000ff14, /* 290 - 656 */ 167 0x808c0004, 0x00000020, /* 298 - 664 */ 168 0x98080000, 0x0000ff15, /* 2a0 - 672 */ 169 0x60000040, 0x00000000, /* 2a8 - 680 */ 170 0x1f00002c, 0x0000002c, /* 2b0 - 688 */ 171 0x98080000, 0x0000ff16, /* 2b8 - 696 */ 172 0x60000040, 0x00000000, /* 2c0 - 704 */ 173 0x48000000, 0x00000000, /* 2c8 - 712 */ 174 0x98080000, 0x0000ff17, /* 2d0 - 720 */ 175 0x54000000, 0x00000040, /* 2d8 - 728 */ 176 0x9f030000, 0x0000ff18, /* 2e0 - 736 */ 177 0x1f00001c, 0x0000001c, /* 2e8 - 744 */ 178 0x990b0000, 0x0000ff19, /* 2f0 - 752 */ 179 0x980a0000, 0x0000ff20, /* 2f8 - 760 */ 180 0x9f0a0000, 0x0000ff21, /* 300 - 768 */ 181 0x9b0a0000, 0x0000ff22, /* 308 - 776 */ 182 0x9e0a0000, 0x0000ff23, /* 310 - 784 */ 183 0x98080000, 0x0000ff24, /* 318 - 792 */ 184 0x98080000, 0x0000ff25, /* 320 - 800 */ 185 0x76100800, 0x00000000, /* 328 - 808 */ 186 0x80840700, 0x00000008, /* 330 - 816 */ 187 0x7e110100, 0x00000000, /* 338 - 824 */ 188 0x6a100000, 0x00000000, /* 340 - 832 */ 189 0x19000034, 0x00000034, /* 348 - 840 */ 190 0x818b0000, 0xffffffd0, /* 350 - 848 */ 191 0x98080000, 0x0000ff27, /* 358 - 856 */ 192 0x76100800, 0x00000000, /* 360 - 864 */ 193 0x80840700, 0x00000008, /* 368 - 872 */ 194 0x7e110100, 0x00000000, /* 370 - 880 */ 195 0x6a100000, 0x00000000, /* 378 - 888 */ 196 0x18000034, 0x00000034, /* 380 - 896 */ 197 0x808b0000, 0xffffffd0, /* 388 - 904 */ 198 0x98080000, 0x0000ff27 /* 390 - 912 */ 199 }; 200 201 #define Ent_msgout 0x00000018 202 #define Ent_cmd 0x000000a8 203 #define Ent_status 0x000000e0 204 #define Ent_msgin 0x000000f8 205 #define Ent_dataout 0x00000190 206 #define Ent_datain 0x000001b8 207 208 /* default to not inhibit sync negotiation on any drive */ 209 /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */ 210 u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0 }; /* initialize, so patchable */ 211 int siop_no_dma = 0; 212 213 int siop_reset_delay = 2000; /* delay after reset, in milleseconds */ 214 int siop_sync_period = 50; /* synchronous transfer period, in nanoseconds */ 215 216 int siop_cmd_wait = SCSI_CMD_WAIT; 217 int siop_data_wait = SCSI_DATA_WAIT; 218 int siop_init_wait = SCSI_INIT_WAIT; 219 220 static struct { 221 unsigned char x; /* period from sync request message */ 222 unsigned char y; /* siop_period << 4 | sbcl */ 223 } xxx[] = { 224 {0x0f, 0x01}, 225 {0x13, 0x11}, 226 {0x17, 0x21}, 227 /* {0x17, 0x02}, */ 228 {0x1b, 0x31}, 229 {0x1d, 0x12}, 230 {0x1e, 0x41}, 231 /* {0x1e, 0x03}, */ 232 {0x22, 0x51}, 233 {0x23, 0x22}, 234 {0x26, 0x61}, 235 /* {0x26, 0x13}, */ 236 {0x29, 0x32}, 237 {0x2a, 0x71}, 238 {0x2d, 0x23}, 239 {0x2e, 0x42}, 240 {0x34, 0x52}, 241 {0x35, 0x33}, 242 {0x3a, 0x62}, 243 {0x3c, 0x43}, 244 {0x40, 0x72}, 245 {0x44, 0x53}, 246 {0x4b, 0x63}, 247 {0x53, 0x73} 248 }; 249 250 #ifdef DEBUG 251 #define QPRINTF(a) if (siop_debug > 1) printf a 252 /* 253 * 0x01 - full debug 254 * 0x02 - DMA chaining 255 * 0x04 - siopintr 256 * 0x08 - phase mismatch 257 * 0x10 - panic on phase mismatch 258 * 0x20 - panic on unhandled exceptions 259 */ 260 int siop_debug = 0; 261 int siopsync_debug = 0; 262 int siopdma_hits = 0; 263 int siopdma_misses = 0; 264 int siopchain_ints = 0; 265 #else 266 #define QPRINTF(a) 267 #endif 268 269 270 /* 271 * default minphys routine for siop based controllers 272 */ 273 void 274 siop_minphys(bp) 275 struct buf *bp; 276 { 277 /* 278 * no max transfer at this level 279 */ 280 } 281 282 /* 283 * must be used 284 */ 285 u_int 286 siop_adinfo() 287 { 288 /* 289 * one request at a time please 290 */ 291 return(1); 292 } 293 294 /* 295 * used by specific siop controller 296 * 297 * it appears that the higher level code does nothing with LUN's 298 * so I will too. I could plug it in, however so could they 299 * in scsi_scsi_cmd(). 300 */ 301 int 302 siop_scsicmd(xs) 303 struct scsi_xfer *xs; 304 { 305 struct siop_pending *pendp; 306 struct siop_softc *dev; 307 struct scsi_link *slp; 308 int flags, s; 309 310 slp = xs->sc_link; 311 dev = slp->adapter_softc; 312 flags = xs->flags; 313 314 if (flags & SCSI_DATA_UIO) 315 panic("siop: scsi data uio requested"); 316 317 if (dev->sc_xs && flags & SCSI_NOMASK) 318 panic("siop_scsicmd: busy"); 319 320 s = splbio(); 321 pendp = &dev->sc_xsstore[slp->target][slp->lun]; 322 if (pendp->xs) { 323 splx(s); 324 return(TRY_AGAIN_LATER); 325 } 326 327 if (dev->sc_xs) { 328 pendp->xs = xs; 329 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 330 splx(s); 331 return(SUCCESSFULLY_QUEUED); 332 } 333 pendp->xs = NULL; 334 dev->sc_xs = xs; 335 splx(s); 336 337 /* 338 * nothing is pending do it now. 339 */ 340 siop_donextcmd(dev); 341 342 if (flags & SCSI_NOMASK) 343 return(COMPLETE); 344 return(SUCCESSFULLY_QUEUED); 345 } 346 347 /* 348 * entered with dev->sc_xs pointing to the next xfer to perform 349 */ 350 void 351 siop_donextcmd(dev) 352 struct siop_softc *dev; 353 { 354 struct scsi_xfer *xs; 355 struct scsi_link *slp; 356 int flags, phase, stat; 357 358 xs = dev->sc_xs; 359 slp = xs->sc_link; 360 flags = xs->flags; 361 362 #if 0 363 if (flags & SCSI_DATA_IN) 364 phase = DATA_IN_PHASE; 365 else if (flags & SCSI_DATA_OUT) 366 phase = DATA_OUT_PHASE; 367 else 368 phase = STATUS_PHASE; 369 #endif 370 371 if (flags & SCSI_RESET) 372 siopreset(dev); 373 374 dev->sc_stat[0] = -1; 375 #if 0 376 if (phase == STATUS_PHASE || flags & SCSI_NOMASK) 377 #else 378 if (flags & SCSI_NOMASK || siop_no_dma) 379 #endif 380 stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen, 381 xs->data, xs->datalen/*, phase*/); 382 else if (siopgo(dev, xs) == 0) 383 return; 384 else 385 stat = dev->sc_stat[0]; 386 387 siop_scsidone(dev, stat); 388 } 389 390 void 391 siop_scsidone(dev, stat) 392 struct siop_softc *dev; 393 int stat; 394 { 395 struct siop_pending *pendp; 396 struct scsi_xfer *xs; 397 int s, donext; 398 399 xs = dev->sc_xs; 400 #ifdef DIAGNOSTIC 401 if (xs == NULL) 402 panic("siop_scsidone"); 403 #endif 404 /* 405 * is this right? 406 */ 407 xs->status = stat; 408 409 if (stat == 0 || xs->flags & SCSI_ERR_OK) 410 xs->resid = 0; 411 else { 412 switch(stat) { 413 case SCSI_CHECK: 414 if (stat = siopgetsense(dev, xs)) 415 goto bad_sense; 416 xs->error = XS_SENSE; 417 break; 418 case SCSI_BUSY: 419 xs->error = XS_BUSY; 420 break; 421 bad_sense: 422 default: 423 xs->error = XS_DRIVER_STUFFUP; 424 QPRINTF(("siop_scsicmd() bad %x\n", stat)); 425 break; 426 } 427 } 428 xs->flags |= ITSDONE; 429 430 /* 431 * grab next command before scsi_done() 432 * this way no single device can hog scsi resources. 433 */ 434 s = splbio(); 435 pendp = dev->sc_xslist.tqh_first; 436 if (pendp == NULL) { 437 donext = 0; 438 dev->sc_xs = NULL; 439 } else { 440 donext = 1; 441 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 442 dev->sc_xs = pendp->xs; 443 pendp->xs = NULL; 444 } 445 splx(s); 446 scsi_done(xs); 447 448 if (donext) 449 siop_donextcmd(dev); 450 } 451 452 int 453 siopgetsense(dev, xs) 454 struct siop_softc *dev; 455 struct scsi_xfer *xs; 456 { 457 struct scsi_sense rqs; 458 struct scsi_link *slp; 459 int stat; 460 461 slp = xs->sc_link; 462 463 rqs.op_code = REQUEST_SENSE; 464 rqs.byte2 = slp->lun << 5; 465 #ifdef not_yet 466 rqs.length = xs->req_sense_length ? xs->req_sense_length : 467 sizeof(xs->sense); 468 #else 469 rqs.length = sizeof(xs->sense); 470 #endif 471 if (rqs.length > sizeof (xs->sense)) 472 rqs.length = sizeof (xs->sense); 473 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 474 475 return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense, 476 rqs.length)); 477 } 478 479 void 480 siopabort(dev, regs, where) 481 register struct siop_softc *dev; 482 siop_regmap_p regs; 483 char *where; 484 { 485 486 printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n", 487 dev->sc_dev.dv_xname, 488 where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl); 489 490 if (dev->sc_flags & SIOP_SELECTED) { 491 #ifdef TODO 492 SET_SBIC_cmd (regs, SBIC_CMD_ABORT); 493 WAIT_CIP (regs); 494 495 GET_SBIC_asr (regs, asr); 496 if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) 497 { 498 /* ok, get more drastic.. */ 499 500 SET_SBIC_cmd (regs, SBIC_CMD_RESET); 501 delay(25); 502 SBIC_WAIT(regs, SBIC_ASR_INT, 0); 503 GET_SBIC_csr (regs, csr); /* clears interrupt also */ 504 505 dev->sc_flags &= ~SIOP_SELECTED; 506 return; 507 } 508 509 do 510 { 511 SBIC_WAIT (regs, SBIC_ASR_INT, 0); 512 GET_SBIC_csr (regs, csr); 513 } 514 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) 515 && (csr != SBIC_CSR_CMD_INVALID)); 516 #endif 517 518 /* lets just hope it worked.. */ 519 dev->sc_flags &= ~SIOP_SELECTED; 520 } 521 } 522 523 /* 524 * XXX Set/reset long delays. 525 * 526 * if delay == 0, reset default delays 527 * if delay < 0, set both delays to default long initialization values 528 * if delay > 0, set both delays to this value 529 * 530 * Used when a devices is expected to respond slowly (e.g. during 531 * initialization). 532 */ 533 void 534 siop_delay(delay) 535 int delay; 536 { 537 static int saved_cmd_wait, saved_data_wait; 538 539 if (delay) { 540 saved_cmd_wait = siop_cmd_wait; 541 saved_data_wait = siop_data_wait; 542 if (delay > 0) 543 siop_cmd_wait = siop_data_wait = delay; 544 else 545 siop_cmd_wait = siop_data_wait = siop_init_wait; 546 } else { 547 siop_cmd_wait = saved_cmd_wait; 548 siop_data_wait = saved_data_wait; 549 } 550 } 551 552 void 553 siopinitialize(dev) 554 struct siop_softc *dev; 555 { 556 /* 557 * Need to check that scripts is on a long word boundary 558 * and that DS is on a long word boundary. 559 * Also need to verify that dev doesn't non-contiguous 560 * physical pages. 561 */ 562 dev->sc_scriptspa = kvtop(scripts); 563 dev->sc_dspa = kvtop(&dev->sc_ds); 564 dev->sc_lunpa = kvtop(&dev->sc_lun); 565 dev->sc_statuspa = kvtop(&dev->sc_stat[0]); 566 dev->sc_msgpa = kvtop(&dev->sc_msg[0]); 567 siopreset (dev); 568 } 569 570 void 571 siopreset(dev) 572 struct siop_softc *dev; 573 { 574 siop_regmap_p regs; 575 u_int i, s; 576 u_char my_id, csr; 577 578 regs = dev->sc_siopp; 579 580 if (dev->sc_flags & SIOP_ALIVE) 581 siopabort(dev, regs, "reset"); 582 583 printf("%s: ", dev->sc_dev.dv_xname); /* XXXX */ 584 585 s = splbio(); 586 my_id = 7; 587 588 /* 589 * Reset the chip 590 * XXX - is this really needed? 591 */ 592 regs->siop_sien &= ~SIOP_SIEN_RST; 593 regs->siop_scntl1 |= SIOP_SCNTL1_RST; 594 for (i = 0; i < 1000; ++i) 595 ; 596 regs->siop_scntl1 &= ~SIOP_SCNTL1_RST; 597 regs->siop_sien |= SIOP_SIEN_RST; 598 599 /* 600 * Set up various chip parameters 601 */ 602 regs->siop_istat = 0x40; 603 for (i = 0; i < 1000; ++i) 604 ; 605 regs->siop_istat = 0x00; 606 regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG; 607 regs->siop_dcntl = dev->sc_clock_freq & 0xff; 608 regs->siop_dmode = 0x80; /* burst length = 4 */ 609 regs->siop_sien = 0x00; /* don't enable interrupts yet */ 610 regs->siop_dien = 0x00; /* don't enable interrupts yet */ 611 regs->siop_scid = 1 << my_id; 612 regs->siop_dwt = 0x00; 613 regs->siop_ctest0 |= 0x20; /* Enable Active Negation ?? */ 614 regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff; 615 616 /* will need to re-negotiate sync xfers */ 617 bzero(&dev->sc_sync, sizeof (dev->sc_sync)); 618 619 splx (s); 620 621 delay (siop_reset_delay * 1000); 622 printf("siop id %d reset\n", my_id); 623 dev->sc_flags |= SIOP_ALIVE; 624 dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA); 625 } 626 627 /* 628 * Setup Data Storage for 53C710 and start SCRIPTS processing 629 */ 630 631 void 632 siop_setup (dev, target, cbuf, clen, buf, len) 633 struct siop_softc *dev; 634 int target; 635 u_char *cbuf; 636 int clen; 637 u_char *buf; 638 int len; 639 { 640 siop_regmap_p regs = dev->sc_siopp; 641 int i; 642 int nchain; 643 int count, tcount; 644 char *addr, *dmaend; 645 646 dev->sc_istat = 0; 647 dev->sc_lun = 0x80; /* XXX */ 648 dev->sc_stat[0] = -1; 649 dev->sc_msg[0] = -1; 650 dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8); 651 dev->sc_ds.idlen = 1; 652 dev->sc_ds.idbuf = (char *) dev->sc_lunpa; 653 dev->sc_ds.cmdlen = clen; 654 dev->sc_ds.cmdbuf = (char *) kvtop(cbuf); 655 dev->sc_ds.stslen = 1; 656 dev->sc_ds.stsbuf = (char *) dev->sc_statuspa; 657 dev->sc_ds.msglen = 1; 658 dev->sc_ds.msgbuf = (char *) dev->sc_msgpa; 659 dev->sc_ds.sdtrolen = 0; 660 dev->sc_ds.sdtrilen = 0; 661 bzero(&dev->sc_ds.chain, sizeof (dev->sc_ds.chain)); 662 663 if (dev->sc_sync[target].state == SYNC_START) { 664 if (siop_inhibit_sync[target]) { 665 dev->sc_sync[target].state = SYNC_DONE; 666 dev->sc_sync[target].offset = 0; 667 dev->sc_sync[target].period = 0; 668 #ifdef DEBUG 669 if (siopsync_debug) 670 printf ("Forcing target %d asynchronous\n", target); 671 #endif 672 } 673 else { 674 dev->sc_msg[1] = MSG_IDENTIFY; 675 dev->sc_msg[2] = MSG_EXT_MESSAGE; 676 dev->sc_msg[3] = 3; 677 dev->sc_msg[4] = MSG_SYNC_REQ; 678 dev->sc_msg[5] = siop_sync_period / 4; 679 dev->sc_msg[6] = SIOP_MAX_OFFSET; 680 dev->sc_ds.sdtrolen = 6; 681 dev->sc_ds.sdtrilen = 6; 682 dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) (dev->sc_msgpa + 1); 683 dev->sc_sync[target].state = SYNC_SENT; 684 #ifdef DEBUG 685 if (siopsync_debug) 686 printf ("Sending sync request to target %d\n", target); 687 #endif 688 } 689 } 690 691 /* 692 * If length is > 1 page, check for consecutive physical pages 693 * Need to set up chaining if not 694 */ 695 nchain = 0; 696 count = len; 697 addr = buf; 698 dmaend = NULL; 699 while (count > 0) { 700 dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr); 701 if (count < (tcount = NBPG - ((int) addr & PGOFSET))) 702 tcount = count; 703 dev->sc_ds.chain[nchain].datalen = tcount; 704 addr += tcount; 705 count -= tcount; 706 if (dev->sc_ds.chain[nchain].databuf == dmaend) { 707 dmaend += dev->sc_ds.chain[nchain].datalen; 708 dev->sc_ds.chain[--nchain].datalen += tcount; 709 #ifdef DEBUG 710 ++siopdma_hits; 711 #endif 712 } 713 else { 714 dmaend = dev->sc_ds.chain[nchain].databuf + 715 dev->sc_ds.chain[nchain].datalen; 716 dev->sc_ds.chain[nchain].datalen = tcount; 717 #ifdef DEBUG 718 if (nchain) /* Don't count miss on first one */ 719 ++siopdma_misses; 720 #endif 721 } 722 ++nchain; 723 if (nchain < DMAMAXIO) /* force error if buffer too small */ 724 dev->sc_ds.chain[nchain].datalen = 0; 725 } 726 #ifdef DEBUG 727 if (nchain != 1 && len != 0 && siop_debug & 3) { 728 printf ("DMA chaining set: %d\n", nchain); 729 for (i = 0; i < nchain; ++i) { 730 printf (" [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf, 731 dev->sc_ds.chain[i].datalen); 732 } 733 } 734 #endif 735 736 regs->siop_sbcl = dev->sc_sync[target].offset; 737 if (dev->sc_ds.sdtrolen) 738 regs->siop_scratch = regs->siop_scratch | 0x100; 739 else 740 regs->siop_scratch = regs->siop_scratch & ~0xff00; 741 regs->siop_dsa = dev->sc_dspa; 742 /* push data case on things the 53c710 needs to access */ 743 dma_cachectl (dev, sizeof (struct siop_softc)); 744 dma_cachectl (cbuf, clen); 745 if (buf != NULL && len != 0) 746 dma_cachectl (buf, len); 747 regs->siop_dsp = dev->sc_scriptspa; 748 } 749 750 /* 751 * Process a DMA or SCSI interrupt from the 53C710 SIOP 752 */ 753 754 int 755 siop_checkintr(dev, istat, dstat, sstat0, status) 756 struct siop_softc *dev; 757 u_char istat; 758 u_char dstat; 759 u_char sstat0; 760 int *status; 761 { 762 siop_regmap_p regs = dev->sc_siopp; 763 int target; 764 765 regs->siop_ctest8 |= 0x04; 766 while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0) 767 ; 768 regs->siop_ctest8 &= ~0x04; 769 #ifdef DEBUG 770 if (siop_debug & 1) { 771 DCIAS(dev->sc_statuspa); /* XXX */ 772 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 773 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 774 } 775 #endif 776 if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 || 777 regs->siop_dsps == 0xfffc)) { 778 /* Normal completion status, or check condition */ 779 if (regs->siop_dsa != dev->sc_dspa) { 780 printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa, 781 dev->sc_dspa); 782 panic("*** siop DSA invalid ***"); 783 } 784 target = dev->sc_slave; 785 if (dev->sc_sync[target].state == SYNC_SENT) { 786 #ifdef DEBUG 787 if (siopsync_debug) 788 printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", 789 dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3], 790 dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]); 791 #endif 792 if (dev->sc_msg[0] == MSG_REJECT) 793 printf ("target %d sync request was rejected\n", 794 target); 795 dev->sc_sync[target].state = SYNC_DONE; 796 dev->sc_sync[target].period = 0; 797 dev->sc_sync[target].offset = 0; 798 if (dev->sc_msg[1] == MSG_EXT_MESSAGE && 799 dev->sc_msg[2] == 3 && 800 dev->sc_msg[3] == MSG_SYNC_REQ && 801 dev->sc_msg[5] != 0) { 802 if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) { 803 #ifdef DEBUG 804 printf ("%d: target %d wanted %dns period\n", 805 dev->sc_dev.dv_xname, target, 806 dev->sc_msg[4] * 4); 807 #endif 808 /* 809 * Kludge for Maxtor XT8580S 810 * It accepts whatever we request, even 811 * though it won't work. So we ask for 812 * a short period than we can handle. If 813 * the device says it can do it, use 208ns. 814 * If the device says it can do less than 815 * 100ns, then we limit it to 100ns. 816 */ 817 if (dev->sc_msg[4] == siop_sync_period / 4) 818 dev->sc_msg[4] = 208 / 4; 819 else 820 dev->sc_msg[4] = 100 / 4; 821 } 822 printf ("%s: target %d now synchronous, period=%dns, offset=%d\n", 823 dev->sc_dev.dv_xname, target, 824 dev->sc_msg[4] * 4, dev->sc_msg[5]); 825 scsi_period_to_siop (dev, target); 826 } 827 } 828 #if 0 829 DCIAS(dev->sc_statuspa); /* XXX */ 830 #else 831 dma_cachectl(&dev->sc_stat[0], 1); 832 #endif 833 *status = dev->sc_stat[0]; 834 return 1; 835 } 836 if (sstat0 & SIOP_SSTAT0_M_A) { /* Phase mismatch */ 837 #ifdef DEBUG 838 if (siop_debug & 9) 839 printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl, 840 regs->siop_dsp - dev->sc_scriptspa); 841 if (siop_debug & 0x10) 842 panic ("53c710 phase mismatch"); 843 #endif 844 if ((regs->siop_sbcl & SIOP_REQ) == 0) 845 printf ("Phase mismatch: REQ not asserted! %02x\n", 846 regs->siop_sbcl); 847 switch (regs->siop_sbcl & 7) { 848 /* 849 * For data out and data in phase, check for DMA chaining 850 */ 851 852 /* 853 * for message in, check for possible reject for sync request 854 */ 855 case 0: 856 regs->siop_dsp = dev->sc_scriptspa + Ent_dataout; 857 break; 858 case 1: 859 regs->siop_dsp = dev->sc_scriptspa + Ent_datain; 860 break; 861 case 2: 862 regs->siop_dsp = dev->sc_scriptspa + Ent_cmd; 863 break; 864 case 3: 865 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 866 break; 867 case 6: 868 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 869 break; 870 case 7: 871 regs->siop_dsp = dev->sc_scriptspa + Ent_msgin; 872 break; 873 default: 874 goto bad_phase; 875 } 876 return 0; 877 } 878 if (sstat0 & SIOP_SSTAT0_STO) { /* Select timed out */ 879 *status = -1; 880 return 1; 881 } 882 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 && 883 (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) { 884 printf ("DMA chaining failed\n"); 885 siopreset (dev); 886 *status = -1; 887 return 1; 888 } 889 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) { 890 #ifdef DEBUG 891 if (siop_debug & 3) 892 printf ("DMA chaining completed: dsa %x dnad %x addr %x\n", 893 regs->siop_dsa, regs->siop_dnad, regs->siop_addr); 894 ++siopchain_ints; 895 #endif 896 regs->siop_dsa = dev->sc_dspa; 897 regs->siop_dsp = dev->sc_scriptspa + Ent_status; 898 return 0; 899 } 900 target = dev->sc_slave; 901 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 && 902 dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) { 903 dev->sc_sync[target].state = SYNC_DONE; 904 dev->sc_sync[target].period = 0; 905 dev->sc_sync[target].offset = 0; 906 dev->sc_ds.sdtrolen = 0; 907 dev->sc_ds.sdtrilen = 0; 908 #ifdef DEBUG 909 if (siopsync_debug || 1) 910 printf ("target %d rejected sync, going asynchronous\n", target); 911 #endif 912 siop_inhibit_sync[target] = -1; 913 if ((regs->siop_sbcl & 7) == 6) { 914 regs->siop_dsp = dev->sc_scriptspa + Ent_msgout; 915 return (0); 916 } 917 regs->siop_dcntl |= SIOP_DCNTL_STD; 918 return (0); 919 } 920 if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) || 921 sstat0 & SIOP_SSTAT0_UDC) { 922 #ifdef DEBUG 923 printf ("%s: target %d disconnected unexpectedly\n", 924 dev->sc_dev.dv_xname, target); 925 #endif 926 #if 0 927 siopabort (dev, regs, "siopchkintr"); 928 #endif 929 *status = STS_BUSY; 930 return 1; 931 } 932 if (dstat & SIOP_DSTAT_SIR &®s->siop_dsps == 0xfffb) { 933 #if 0 934 printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target); 935 #endif 936 #if 0 937 siopabort (dev, regs, "siopchkintr"); 938 #endif 939 *status = STS_BUSY; 940 return 1; 941 } 942 if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) { 943 #if 0 944 DCIAS(dev->sc_statuspa); 945 #else 946 dma_cachectl (&dev->sc_stat[0], 1); 947 #endif 948 printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n", 949 regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0], 950 regs->siop_sbcl); 951 siopreset (dev); 952 *status = -1; 953 return 1; 954 } 955 if (sstat0 & SIOP_SSTAT0_SGE) 956 printf ("SIOP: SCSI Gross Error\n"); 957 if (sstat0 & SIOP_SSTAT0_PAR) 958 printf ("SIOP: Parity Error\n"); 959 if (dstat & SIOP_DSTAT_OPC) 960 printf ("SIOP: Invalid SCRIPTS Opcode\n"); 961 bad_phase: 962 /* 963 * temporary panic for unhandled conditions 964 * displays various things about the 53C710 status and registers 965 * then panics. 966 * XXXX need to clean this up to print out the info, reset, and continue 967 */ 968 printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds); 969 printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", dev->sc_scriptspa, 970 dev->sc_dspa, kvtop(regs), regs->siop_dsp, 971 *((long *)®s->siop_dcmd)); 972 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n", 973 istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, 974 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 975 #ifdef DEBUG 976 if (siop_debug & 0x20) 977 panic("siopchkintr: **** temp ****"); 978 #endif 979 siopreset (dev); /* hard reset */ 980 *status = -1; 981 return 1; 982 } 983 984 /* 985 * SCSI 'immediate' command: issue a command to some SCSI device 986 * and get back an 'immediate' response (i.e., do programmed xfer 987 * to get the response data). 'cbuf' is a buffer containing a scsi 988 * command of length clen bytes. 'buf' is a buffer of length 'len' 989 * bytes for data. The transfer direction is determined by the device 990 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 991 * command must supply no data. 'xferphase' is the bus phase the 992 * caller expects to happen after the command is issued. It should 993 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 994 * 995 * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a 996 * lot easier to do than to use programmed I/O). 997 * 998 */ 999 int 1000 siopicmd(dev, target, cbuf, clen, buf, len) 1001 struct siop_softc *dev; 1002 int target; 1003 void *cbuf; 1004 int clen; 1005 void *buf; 1006 int len; 1007 { 1008 siop_regmap_p regs = dev->sc_siopp; 1009 int i; 1010 int status; 1011 u_char istat; 1012 u_char dstat; 1013 u_char sstat0; 1014 1015 if (dev->sc_flags & SIOP_SELECTED) { 1016 printf ("siopicmd%d: bus busy\n", target); 1017 return -1; 1018 } 1019 regs->siop_sien = 0x00; /* disable SCSI and DMA interrupts */ 1020 regs->siop_dien = 0x00; 1021 dev->sc_flags |= SIOP_SELECTED; 1022 dev->sc_slave = target; 1023 #ifdef DEBUG 1024 if (siop_debug & 1) 1025 printf ("siopicmd: target %x cmd %02x ds %x\n", target, 1026 *((char *)cbuf), &dev->sc_ds); 1027 #endif 1028 siop_setup (dev, target, cbuf, clen, buf, len); 1029 1030 for (;;) { 1031 /* use cmd_wait values? */ 1032 i = siop_cmd_wait << 1; 1033 while (((istat = regs->siop_istat) & 1034 (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { 1035 if (--i <= 0) { 1036 printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n", 1037 target, *((char *)cbuf), 1038 regs->siop_sbcl, regs->siop_dsp, 1039 regs->siop_dsp - dev->sc_scriptspa, 1040 *((long *)®s->siop_dcmd), &dev->sc_ds); 1041 i = siop_cmd_wait << 2; 1042 /* XXXX need an upper limit and reset */ 1043 } 1044 delay(1); 1045 } 1046 dstat = regs->siop_dstat; 1047 sstat0 = regs->siop_sstat0; 1048 #ifdef DEBUG 1049 if (siop_debug & 1) { 1050 DCIAS(dev->sc_statuspa); /* XXX should just invalidate dev->sc_stat */ 1051 printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1052 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, 1053 dev->sc_stat[0], dev->sc_msg[0]); 1054 } 1055 #endif 1056 if (siop_checkintr(dev, istat, dstat, sstat0, &status)) { 1057 dev->sc_flags &= ~SIOP_SELECTED; 1058 return (status); 1059 } 1060 } 1061 } 1062 1063 int 1064 siopgo(dev, xs) 1065 struct siop_softc *dev; 1066 struct scsi_xfer *xs; 1067 { 1068 siop_regmap_p regs; 1069 int i; 1070 int nchain; 1071 int count, tcount; 1072 char *addr, *dmaend; 1073 1074 #ifdef DEBUG 1075 if (siop_debug & 1) 1076 printf ("%s: go ", dev->sc_dev.dv_xname); 1077 #if 0 1078 if ((cdb->cdb[1] & 1) == 0 && 1079 ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) || 1080 (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0 1081 && cdb->cdb[4] == 0))) 1082 panic ("siopgo: attempted write to block < 0x100"); 1083 #endif 1084 #endif 1085 #if 0 1086 cdb->cdb[1] |= unit << 5; 1087 #endif 1088 1089 if (dev->sc_flags & SIOP_SELECTED) { 1090 printf ("%s: bus busy\n", dev->sc_dev.dv_xname); 1091 return 1; 1092 } 1093 1094 dev->sc_flags |= SIOP_SELECTED | SIOP_DMA; 1095 dev->sc_slave = xs->sc_link->target; 1096 regs = dev->sc_siopp; 1097 /* enable SCSI and DMA interrupts */ 1098 regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE | 1099 SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; 1100 regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD | 1101 SIOP_DIEN_OPC; 1102 #ifdef DEBUG 1103 if (siop_debug & 1) 1104 printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd->opcode, &dev->sc_ds); 1105 #endif 1106 1107 siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen); 1108 1109 return (0); 1110 } 1111 1112 /* 1113 * Check for 53C710 interrupts 1114 */ 1115 1116 int 1117 siopintr (dev) 1118 register struct siop_softc *dev; 1119 { 1120 siop_regmap_p regs; 1121 register u_char istat, dstat, sstat0; 1122 int unit; 1123 int status; 1124 int found = 0; 1125 1126 regs = dev->sc_siopp; 1127 istat = dev->sc_istat; 1128 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 1129 return; 1130 if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED) 1131 return; /* doing non-interrupt I/O */ 1132 /* Got a valid interrupt on this device */ 1133 dstat = dev->sc_dstat; 1134 sstat0 = dev->sc_sstat0; 1135 dev->sc_istat = 0; 1136 #ifdef DEBUG 1137 if (siop_debug & 1) 1138 printf ("%s: intr istat %x dstat %x sstat0 %x\n", 1139 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1140 if ((dev->sc_flags & SIOP_DMA) == 0) { 1141 printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n", 1142 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1143 } 1144 #endif 1145 1146 #ifdef DEBUG 1147 if (siop_debug & 5) { 1148 DCIAS(dev->sc_statuspa); 1149 printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1150 unit, istat, dstat, sstat0, regs->siop_dsps, 1151 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 1152 } 1153 #endif 1154 if (siop_checkintr (dev, istat, dstat, sstat0, &status)) { 1155 #if 1 1156 regs->siop_sien = 0; 1157 regs->siop_dien = 0; 1158 if (status == 0xff) 1159 printf ("siopintr: status == 0xff\n"); 1160 #endif 1161 dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED); 1162 siop_scsidone(dev, dev->sc_stat[0]); 1163 } 1164 } 1165 1166 scsi_period_to_siop (dev, target) 1167 struct siop_softc *dev; 1168 { 1169 int period, offset, i, sxfer; 1170 1171 period = dev->sc_msg[4]; 1172 offset = dev->sc_msg[5]; 1173 sxfer = 0; 1174 if (offset <= SIOP_MAX_OFFSET) 1175 sxfer = offset; 1176 for (i = 0; i < sizeof (xxx) / 2; ++i) { 1177 if (period <= xxx[i].x) { 1178 sxfer |= xxx[i].y & 0x70; 1179 offset = xxx[i].y & 0x03; 1180 break; 1181 } 1182 } 1183 dev->sc_sync[target].period = sxfer; 1184 dev->sc_sync[target].offset = offset; 1185 #ifdef DEBUG 1186 printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset); 1187 #endif 1188 } 1189
Indexes created Tue Sep 23 21:09:50 GMT 2025