siop.c revision 1.8
1 /* 2 * Copyright (c) 1994 Michael L. Hitch 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Van Jacobson of Lawrence Berkeley Laboratory. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)siop.c 7.5 (Berkeley) 5/4/91 38 * $Id: siop.c,v 1.8 1994/05/12 05:57:23 chopps Exp $ 39 */ 40 41 /* 42 * AMIGA 53C710 scsi adaptor driver 43 */ 44 45 /* need to know if any tapes have been configured */ 46 #include "st.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/buf.h> 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 #include <machine/cpu.h> 55 #include <amiga/amiga/custom.h> 56 #include <amiga/dev/siopreg.h> 57 #include <amiga/dev/siopvar.h> 58 59 extern u_int kvtop(); 60 61 /* 62 * SCSI delays 63 * In u-seconds, primarily for state changes on the SPC. 64 */ 65 #define SCSI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 66 #define SCSI_DATA_WAIT 50000 /* wait per data in/out step */ 67 #define SCSI_INIT_WAIT 50000 /* wait per step (both) during init */ 68 69 int siopicmd __P((struct siop_softc *, int, void *, int, void *, int)); 70 int siopgo __P((struct siop_softc *, struct scsi_xfer *)); 71 int siopgetsense __P((struct siop_softc *, struct scsi_xfer *)); 72 void siopabort __P((struct siop_softc *, siop_regmap_p, char *)); 73 void sioperror __P((struct siop_softc *, siop_regmap_p, u_char)); 74 void siopstart __P((struct siop_softc *)); 75 void siopreset __P((struct siop_softc *)); 76 void siopsetdelay __P((int)); 77 void siop_scsidone __P((struct siop_softc *, int)); 78 void siop_donextcmd __P((struct siop_softc *)); 79 int siopintr __P((struct siop_softc *)); 80 81 /* 53C710 script */ 82 unsigned long scripts[] = { 83 0x47000000, 0x00000298, /* 000 - 0 */ 84 0x838b0000, 0x000000d0, /* 008 - 8 */ 85 0x7a1b1000, 0x00000000, /* 010 - 16 */ 86 0x828a0000, 0x00000088, /* 018 - 24 */ 87 0x9e020000, 0x0000ff01, /* 020 - 32 */ 88 0x72350000, 0x00000000, /* 028 - 40 */ 89 0x808c0000, 0x00000048, /* 030 - 48 */ 90 0x58000008, 0x00000000, /* 038 - 56 */ 91 0x1e000024, 0x00000024, /* 040 - 64 */ 92 0x838b0000, 0x00000090, /* 048 - 72 */ 93 0x1f00002c, 0x0000002c, /* 050 - 80 */ 94 0x838b0000, 0x00000080, /* 058 - 88 */ 95 0x868a0000, 0xffffffd0, /* 060 - 96 */ 96 0x838a0000, 0x00000070, /* 068 - 104 */ 97 0x878a0000, 0x00000120, /* 070 - 112 */ 98 0x80880000, 0x00000028, /* 078 - 120 */ 99 0x1e000004, 0x00000004, /* 080 - 128 */ 100 0x838b0000, 0x00000050, /* 088 - 136 */ 101 0x868a0000, 0xffffffe8, /* 090 - 144 */ 102 0x838a0000, 0x00000040, /* 098 - 152 */ 103 0x878a0000, 0x000000f0, /* 0a0 - 160 */ 104 0x9a020000, 0x0000ff02, /* 0a8 - 168 */ 105 0x1a00000c, 0x0000000c, /* 0b0 - 176 */ 106 0x878b0000, 0x00000130, /* 0b8 - 184 */ 107 0x838a0000, 0x00000018, /* 0c0 - 192 */ 108 0x818a0000, 0x000000b0, /* 0c8 - 200 */ 109 0x808a0000, 0x00000080, /* 0d0 - 208 */ 110 0x98080000, 0x0000ff03, /* 0d8 - 216 */ 111 0x1b000014, 0x00000014, /* 0e0 - 224 */ 112 0x72090000, 0x00000000, /* 0e8 - 232 */ 113 0x6a340000, 0x00000000, /* 0f0 - 240 */ 114 0x9f030000, 0x0000ff04, /* 0f8 - 248 */ 115 0x1f00001c, 0x0000001c, /* 100 - 256 */ 116 0x98040000, 0x0000ff26, /* 108 - 264 */ 117 0x60000040, 0x00000000, /* 110 - 272 */ 118 0x48000000, 0x00000000, /* 118 - 280 */ 119 0x7c1bef00, 0x00000000, /* 120 - 288 */ 120 0x72340000, 0x00000000, /* 128 - 296 */ 121 0x980c0002, 0x0000fffc, /* 130 - 304 */ 122 0x980c0008, 0x0000fffb, /* 138 - 312 */ 123 0x980c0018, 0x0000fffd, /* 140 - 320 */ 124 0x98040000, 0x0000fffe, /* 148 - 328 */ 125 0x98080000, 0x0000ff00, /* 150 - 336 */ 126 0x18000034, 0x00000034, /* 158 - 344 */ 127 0x808b0000, 0x000001c0, /* 160 - 352 */ 128 0x838b0000, 0xffffff70, /* 168 - 360 */ 129 0x878a0000, 0x000000d0, /* 170 - 368 */ 130 0x98080000, 0x0000ff05, /* 178 - 376 */ 131 0x19000034, 0x00000034, /* 180 - 384 */ 132 0x818b0000, 0x00000160, /* 188 - 392 */ 133 0x80880000, 0xffffffd0, /* 190 - 400 */ 134 0x1f00001c, 0x0000001c, /* 198 - 408 */ 135 0x808c0001, 0x00000018, /* 1a0 - 416 */ 136 0x980c0002, 0x0000ff08, /* 1a8 - 424 */ 137 0x808c0004, 0x00000020, /* 1b0 - 432 */ 138 0x98080000, 0x0000ff06, /* 1b8 - 440 */ 139 0x60000040, 0x00000000, /* 1c0 - 448 */ 140 0x1f00002c, 0x0000002c, /* 1c8 - 456 */ 141 0x98080000, 0x0000ff07, /* 1d0 - 464 */ 142 0x60000040, 0x00000000, /* 1d8 - 472 */ 143 0x48000000, 0x00000000, /* 1e0 - 480 */ 144 0x98080000, 0x0000ff09, /* 1e8 - 488 */ 145 0x1f00001c, 0x0000001c, /* 1f0 - 496 */ 146 0x808c0001, 0x00000018, /* 1f8 - 504 */ 147 0x980c0002, 0x0000ff10, /* 200 - 512 */ 148 0x808c0004, 0x00000020, /* 208 - 520 */ 149 0x98080000, 0x0000ff11, /* 210 - 528 */ 150 0x60000040, 0x00000000, /* 218 - 536 */ 151 0x1f00002c, 0x0000002c, /* 220 - 544 */ 152 0x98080000, 0x0000ff12, /* 228 - 552 */ 153 0x60000040, 0x00000000, /* 230 - 560 */ 154 0x48000000, 0x00000000, /* 238 - 568 */ 155 0x98080000, 0x0000ff13, /* 240 - 576 */ 156 0x1f00001c, 0x0000001c, /* 248 - 584 */ 157 0x808c0001, 0x00000018, /* 250 - 592 */ 158 0x980c0002, 0x0000ff14, /* 258 - 600 */ 159 0x808c0004, 0x00000020, /* 260 - 608 */ 160 0x98080000, 0x0000ff15, /* 268 - 616 */ 161 0x60000040, 0x00000000, /* 270 - 624 */ 162 0x1f00002c, 0x0000002c, /* 278 - 632 */ 163 0x98080000, 0x0000ff16, /* 280 - 640 */ 164 0x60000040, 0x00000000, /* 288 - 648 */ 165 0x48000000, 0x00000000, /* 290 - 656 */ 166 0x98080000, 0x0000ff17, /* 298 - 664 */ 167 0x54000000, 0x00000040, /* 2a0 - 672 */ 168 0x9f030000, 0x0000ff18, /* 2a8 - 680 */ 169 0x1f00001c, 0x0000001c, /* 2b0 - 688 */ 170 0x990b0000, 0x0000ff19, /* 2b8 - 696 */ 171 0x980a0000, 0x0000ff20, /* 2c0 - 704 */ 172 0x9f0a0000, 0x0000ff21, /* 2c8 - 712 */ 173 0x9b0a0000, 0x0000ff22, /* 2d0 - 720 */ 174 0x9e0a0000, 0x0000ff23, /* 2d8 - 728 */ 175 0x98080000, 0x0000ff24, /* 2e0 - 736 */ 176 0x98080000, 0x0000ff25, /* 2e8 - 744 */ 177 0x76100800, 0x00000000, /* 2f0 - 752 */ 178 0x80840700, 0x00000008, /* 2f8 - 760 */ 179 0x7e110100, 0x00000000, /* 300 - 768 */ 180 0x6a100000, 0x00000000, /* 308 - 776 */ 181 0x19000034, 0x00000034, /* 310 - 784 */ 182 0x818b0000, 0xffffffd0, /* 318 - 792 */ 183 0x98080000, 0x0000ff27, /* 320 - 800 */ 184 0x76100800, 0x00000000, /* 328 - 808 */ 185 0x80840700, 0x00000008, /* 330 - 816 */ 186 0x7e110100, 0x00000000, /* 338 - 824 */ 187 0x6a100000, 0x00000000, /* 340 - 832 */ 188 0x18000034, 0x00000034, /* 348 - 840 */ 189 0x808b0000, 0xffffffd0, /* 350 - 848 */ 190 0x98080000, 0x0000ff27 /* 358 - 856 */ 191 }; 192 193 #define Ent_msgout 0x00000018 194 #define Ent_cmd 0x000000a8 195 #define Ent_status 0x000000e0 196 #define Ent_msgin 0x000000f8 197 #define Ent_dataout 0x00000158 198 #define Ent_datain 0x00000180 199 200 /* default to not inhibit sync negotiation on any drive */ 201 /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */ 202 u_char siop_inhibit_sync[8] = { 0, 0, 1, 0, 0, 0, 0 }; /* initialize, so patchable */ 203 int siop_no_dma = 0; 204 205 int siop_reset_delay = 2000; /* delay after reset, in milleseconds */ 206 int siop_sync_period = 50; /* synchronous transfer period, in nanoseconds */ 207 208 int siop_cmd_wait = SCSI_CMD_WAIT; 209 int siop_data_wait = SCSI_DATA_WAIT; 210 int siop_init_wait = SCSI_INIT_WAIT; 211 212 static struct { 213 unsigned char x; /* period from sync request message */ 214 unsigned char y; /* siop_period << 4 | sbcl */ 215 } xxx[] = { 216 {0x0f, 0x01}, 217 {0x13, 0x11}, 218 {0x17, 0x21}, 219 /* {0x17, 0x02}, */ 220 {0x1b, 0x31}, 221 {0x1d, 0x12}, 222 {0x1e, 0x41}, 223 /* {0x1e, 0x03}, */ 224 {0x22, 0x51}, 225 {0x23, 0x22}, 226 {0x26, 0x61}, 227 /* {0x26, 0x13}, */ 228 {0x29, 0x32}, 229 {0x2a, 0x71}, 230 {0x2d, 0x23}, 231 {0x2e, 0x42}, 232 {0x34, 0x52}, 233 {0x35, 0x33}, 234 {0x3a, 0x62}, 235 {0x3c, 0x43}, 236 {0x40, 0x72}, 237 {0x44, 0x53}, 238 {0x4b, 0x63}, 239 {0x53, 0x73} 240 }; 241 242 #ifdef DEBUG 243 #define QPRINTF(a) if (siop_debug > 1) printf a 244 /* 245 * 0x01 - full debug 246 * 0x02 - DMA chaining 247 * 0x04 - siopintr 248 * 0x08 - phase mismatch 249 * 0x10 - panic on phase mismatch 250 */ 251 int siop_debug = 0; 252 int siopsync_debug = 0; 253 int siopdma_hits = 0; 254 int siopdma_misses = 0; 255 #endif 256 257 258 /* 259 * default minphys routine for siop based controllers 260 */ 261 void 262 siop_minphys(bp) 263 struct buf *bp; 264 { 265 /* 266 * no max transfer at this level 267 */ 268 } 269 270 /* 271 * must be used 272 */ 273 u_int 274 siop_adinfo() 275 { 276 /* 277 * one request at a time please 278 */ 279 return(1); 280 } 281 282 /* 283 * used by specific siop controller 284 * 285 * it appears that the higher level code does nothing with LUN's 286 * so I will too. I could plug it in, however so could they 287 * in scsi_scsi_cmd(). 288 */ 289 int 290 siop_scsicmd(xs) 291 struct scsi_xfer *xs; 292 { 293 struct siop_pending *pendp; 294 struct siop_softc *dev; 295 struct scsi_link *slp; 296 int flags, s; 297 298 slp = xs->sc_link; 299 dev = slp->adapter_softc; 300 flags = xs->flags; 301 302 if (flags & SCSI_DATA_UIO) 303 panic("siop: scsi data uio requested"); 304 305 if (dev->sc_xs && flags & SCSI_NOMASK) 306 panic("siop_scsicmd: busy"); 307 308 s = splbio(); 309 pendp = &dev->sc_xsstore[slp->target][slp->lun]; 310 if (pendp->xs) { 311 splx(s); 312 return(TRY_AGAIN_LATER); 313 } 314 315 if (dev->sc_xs) { 316 pendp->xs = xs; 317 TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link); 318 splx(s); 319 return(SUCCESSFULLY_QUEUED); 320 } 321 pendp->xs = NULL; 322 dev->sc_xs = xs; 323 splx(s); 324 325 /* 326 * nothing is pending do it now. 327 */ 328 siop_donextcmd(dev); 329 330 if (flags & SCSI_NOMASK) 331 return(COMPLETE); 332 return(SUCCESSFULLY_QUEUED); 333 } 334 335 /* 336 * entered with dev->sc_xs pointing to the next xfer to perform 337 */ 338 void 339 siop_donextcmd(dev) 340 struct siop_softc *dev; 341 { 342 struct scsi_xfer *xs; 343 struct scsi_link *slp; 344 int flags, phase, stat; 345 346 xs = dev->sc_xs; 347 slp = xs->sc_link; 348 flags = xs->flags; 349 350 #if 0 351 if (flags & SCSI_DATA_IN) 352 phase = DATA_IN_PHASE; 353 else if (flags & SCSI_DATA_OUT) 354 phase = DATA_OUT_PHASE; 355 else 356 phase = STATUS_PHASE; 357 #endif 358 359 if (flags & SCSI_RESET) 360 siopreset(dev); 361 362 dev->sc_stat[0] = -1; 363 #if 0 364 if (phase == STATUS_PHASE || flags & SCSI_NOMASK) 365 #else 366 if (flags & SCSI_NOMASK) 367 #endif 368 stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen, 369 xs->data, xs->datalen/*, phase*/); 370 else if (siopgo(dev, xs) == 0) 371 return; 372 else 373 stat = dev->sc_stat[0]; 374 375 siop_scsidone(dev, stat); 376 } 377 378 void 379 siop_scsidone(dev, stat) 380 struct siop_softc *dev; 381 int stat; 382 { 383 struct siop_pending *pendp; 384 struct scsi_xfer *xs; 385 int s, donext; 386 387 xs = dev->sc_xs; 388 #ifdef DIAGNOSTIC 389 if (xs == NULL) 390 panic("siop_scsidone"); 391 #endif 392 /* 393 * is this right? 394 */ 395 xs->status = stat; 396 397 if (stat == 0 || xs->flags & SCSI_ERR_OK) 398 xs->resid = 0; 399 else { 400 switch(stat) { 401 case SCSI_CHECK: 402 if (stat = siopgetsense(dev, xs)) 403 goto bad_sense; 404 xs->error = XS_SENSE; 405 break; 406 case SCSI_BUSY: 407 xs->error = XS_BUSY; 408 break; 409 bad_sense: 410 default: 411 xs->error = XS_DRIVER_STUFFUP; 412 QPRINTF(("siop_scsicmd() bad %x\n", stat)); 413 break; 414 } 415 } 416 xs->flags |= ITSDONE; 417 418 /* 419 * grab next command before scsi_done() 420 * this way no single device can hog scsi resources. 421 */ 422 s = splbio(); 423 pendp = dev->sc_xslist.tqh_first; 424 if (pendp == NULL) { 425 donext = 0; 426 dev->sc_xs = NULL; 427 } else { 428 donext = 1; 429 TAILQ_REMOVE(&dev->sc_xslist, pendp, link); 430 dev->sc_xs = pendp->xs; 431 pendp->xs = NULL; 432 } 433 splx(s); 434 scsi_done(xs); 435 436 if (donext) 437 siop_donextcmd(dev); 438 } 439 440 int 441 siopgetsense(dev, xs) 442 struct siop_softc *dev; 443 struct scsi_xfer *xs; 444 { 445 struct scsi_sense rqs; 446 struct scsi_link *slp; 447 int stat; 448 449 slp = xs->sc_link; 450 451 rqs.op_code = REQUEST_SENSE; 452 rqs.byte2 = slp->lun << 5; 453 rqs.length = xs->req_sense_length ? xs->req_sense_length : 454 sizeof(xs->sense); 455 if (rqs.length > sizeof (xs->sense)) 456 rqs.length = sizeof (xs->sense); 457 rqs.unused[0] = rqs.unused[1] = rqs.control = 0; 458 459 return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense, 460 rqs.length)); 461 } 462 463 void 464 siopabort(dev, regs, where) 465 register struct siop_softc *dev; 466 siop_regmap_p regs; 467 char *where; 468 { 469 470 printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n", 471 dev->sc_dev.dv_xname, 472 where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl); 473 474 if (dev->sc_flags & SIOP_SELECTED) { 475 #ifdef TODO 476 SET_SBIC_cmd (regs, SBIC_CMD_ABORT); 477 WAIT_CIP (regs); 478 479 GET_SBIC_asr (regs, asr); 480 if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) 481 { 482 /* ok, get more drastic.. */ 483 484 SET_SBIC_cmd (regs, SBIC_CMD_RESET); 485 DELAY(25); 486 SBIC_WAIT(regs, SBIC_ASR_INT, 0); 487 GET_SBIC_csr (regs, csr); /* clears interrupt also */ 488 489 dev->sc_flags &= ~SIOP_SELECTED; 490 return; 491 } 492 493 do 494 { 495 SBIC_WAIT (regs, SBIC_ASR_INT, 0); 496 GET_SBIC_csr (regs, csr); 497 } 498 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) 499 && (csr != SBIC_CSR_CMD_INVALID)); 500 #endif 501 502 /* lets just hope it worked.. */ 503 dev->sc_flags &= ~SIOP_SELECTED; 504 } 505 } 506 507 /* 508 * XXX Set/reset long delays. 509 * 510 * if delay == 0, reset default delays 511 * if delay < 0, set both delays to default long initialization values 512 * if delay > 0, set both delays to this value 513 * 514 * Used when a devices is expected to respond slowly (e.g. during 515 * initialization). 516 */ 517 void 518 siop_delay(delay) 519 int delay; 520 { 521 static int saved_cmd_wait, saved_data_wait; 522 523 if (delay) { 524 saved_cmd_wait = siop_cmd_wait; 525 saved_data_wait = siop_data_wait; 526 if (delay > 0) 527 siop_cmd_wait = siop_data_wait = delay; 528 else 529 siop_cmd_wait = siop_data_wait = siop_init_wait; 530 } else { 531 siop_cmd_wait = saved_cmd_wait; 532 siop_data_wait = saved_data_wait; 533 } 534 } 535 536 void 537 siopreset(dev) 538 struct siop_softc *dev; 539 { 540 siop_regmap_p regs; 541 u_int i, s; 542 u_char my_id, csr; 543 544 regs = dev->sc_siopp; 545 546 if (dev->sc_flags & SIOP_ALIVE) 547 siopabort(dev, regs, "reset"); 548 549 printf("\n%s: ", dev->sc_dev.dv_xname); /* XXXX */ 550 551 s = splbio(); 552 my_id = 7; 553 554 /* 555 * Reset the chip 556 * XXX - is this really needed? 557 */ 558 regs->siop_sien &= ~SIOP_SIEN_RST; 559 regs->siop_scntl1 |= SIOP_SCNTL1_RST; 560 for (i = 0; i < 1000; ++i) 561 ; 562 regs->siop_scntl1 &= ~SIOP_SCNTL1_RST; 563 regs->siop_sien |= SIOP_SIEN_RST; 564 565 /* 566 * Set up various chip parameters 567 */ 568 regs->siop_istat = 0x40; 569 for (i = 0; i < 1000; ++i) 570 ; 571 regs->siop_istat = 0x00; 572 regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG; 573 regs->siop_dcntl = dev->sc_clock_freq & 0xff; 574 regs->siop_dmode = 0x80; /* burst length = 4 */ 575 regs->siop_sien = 0x00; /* don't enable interrupts yet */ 576 regs->siop_dien = 0x00; /* don't enable interrupts yet */ 577 regs->siop_scid = 1 << my_id; 578 regs->siop_dwt = 0x00; 579 regs->siop_ctest0 |= 0x20; /* Enable Active Negation ?? */ 580 regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff; 581 582 /* will need to re-negotiate sync xfers */ 583 bzero(&dev->sc_sync, sizeof (dev->sc_sync)); 584 585 splx (s); 586 587 DELAY (siop_reset_delay * 10000); 588 printf("siop id %d reset\n", my_id); 589 dev->sc_flags |= SIOP_ALIVE; 590 dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA); 591 } 592 593 /* 594 * Setup Data Storage for 53C710 and start SCRIPTS processing 595 */ 596 597 void 598 siop_setup (dev, target, cbuf, clen, buf, len) 599 struct siop_softc *dev; 600 int target; 601 u_char *cbuf; 602 int clen; 603 u_char *buf; 604 int len; 605 { 606 siop_regmap_p regs = dev->sc_siopp; 607 int i; 608 int nchain; 609 int count, tcount; 610 char *addr, *dmaend; 611 612 dev->sc_istat = 0; 613 dev->sc_lun = 0x80; /* XXX */ 614 dev->sc_stat[0] = -1; 615 dev->sc_msg[0] = -1; 616 dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8); 617 dev->sc_ds.idlen = 1; 618 dev->sc_ds.idbuf = (char *) kvtop(&dev->sc_lun); 619 dev->sc_ds.cmdlen = clen; 620 dev->sc_ds.cmdbuf = (char *) kvtop(cbuf); 621 dev->sc_ds.stslen = 1; 622 dev->sc_ds.stsbuf = (char *) kvtop(&dev->sc_stat[0]); 623 dev->sc_ds.msglen = 1; 624 dev->sc_ds.msgbuf = (char *) kvtop(&dev->sc_msg[0]); 625 dev->sc_ds.sdtrolen = 0; 626 dev->sc_ds.sdtrilen = 0; 627 dev->sc_ds.chain[0].datalen = len; 628 dev->sc_ds.chain[0].databuf = (char *) kvtop(buf); 629 630 if (dev->sc_sync[target].state == SYNC_START) { 631 if (siop_inhibit_sync[target]) { 632 dev->sc_sync[target].state = SYNC_DONE; 633 dev->sc_sync[target].offset = 0; 634 dev->sc_sync[target].period = 0; 635 #ifdef DEBUG 636 if (siopsync_debug) 637 printf ("Forcing target %d asynchronous\n", target); 638 #endif 639 } 640 else { 641 dev->sc_msg[1] = MSG_IDENTIFY; 642 dev->sc_msg[2] = MSG_EXT_MESSAGE; 643 dev->sc_msg[3] = 3; 644 dev->sc_msg[4] = MSG_SYNC_REQ; 645 dev->sc_msg[5] = siop_sync_period / 4; 646 dev->sc_msg[6] = SIOP_MAX_OFFSET; 647 dev->sc_ds.sdtrolen = 6; 648 dev->sc_ds.sdtrilen = 6; 649 dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) kvtop(dev->sc_msg + 1); 650 dev->sc_sync[target].state = SYNC_SENT; 651 #ifdef DEBUG 652 if (siopsync_debug) 653 printf ("Sending sync request to target %d\n", target); 654 #endif 655 } 656 } 657 658 /* 659 * If length is > 1 page, check for consecutive physical pages 660 * Need to set up chaining if not 661 */ 662 nchain = 0; 663 count = len; 664 addr = buf; 665 dmaend = NULL; 666 while (count > 0) { 667 dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr); 668 if (count < (tcount = NBPG - ((int) addr & PGOFSET))) 669 tcount = count; 670 dev->sc_ds.chain[nchain].datalen = tcount; 671 addr += tcount; 672 count -= tcount; 673 if (dev->sc_ds.chain[nchain].databuf == dmaend) { 674 dmaend += dev->sc_ds.chain[nchain].datalen; 675 dev->sc_ds.chain[--nchain].datalen += tcount; 676 #ifdef DEBUG 677 ++siopdma_hits; 678 #endif 679 } 680 else { 681 dmaend = dev->sc_ds.chain[nchain].databuf + 682 dev->sc_ds.chain[nchain].datalen; 683 dev->sc_ds.chain[nchain].datalen = tcount; 684 #ifdef DEBUG 685 ++siopdma_misses; 686 #endif 687 } 688 ++nchain; 689 } 690 #ifdef DEBUG 691 if (nchain != 1 && len != 0 && siop_debug & 3) { 692 printf ("DMA chaining set: %d\n", nchain); 693 for (i = 0; i < nchain; ++i) { 694 printf (" [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf, 695 dev->sc_ds.chain[i].datalen); 696 } 697 } 698 #endif 699 700 regs->siop_sbcl = dev->sc_sync[target].offset; 701 if (dev->sc_ds.sdtrolen) 702 regs->siop_scratch = regs->siop_scratch | 0x100; 703 else 704 regs->siop_scratch = regs->siop_scratch & ~0xff00; 705 regs->siop_dsa = (long) kvtop(&dev->sc_ds); 706 DCIS(); /* push data cache */ 707 regs->siop_dsp = (long) kvtop(scripts); 708 } 709 710 /* 711 * Process a DMA or SCSI interrupt from the 53C710 SIOP 712 */ 713 714 int 715 siop_checkintr(dev, istat, dstat, sstat0, status) 716 struct siop_softc *dev; 717 u_char istat; 718 u_char dstat; 719 u_char sstat0; 720 int *status; 721 { 722 siop_regmap_p regs = dev->sc_siopp; 723 int target; 724 725 regs->siop_ctest8 |= 0x04; 726 while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0) 727 ; 728 regs->siop_ctest8 &= ~0x04; 729 #ifdef DEBUG 730 if (siop_debug & 1) { 731 DCIAS(kvtop(&dev->sc_stat)); /* XXX */ 732 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 733 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 734 } 735 #endif 736 if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 || 737 regs->siop_dsps == 0xfffc)) { 738 /* Normal completion status, or check condition */ 739 if (regs->siop_dsa != (long) kvtop(&dev->sc_ds)) { 740 printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa, 741 kvtop(&dev->sc_ds)); 742 panic("*** siop DSA invalid ***"); 743 } 744 target = dev->sc_slave; 745 if (dev->sc_sync[target].state == SYNC_SENT) { 746 #ifdef DEBUG 747 if (siopsync_debug) 748 printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", 749 dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3], 750 dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]); 751 #endif 752 dev->sc_sync[target].state = SYNC_DONE; 753 dev->sc_sync[target].period = 0; 754 dev->sc_sync[target].offset = 0; 755 if (dev->sc_msg[1] == MSG_EXT_MESSAGE && 756 dev->sc_msg[2] == 3 && 757 dev->sc_msg[3] == MSG_SYNC_REQ && 758 dev->sc_msg[5] != 0) { 759 if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) { 760 #ifdef DEBUG 761 printf ("%d: target %d wanted %dns period\n", 762 dev->sc_dev.dv_xname, target, 763 dev->sc_msg[4] * 4); 764 #endif 765 /* 766 * Kludge for Maxtor XT8580S 767 * It accepts whatever we request, even 768 * though it won't work. So we ask for 769 * a short period than we can handle. If 770 * the device says it can do it, use 208ns. 771 * If the device says it can do less than 772 * 100ns, then we limit it to 100ns. 773 */ 774 if (dev->sc_msg[4] == siop_sync_period / 4) 775 dev->sc_msg[4] = 208 / 4; 776 else 777 dev->sc_msg[4] = 100 / 4; 778 } 779 printf ("%s: target %d now synchronous, period=%dns, offset=%d\n", 780 dev->sc_dev.dv_xname, target, 781 dev->sc_msg[4] * 4, dev->sc_msg[5]); 782 scsi_period_to_siop (dev, target); 783 } 784 } 785 DCIAS(kvtop(&dev->sc_stat)); /* XXX */ 786 *status = dev->sc_stat[0]; 787 return 1; 788 } 789 if (sstat0 & SIOP_SSTAT0_M_A) { /* Phase mismatch */ 790 #ifdef DEBUG 791 if (siop_debug & 9) 792 printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl, 793 regs->siop_dsp - kvtop(scripts)); 794 if (siop_debug & 0x10) 795 panic ("53c710 phase mismatch"); 796 #endif 797 if ((regs->siop_sbcl & SIOP_REQ) == 0) 798 printf ("Phase mismatch: REQ not asserted! %02x\n", 799 regs->siop_sbcl); 800 switch (regs->siop_sbcl & 7) { 801 /* 802 * For data out and data in phase, check for DMA chaining 803 */ 804 805 /* 806 * for message in, check for possible reject for sync request 807 */ 808 case 0: 809 regs->siop_dsp = kvtop(scripts) + Ent_dataout; 810 break; 811 case 1: 812 regs->siop_dsp = kvtop(scripts) + Ent_datain; 813 break; 814 case 2: 815 regs->siop_dsp = kvtop(scripts) + Ent_cmd; 816 break; 817 case 3: 818 regs->siop_dsp = kvtop(scripts) + Ent_status; 819 break; 820 case 6: 821 regs->siop_dsp = kvtop(scripts) + Ent_msgout; 822 break; 823 case 7: 824 regs->siop_dsp = kvtop(scripts) + Ent_msgin; 825 break; 826 default: 827 goto bad_phase; 828 } 829 return 0; 830 } 831 if (sstat0 & SIOP_SSTAT0_STO) { /* Select timed out */ 832 *status = -1; 833 return 1; 834 } 835 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 && 836 (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) { 837 printf ("DMA chaining failed\n"); 838 siopreset (dev); 839 *status = -1; 840 return 1; 841 } 842 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) { 843 #ifdef DEBUG 844 if (siop_debug & 3) 845 printf ("DMA chaining completed: dsa %x dnad %x addr %x\n", 846 regs->siop_dsa, regs->siop_dnad, regs->siop_addr); 847 #endif 848 regs->siop_dsa = kvtop (&dev->sc_ds); 849 regs->siop_dsp = kvtop (scripts) + Ent_status; 850 return 0; 851 } 852 target = dev->sc_slave; 853 if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 && 854 dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) { 855 dev->sc_sync[target].state = SYNC_DONE; 856 dev->sc_sync[target].period = 0; 857 dev->sc_sync[target].offset = 0; 858 dev->sc_ds.sdtrolen = 0; 859 dev->sc_ds.sdtrilen = 0; 860 #ifdef DEBUG 861 if (siopsync_debug || 1) 862 printf ("target %d rejected sync, going asynchronous\n", target); 863 #endif 864 siop_inhibit_sync[target] = -1; 865 if ((regs->siop_sbcl & 7) == 6) { 866 regs->siop_dsp = kvtop(scripts) + Ent_msgout; 867 return (0); 868 } 869 } 870 if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) || 871 sstat0 & SIOP_SSTAT0_UDC) { 872 #ifdef DEBUG 873 printf ("%s: target %d disconnected unexpectedly\n", 874 dev->sc_dev.dv_xname, target); 875 #endif 876 #if 0 877 siopabort (dev, regs, "siopchkintr"); 878 #endif 879 *status = STS_BUSY; 880 return 1; 881 } 882 if (dstat & SIOP_DSTAT_SIR &®s->siop_dsps == 0xfffb) { 883 #if 0 884 printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target); 885 #endif 886 #if 0 887 siopabort (dev, regs, "siopchkintr"); 888 #endif 889 *status = STS_BUSY; 890 return 1; 891 } 892 if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) { 893 DCIAS(kvtop(&dev->sc_stat)); 894 printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n", 895 regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0], 896 regs->siop_sbcl); 897 siopreset (dev); 898 *status = -1; 899 return 1; 900 } 901 bad_phase: 902 /* 903 * temporary panic for unhandled conditions 904 * displays various things about the 53C710 status and registers 905 * then panics 906 */ 907 printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds); 908 printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", kvtop(scripts), 909 kvtop(&dev->sc_ds), kvtop(regs), regs->siop_dsp, *((long *)®s->siop_dcmd)); 910 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n", 911 istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, regs->siop_sbcl, 912 dev->sc_stat[0], dev->sc_msg[0]); 913 panic("siopchkintr: **** temp ****"); 914 } 915 916 /* 917 * SCSI 'immediate' command: issue a command to some SCSI device 918 * and get back an 'immediate' response (i.e., do programmed xfer 919 * to get the response data). 'cbuf' is a buffer containing a scsi 920 * command of length clen bytes. 'buf' is a buffer of length 'len' 921 * bytes for data. The transfer direction is determined by the device 922 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 923 * command must supply no data. 'xferphase' is the bus phase the 924 * caller expects to happen after the command is issued. It should 925 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 926 * 927 * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a 928 * lot easier to do than to use programmed I/O). 929 * 930 */ 931 int 932 siopicmd(dev, target, cbuf, clen, buf, len) 933 struct siop_softc *dev; 934 int target; 935 void *cbuf; 936 int clen; 937 void *buf; 938 int len; 939 { 940 siop_regmap_p regs = dev->sc_siopp; 941 int i; 942 int status; 943 u_char istat; 944 u_char dstat; 945 u_char sstat0; 946 947 if (dev->sc_flags & SIOP_SELECTED) { 948 printf ("siopicmd%d: bus busy\n", target); 949 return -1; 950 } 951 regs->siop_sien = 0x00; /* disable SCSI and DMA interrupts */ 952 regs->siop_dien = 0x00; 953 dev->sc_flags |= SIOP_SELECTED; 954 dev->sc_slave = target; 955 #ifdef DEBUG 956 if (siop_debug & 1) 957 printf ("siopicmd: target %x cmd %02x ds %x\n", target, 958 *((char *)cbuf), &dev->sc_ds); 959 #endif 960 siop_setup (dev, target, cbuf, clen, buf, len); 961 962 for (;;) { 963 /* use cmd_wait values? */ 964 i = siop_cmd_wait << 1; 965 while (((istat = regs->siop_istat) & 966 (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { 967 if (--i <= 0) { 968 printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n", 969 target, *((char *)cbuf), 970 regs->siop_sbcl, regs->siop_dsp, 971 regs->siop_dsp - kvtop(scripts), 972 *((long *)®s->siop_dcmd), &dev->sc_ds); 973 i = siop_cmd_wait << 2; 974 /* XXXX need an upper limit and reset */ 975 } 976 DELAY(1); 977 } 978 dstat = regs->siop_dstat; 979 sstat0 = regs->siop_sstat0; 980 #ifdef DEBUG 981 if (siop_debug & 1) { 982 DCIAS(kvtop(&dev->sc_stat)); /* XXX should just invalidate dev->sc_stat */ 983 printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 984 istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, 985 dev->sc_stat[0], dev->sc_msg[0]); 986 } 987 #endif 988 if (siop_checkintr(dev, istat, dstat, sstat0, &status)) { 989 dev->sc_flags &= ~SIOP_SELECTED; 990 return (status); 991 } 992 } 993 } 994 995 int 996 siopgo(dev, xs) 997 struct siop_softc *dev; 998 struct scsi_xfer *xs; 999 { 1000 siop_regmap_p regs; 1001 int i; 1002 int nchain; 1003 int count, tcount; 1004 char *addr, *dmaend; 1005 1006 #ifdef DEBUG 1007 if (siop_debug & 1) 1008 printf ("%s: go ", dev->sc_dev.dv_xname); 1009 #if 0 1010 if ((cdb->cdb[1] & 1) == 0 && 1011 ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) || 1012 (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0 1013 && cdb->cdb[4] == 0))) 1014 panic ("siopgo: attempted write to block < 0x100"); 1015 #endif 1016 #endif 1017 #if 0 1018 cdb->cdb[1] |= unit << 5; 1019 #endif 1020 1021 if (dev->sc_flags & SIOP_SELECTED) { 1022 printf ("%s: bus busy\n", dev->sc_dev.dv_xname); 1023 return 1; 1024 } 1025 1026 dev->sc_flags |= SIOP_SELECTED | SIOP_DMA; 1027 dev->sc_slave = xs->sc_link->target; 1028 regs = dev->sc_siopp; 1029 /* enable SCSI and DMA interrupts */ 1030 regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE | 1031 SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; 1032 regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD | 1033 SIOP_DIEN_OPC; 1034 #ifdef DEBUG 1035 if (siop_debug & 1) 1036 printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd[0], &dev->sc_ds); 1037 #endif 1038 1039 siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen); 1040 1041 return (0); 1042 } 1043 1044 /* 1045 * Check for 53C710 interrupts 1046 */ 1047 1048 int 1049 siopintr (dev) 1050 register struct siop_softc *dev; 1051 { 1052 siop_regmap_p regs; 1053 register u_char istat, dstat, sstat0; 1054 int unit; 1055 int status; 1056 int found = 0; 1057 1058 regs = dev->sc_siopp; 1059 istat = dev->sc_istat; 1060 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 1061 return; 1062 if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED) 1063 return; /* doing non-interrupt I/O */ 1064 /* Got a valid interrupt on this device */ 1065 dstat = dev->sc_dstat; 1066 sstat0 = dev->sc_sstat0; 1067 dev->sc_istat = 0; 1068 #ifdef DEBUG 1069 if (siop_debug & 1) 1070 printf ("%s: intr istat %x dstat %x sstat0 %x\n", 1071 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1072 if ((dev->sc_flags & SIOP_DMA) == 0) { 1073 printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n", 1074 dev->sc_dev.dv_xname, istat, dstat, sstat0); 1075 } 1076 #endif 1077 1078 #ifdef DEBUG 1079 if (siop_debug & 5) { 1080 DCIAS(kvtop(&dev->sc_stat)); 1081 printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", 1082 unit, istat, dstat, sstat0, regs->siop_dsps, 1083 regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]); 1084 } 1085 #endif 1086 if (siop_checkintr (dev, istat, dstat, sstat0, &status)) { 1087 #if 1 1088 regs->siop_sien = 0; 1089 regs->siop_dien = 0; 1090 if (status == 0xff) 1091 printf ("siopintr: status == 0xff\n"); 1092 #endif 1093 dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED); 1094 siop_scsidone(dev, dev->sc_stat[0]); 1095 } 1096 } 1097 1098 scsi_period_to_siop (dev, target) 1099 struct siop_softc *dev; 1100 { 1101 int period, offset, i, sxfer; 1102 1103 period = dev->sc_msg[4]; 1104 offset = dev->sc_msg[5]; 1105 sxfer = 0; 1106 if (offset <= SIOP_MAX_OFFSET) 1107 sxfer = offset; 1108 for (i = 0; i < sizeof (xxx) / 2; ++i) { 1109 if (period <= xxx[i].x) { 1110 sxfer |= xxx[i].y & 0x70; 1111 offset = xxx[i].y & 0x03; 1112 break; 1113 } 1114 } 1115 dev->sc_sync[target].period = sxfer; 1116 dev->sc_sync[target].offset = offset; 1117 #ifdef DEBUG 1118 printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset); 1119 #endif 1120 } 1121
Indexes created Fri Sep 26 20:09:58 GMT 2025