wdc_xsurf.c revision 1.2.6.3
1 1.2.6.2 tls /* $NetBSD: wdc_xsurf.c,v 1.2.6.3 2017/12/03 11:35:48 jdolecek Exp $ */ 2 1.2.6.2 tls 3 1.2.6.2 tls /*- 4 1.2.6.2 tls * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.2.6.2 tls * All rights reserved. 6 1.2.6.2 tls * 7 1.2.6.2 tls * This code is derived from software contributed to The NetBSD Foundation 8 1.2.6.2 tls * by Radoslaw Kujawa. 9 1.2.6.2 tls * 10 1.2.6.2 tls * Redistribution and use in source and binary forms, with or without 11 1.2.6.2 tls * modification, are permitted provided that the following conditions 12 1.2.6.2 tls * are met: 13 1.2.6.2 tls * 1. Redistributions of source code must retain the above copyright 14 1.2.6.2 tls * notice, this list of conditions and the following disclaimer. 15 1.2.6.2 tls * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.6.2 tls * notice, this list of conditions and the following disclaimer in the 17 1.2.6.2 tls * documentation and/or other materials provided with the distribution. 18 1.2.6.2 tls * 19 1.2.6.2 tls * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.6.2 tls * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.6.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.6.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.6.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.6.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.6.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.6.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.6.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.6.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.6.2 tls * POSSIBILITY OF SUCH DAMAGE. 30 1.2.6.2 tls */ 31 1.2.6.2 tls 32 1.2.6.2 tls /* Driver for IDE controller present on X-Surf. */ 33 1.2.6.2 tls 34 1.2.6.2 tls #include <sys/cdefs.h> 35 1.2.6.2 tls 36 1.2.6.2 tls #include <sys/systm.h> 37 1.2.6.2 tls #include <sys/types.h> 38 1.2.6.2 tls #include <sys/device.h> 39 1.2.6.2 tls #include <sys/bus.h> 40 1.2.6.2 tls #include <sys/conf.h> 41 1.2.6.2 tls #include <sys/kmem.h> 42 1.2.6.2 tls 43 1.2.6.2 tls #include <machine/cpu.h> 44 1.2.6.2 tls 45 1.2.6.2 tls #include <amiga/amiga/device.h> 46 1.2.6.2 tls 47 1.2.6.2 tls #include <dev/ata/atavar.h> 48 1.2.6.2 tls #include <dev/ic/wdcvar.h> 49 1.2.6.2 tls 50 1.2.6.2 tls #include <amiga/dev/zbusvar.h> 51 1.2.6.2 tls #include <amiga/dev/xsurfvar.h> 52 1.2.6.2 tls 53 1.2.6.2 tls #define WDC_XSURF_CHANNELS 2 54 1.2.6.2 tls #define WDC_XSURF_CHANSIZE 0x30 55 1.2.6.2 tls #define WDC_XSURF_CHANOFF 0x2000 56 1.2.6.2 tls 57 1.2.6.2 tls #define WDC_XSURF_ISR_OFF 0x7E 58 1.2.6.2 tls #define WDC_XSURF_ISR_HIGH 0x80 59 1.2.6.2 tls 60 1.2.6.2 tls #define WDC_XSURF_OFF_DATA 0x0 61 1.2.6.2 tls #define WDC_XSURF_OFF_ERROR 0x6 62 1.2.6.2 tls #define WDC_XSURF_OFF_SECCNT 0xA 63 1.2.6.2 tls #define WDC_XSURF_OFF_SECTOR 0xE 64 1.2.6.2 tls #define WDC_XSURF_OFF_CYL_LO 0x12 65 1.2.6.2 tls #define WDC_XSURF_OFF_CYL_HI 0x16 66 1.2.6.2 tls #define WDC_XSURF_OFF_SDH 0x1A 67 1.2.6.2 tls #define WDC_XSURF_OFF_COMMAND 0x1E 68 1.2.6.2 tls 69 1.2.6.2 tls struct wdc_xsurf_port { 70 1.2.6.2 tls struct ata_channel channel; 71 1.2.6.2 tls struct wdc_regs wdr; 72 1.2.6.2 tls }; 73 1.2.6.2 tls 74 1.2.6.2 tls struct wdc_xsurf_softc { 75 1.2.6.2 tls struct wdc_softc sc_wdcdev; 76 1.2.6.2 tls struct ata_channel *sc_chanarray[WDC_XSURF_CHANNELS]; 77 1.2.6.2 tls struct wdc_xsurf_port sc_ports[WDC_XSURF_CHANNELS]; 78 1.2.6.2 tls 79 1.2.6.2 tls struct bus_space_tag sc_bst; 80 1.2.6.2 tls bus_space_tag_t sc_cmdt; 81 1.2.6.2 tls bus_space_handle_t sc_isrh; 82 1.2.6.2 tls 83 1.2.6.2 tls struct isr sc_isr; 84 1.2.6.2 tls }; 85 1.2.6.2 tls 86 1.2.6.2 tls static int wdc_xsurf_match(device_t, cfdata_t, void *); 87 1.2.6.2 tls static void wdc_xsurf_attach(device_t, device_t, void *); 88 1.2.6.2 tls void wdc_xsurf_attach_channel(struct wdc_xsurf_softc *, int); 89 1.2.6.2 tls void wdc_xsurf_map_channel(struct wdc_xsurf_softc *, int); 90 1.2.6.2 tls int wdc_xsurf_intr(void *arg); 91 1.2.6.2 tls 92 1.2.6.3 jdolecek CFATTACH_DECL_NEW(wdc_xsurf, sizeof(struct wdc_xsurf_softc), 93 1.2.6.2 tls wdc_xsurf_match, wdc_xsurf_attach, NULL, NULL); 94 1.2.6.2 tls 95 1.2.6.2 tls static const unsigned int wdc_xsurf_wdr_offsets[] = { 96 1.2.6.2 tls WDC_XSURF_OFF_DATA, WDC_XSURF_OFF_ERROR, WDC_XSURF_OFF_SECCNT, 97 1.2.6.2 tls WDC_XSURF_OFF_SECTOR, WDC_XSURF_OFF_CYL_LO, WDC_XSURF_OFF_CYL_HI, 98 1.2.6.2 tls WDC_XSURF_OFF_SDH, WDC_XSURF_OFF_COMMAND 99 1.2.6.2 tls }; 100 1.2.6.2 tls 101 1.2.6.2 tls static int 102 1.2.6.2 tls wdc_xsurf_match(device_t parent, cfdata_t cf, void *aux) 103 1.2.6.2 tls { 104 1.2.6.2 tls struct xsurfbus_attach_args *xsb_aa = aux; 105 1.2.6.2 tls 106 1.2.6.2 tls if (strcmp(xsb_aa->xaa_name, "wdc_xsurf") != 0) 107 1.2.6.2 tls return 0; 108 1.2.6.2 tls 109 1.2.6.2 tls return 1; 110 1.2.6.2 tls } 111 1.2.6.2 tls 112 1.2.6.2 tls static void 113 1.2.6.2 tls wdc_xsurf_attach(device_t parent, device_t self, void *aux) 114 1.2.6.2 tls { 115 1.2.6.2 tls struct wdc_xsurf_softc *sc; 116 1.2.6.2 tls struct xsurfbus_attach_args *xsb_aa; 117 1.2.6.2 tls int i; 118 1.2.6.2 tls 119 1.2.6.2 tls aprint_normal("\n"); 120 1.2.6.2 tls aprint_naive("\n"); 121 1.2.6.2 tls xsb_aa = aux; 122 1.2.6.2 tls sc = device_private(self); 123 1.2.6.2 tls 124 1.2.6.2 tls sc->sc_bst.base = xsb_aa->xaa_base; 125 1.2.6.2 tls sc->sc_bst.absm = &amiga_bus_stride_1swap; 126 1.2.6.2 tls sc->sc_cmdt = &sc->sc_bst; 127 1.2.6.2 tls 128 1.2.6.2 tls sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 129 1.2.6.2 tls sc->sc_wdcdev.sc_atac.atac_nchannels = WDC_XSURF_CHANNELS; 130 1.2.6.2 tls sc->sc_wdcdev.sc_atac.atac_dev = self; 131 1.2.6.2 tls sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray; 132 1.2.6.2 tls sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16; 133 1.2.6.2 tls sc->sc_wdcdev.wdc_maxdrives = 2; 134 1.2.6.2 tls /* this controller has no aux control registers */ 135 1.2.6.2 tls sc->sc_wdcdev.cap = WDC_CAPABILITY_NO_AUXCTL; 136 1.2.6.2 tls 137 1.2.6.2 tls /* attach the channels */ 138 1.2.6.2 tls wdc_allocate_regs(&sc->sc_wdcdev); 139 1.2.6.2 tls for (i = 0; i < WDC_XSURF_CHANNELS; i++) { 140 1.2.6.2 tls wdc_xsurf_attach_channel(sc, i); 141 1.2.6.2 tls } 142 1.2.6.2 tls 143 1.2.6.2 tls /* map interrupt status register */ 144 1.2.6.2 tls bus_space_map(sc->sc_cmdt, WDC_XSURF_ISR_OFF, 145 1.2.6.2 tls 1, 0, &sc->sc_isrh); 146 1.2.6.2 tls 147 1.2.6.2 tls /* attach interrupt */ 148 1.2.6.2 tls sc->sc_isr.isr_intr = wdc_xsurf_intr; 149 1.2.6.2 tls sc->sc_isr.isr_arg = sc; 150 1.2.6.2 tls sc->sc_isr.isr_ipl = 2; 151 1.2.6.2 tls add_isr(&sc->sc_isr); 152 1.2.6.2 tls } 153 1.2.6.2 tls 154 1.2.6.2 tls void 155 1.2.6.2 tls wdc_xsurf_attach_channel(struct wdc_xsurf_softc *sc, int chnum) 156 1.2.6.2 tls { 157 1.2.6.3 jdolecek #ifdef WDC_XSURF_DEBUG 158 1.2.6.3 jdolecek device_t self; 159 1.2.6.3 jdolecek 160 1.2.6.3 jdolecek self = sc->sc_wdcdev.sc_atac.atac_dev; 161 1.2.6.3 jdolecek #endif /* WDC_XSURF_DEBUG */ 162 1.2.6.3 jdolecek 163 1.2.6.2 tls sc->sc_chanarray[chnum] = &sc->sc_ports[chnum].channel; 164 1.2.6.2 tls memset(&sc->sc_ports[chnum],0,sizeof(struct wdc_xsurf_port)); 165 1.2.6.2 tls sc->sc_ports[chnum].channel.ch_channel = chnum; 166 1.2.6.2 tls sc->sc_ports[chnum].channel.ch_atac = &sc->sc_wdcdev.sc_atac; 167 1.2.6.2 tls 168 1.2.6.2 tls wdc_xsurf_map_channel(sc, chnum); 169 1.2.6.2 tls 170 1.2.6.3 jdolecek wdc_init_shadow_regs(CHAN_TO_WDC_REGS(&sc->sc_ports[chnum].channel)); 171 1.2.6.2 tls wdcattach(&sc->sc_ports[chnum].channel); 172 1.2.6.2 tls 173 1.2.6.2 tls #ifdef WDC_XSURF_DEBUG 174 1.2.6.3 jdolecek aprint_normal_dev(self, "done init for channel %d\n", chnum); 175 1.2.6.2 tls #endif /* WDC_XSURF_DEBUG */ 176 1.2.6.2 tls } 177 1.2.6.2 tls 178 1.2.6.2 tls void 179 1.2.6.2 tls wdc_xsurf_map_channel(struct wdc_xsurf_softc *sc, int chnum) 180 1.2.6.2 tls { 181 1.2.6.2 tls struct wdc_regs *wdr; 182 1.2.6.2 tls int i; 183 1.2.6.2 tls 184 1.2.6.2 tls wdr = CHAN_TO_WDC_REGS(&sc->sc_ports[chnum].channel); 185 1.2.6.2 tls 186 1.2.6.2 tls /* map the registers */ 187 1.2.6.2 tls wdr->cmd_iot = sc->sc_cmdt; 188 1.2.6.2 tls bus_space_map(sc->sc_cmdt, chnum * WDC_XSURF_CHANOFF, 189 1.2.6.2 tls WDC_XSURF_CHANSIZE, 0, &wdr->cmd_baseioh); 190 1.2.6.2 tls 191 1.2.6.2 tls for (i = 0; i < WDC_NREG; i++) 192 1.2.6.2 tls bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 193 1.2.6.2 tls wdc_xsurf_wdr_offsets[i], i == 0 ? 2 : 1, 194 1.2.6.2 tls &wdr->cmd_iohs[i]); 195 1.2.6.2 tls } 196 1.2.6.2 tls 197 1.2.6.2 tls int 198 1.2.6.2 tls wdc_xsurf_intr(void *arg) 199 1.2.6.2 tls { 200 1.2.6.2 tls struct wdc_xsurf_softc *sc; 201 1.2.6.2 tls uint8_t intreq; 202 1.2.6.2 tls int r1, r2; 203 1.2.6.2 tls 204 1.2.6.2 tls sc = (struct wdc_xsurf_softc *)arg; 205 1.2.6.2 tls r1 = r2 = 0; 206 1.2.6.2 tls 207 1.2.6.2 tls intreq = bus_space_read_1(sc->sc_cmdt, sc->sc_isrh, 0); 208 1.2.6.2 tls bus_space_write_1(sc->sc_cmdt, sc->sc_isrh, 0, 0); /* pull A11 down */ 209 1.2.6.2 tls 210 1.2.6.2 tls /* only one register for both channels... :/ */ 211 1.2.6.2 tls if (intreq & WDC_XSURF_ISR_HIGH) { 212 1.2.6.2 tls r1 = wdcintr(&sc->sc_ports[0].channel); 213 1.2.6.2 tls r2 = wdcintr(&sc->sc_ports[1].channel); 214 1.2.6.2 tls } 215 1.2.6.2 tls 216 1.2.6.2 tls return r1 | r2; 217 1.2.6.2 tls } 218
Indexes created Wed Oct 22 13:09:56 GMT 2025