cpu.h revision 1.41 1 1.41 is /* $NetBSD: cpu.h,v 1.41 1998/09/05 21:10:55 is Exp $ */
2 1.15 cgd
3 1.1 mw /*
4 1.1 mw * Copyright (c) 1988 University of Utah.
5 1.1 mw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 mw * All rights reserved.
7 1.1 mw *
8 1.1 mw * This code is derived from software contributed to Berkeley by
9 1.1 mw * the Systems Programming Group of the University of Utah Computer
10 1.1 mw * Science Department.
11 1.1 mw *
12 1.1 mw * Redistribution and use in source and binary forms, with or without
13 1.1 mw * modification, are permitted provided that the following conditions
14 1.1 mw * are met:
15 1.1 mw * 1. Redistributions of source code must retain the above copyright
16 1.1 mw * notice, this list of conditions and the following disclaimer.
17 1.1 mw * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 mw * notice, this list of conditions and the following disclaimer in the
19 1.1 mw * documentation and/or other materials provided with the distribution.
20 1.1 mw * 3. All advertising materials mentioning features or use of this software
21 1.1 mw * must display the following acknowledgement:
22 1.1 mw * This product includes software developed by the University of
23 1.1 mw * California, Berkeley and its contributors.
24 1.1 mw * 4. Neither the name of the University nor the names of its contributors
25 1.1 mw * may be used to endorse or promote products derived from this software
26 1.1 mw * without specific prior written permission.
27 1.1 mw *
28 1.1 mw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.1 mw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.1 mw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.1 mw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.1 mw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.1 mw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.1 mw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.1 mw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.1 mw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.1 mw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.1 mw * SUCH DAMAGE.
39 1.1 mw *
40 1.4 mw * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 1.4 mw *
42 1.4 mw * @(#)cpu.h 7.7 (Berkeley) 6/27/91
43 1.1 mw */
44 1.9 chopps #ifndef _MACHINE_CPU_H_
45 1.9 chopps #define _MACHINE_CPU_H_
46 1.1 mw
47 1.1 mw /*
48 1.1 mw * Exported definitions unique to amiga/68k cpu support.
49 1.1 mw */
50 1.1 mw
51 1.1 mw /*
52 1.36 thorpej * Get common m68k CPU definitions.
53 1.36 thorpej */
54 1.36 thorpej #include <m68k/cpu.h>
55 1.36 thorpej #define M68K_MMU_MOTOROLA
56 1.36 thorpej
57 1.36 thorpej /*
58 1.1 mw * definitions of cpu-dependent requirements
59 1.1 mw * referenced in generic code
60 1.1 mw */
61 1.13 chopps #define cpu_swapin(p) /* nothing */
62 1.13 chopps #define cpu_wait(p) /* nothing */
63 1.21 chopps #define cpu_swapout(p) /* nothing */
64 1.13 chopps
65 1.1 mw /*
66 1.13 chopps * Arguments to hardclock and gatherstats encapsulate the previous
67 1.13 chopps * machine state in an opaque clockframe. One the hp300, we use
68 1.13 chopps * what the hardware pushes on an interrupt (frame format 0).
69 1.1 mw */
70 1.11 chopps struct clockframe {
71 1.13 chopps u_short sr; /* sr at time of interrupt */
72 1.13 chopps u_long pc; /* pc at time of interrupt */
73 1.13 chopps u_short vo; /* vector offset (4-word frame) */
74 1.11 chopps };
75 1.11 chopps
76 1.13 chopps #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
77 1.16 chopps /*#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)*/
78 1.16 chopps #define CLKF_BASEPRI(framep) (0)
79 1.13 chopps #define CLKF_PC(framep) ((framep)->pc)
80 1.13 chopps #if 0
81 1.13 chopps /* We would like to do it this way... */
82 1.13 chopps #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
83 1.13 chopps #else
84 1.13 chopps /* but until we start using PSL_M, we have to do this instead */
85 1.13 chopps #define CLKF_INTR(framep) (0) /* XXX */
86 1.13 chopps #endif
87 1.1 mw
88 1.1 mw
89 1.1 mw /*
90 1.1 mw * Preempt the current process if in interrupt from user mode,
91 1.1 mw * or after the current trap/syscall if in system mode.
92 1.1 mw */
93 1.40 scottr extern int want_resched; /* resched() was called */
94 1.11 chopps #define need_resched() {want_resched = 1; setsoftast();}
95 1.1 mw
96 1.1 mw /*
97 1.1 mw * Give a profiling tick to the current process from the softclock
98 1.1 mw * interrupt. On hp300, request an ast to send us through trap(),
99 1.1 mw * marking the proc as needing a profiling tick.
100 1.1 mw */
101 1.11 chopps #define profile_tick(p, framep) ((p)->p_flag |= P_OWEUPC, setsoftast())
102 1.11 chopps #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast())
103 1.1 mw
104 1.1 mw /*
105 1.1 mw * Notify the current process (p) that it has a signal pending,
106 1.1 mw * process as soon as possible.
107 1.1 mw */
108 1.11 chopps #define signotify(p) setsoftast()
109 1.1 mw
110 1.40 scottr extern int astpending; /* need trap before returning to user mode */
111 1.11 chopps #define setsoftast() (astpending = 1)
112 1.1 mw
113 1.1 mw
114 1.16 chopps /* include support for software interrupts */
115 1.16 chopps #include <machine/mtpr.h>
116 1.1 mw
117 1.1 mw /*
118 1.1 mw * The rest of this should probably be moved to ../amiga/amigacpu.h,
119 1.1 mw * although some of it could probably be put into generic 68k headers.
120 1.1 mw */
121 1.1 mw
122 1.22 chopps /* values for machineid (happen to be AFF_* settings of AttnFlags) */
123 1.1 mw #define AMIGA_68020 (1L<<1)
124 1.1 mw #define AMIGA_68030 (1L<<2)
125 1.1 mw #define AMIGA_68040 (1L<<3)
126 1.1 mw #define AMIGA_68881 (1L<<4)
127 1.1 mw #define AMIGA_68882 (1L<<5)
128 1.1 mw #define AMIGA_FPU40 (1L<<6)
129 1.26 is #define AMIGA_68060 (1L<<7)
130 1.1 mw
131 1.17 jtc #ifdef _KERNEL
132 1.36 thorpej int machineid;
133 1.1 mw #endif
134 1.12 chopps
135 1.12 chopps /*
136 1.12 chopps * CTL_MACHDEP definitions.
137 1.12 chopps */
138 1.12 chopps #define CPU_CONSDEV 1 /* dev_t: console terminal device */
139 1.12 chopps #define CPU_MAXID 2 /* number of valid machdep ids */
140 1.12 chopps
141 1.12 chopps #define CTL_MACHDEP_NAMES { \
142 1.12 chopps { 0, 0 }, \
143 1.12 chopps { "console_device", CTLTYPE_STRUCT }, \
144 1.12 chopps }
145 1.29 veego
146 1.29 veego #ifdef _KERNEL
147 1.29 veego /*
148 1.29 veego * Prototypes from amiga_init.c
149 1.29 veego */
150 1.29 veego void *alloc_z2mem __P((long));
151 1.29 veego
152 1.29 veego /*
153 1.29 veego * Prototypes from autoconf.c
154 1.29 veego */
155 1.29 veego void configure __P((void));
156 1.29 veego int is_a1200 __P((void));
157 1.29 veego int is_a3000 __P((void));
158 1.29 veego int is_a4000 __P((void));
159 1.35 is #ifdef DRACO
160 1.41 is #define is_draco() ((machineid >> 24) == 0x7d ? (machineid >> 16) & 0xff : 0)
161 1.35 is #endif
162 1.29 veego
163 1.29 veego /*
164 1.29 veego * Prototypes from clock.c
165 1.29 veego */
166 1.29 veego u_long clkread __P((void));
167 1.35 is
168 1.35 is #ifdef DRACO
169 1.35 is /*
170 1.35 is * Prototypes from kbd.c
171 1.35 is */
172 1.35 is void drkbdintr __P((void));
173 1.35 is
174 1.35 is /*
175 1.35 is * Prototypes from drsc.c
176 1.35 is */
177 1.35 is void drsc_handler __P((void));
178 1.35 is #endif
179 1.29 veego
180 1.29 veego /*
181 1.29 veego * Prototypes from locore.s
182 1.29 veego */
183 1.29 veego struct fpframe;
184 1.29 veego struct user;
185 1.29 veego struct pcb;
186 1.29 veego
187 1.29 veego void clearseg __P((vm_offset_t));
188 1.31 veego void doboot __P((void)) __attribute__((__noreturn__));
189 1.29 veego void loadustp __P((int));
190 1.29 veego #ifdef FPCOPROC
191 1.29 veego void m68881_save __P((struct fpframe *));
192 1.29 veego void m68881_restore __P((struct fpframe *));
193 1.29 veego #endif
194 1.29 veego void physcopyseg __P((vm_offset_t, vm_offset_t));
195 1.29 veego u_int probeva __P((u_int, u_int));
196 1.29 veego void proc_trampoline __P((void));
197 1.29 veego void savectx __P((struct pcb *));
198 1.29 veego void switch_exit __P((struct proc *));
199 1.29 veego void DCIAS __P((vm_offset_t));
200 1.33 is void DCIA __P((void));
201 1.29 veego void DCIS __P((void));
202 1.29 veego void DCIU __P((void));
203 1.29 veego void ICIA __P((void));
204 1.29 veego void ICPA __P((void));
205 1.29 veego void PCIA __P((void));
206 1.29 veego void TBIA __P((void));
207 1.29 veego void TBIS __P((vm_offset_t));
208 1.29 veego void TBIAS __P((void));
209 1.29 veego void TBIAU __P((void));
210 1.32 is #if defined(M68040) || defined(M68060)
211 1.29 veego void DCFA __P((void));
212 1.29 veego void DCFP __P((vm_offset_t));
213 1.29 veego void DCFL __P((vm_offset_t));
214 1.29 veego void DCPL __P((vm_offset_t));
215 1.29 veego void DCPP __P((vm_offset_t));
216 1.29 veego void ICPL __P((vm_offset_t));
217 1.29 veego void ICPP __P((vm_offset_t));
218 1.29 veego #endif
219 1.29 veego
220 1.29 veego /*
221 1.29 veego * Prototypes from machdep.c
222 1.29 veego */
223 1.29 veego int badaddr __P((caddr_t));
224 1.29 veego int badbaddr __P((caddr_t));
225 1.29 veego void bootsync __P((void));
226 1.29 veego void dumpconf __P((void));
227 1.29 veego
228 1.29 veego /*
229 1.29 veego * Prototypes from sys_machdep.c:
230 1.29 veego */
231 1.29 veego int cachectl __P((int, caddr_t, int));
232 1.29 veego int dma_cachectl __P((caddr_t, int));
233 1.29 veego
234 1.29 veego /*
235 1.29 veego * Prototypes from vm_machdep.c
236 1.29 veego */
237 1.29 veego int kvtop __P((caddr_t));
238 1.29 veego void physaccess __P((caddr_t, caddr_t, int, int));
239 1.29 veego void physunaccess __P((caddr_t, int));
240 1.29 veego void setredzone __P((u_int *, caddr_t));
241 1.29 veego
242 1.29 veego /*
243 1.29 veego * Prototypes from pmap.c:
244 1.29 veego */
245 1.29 veego void pmap_bootstrap __P((vm_offset_t, vm_offset_t));
246 1.29 veego
247 1.29 veego #endif /* _KERNEL */
248 1.8 chopps
249 1.9 chopps #endif /* !_MACHINE_CPU_H_ */
250