pte.h revision 1.9 1 1.1 mw /*
2 1.1 mw * Copyright (c) 1988 University of Utah.
3 1.1 mw * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4 1.1 mw * All rights reserved.
5 1.1 mw *
6 1.1 mw * This code is derived from software contributed to Berkeley by
7 1.1 mw * the Systems Programming Group of the University of Utah Computer
8 1.1 mw * Science Department.
9 1.1 mw *
10 1.1 mw * Redistribution and use in source and binary forms, with or without
11 1.1 mw * modification, are permitted provided that the following conditions
12 1.1 mw * are met:
13 1.1 mw * 1. Redistributions of source code must retain the above copyright
14 1.1 mw * notice, this list of conditions and the following disclaimer.
15 1.1 mw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 mw * notice, this list of conditions and the following disclaimer in the
17 1.1 mw * documentation and/or other materials provided with the distribution.
18 1.1 mw * 3. All advertising materials mentioning features or use of this software
19 1.1 mw * must display the following acknowledgement:
20 1.1 mw * This product includes software developed by the University of
21 1.1 mw * California, Berkeley and its contributors.
22 1.1 mw * 4. Neither the name of the University nor the names of its contributors
23 1.1 mw * may be used to endorse or promote products derived from this software
24 1.1 mw * without specific prior written permission.
25 1.1 mw *
26 1.1 mw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 1.1 mw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 1.1 mw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 1.1 mw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 1.1 mw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 1.1 mw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 1.1 mw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 1.1 mw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 1.1 mw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 1.1 mw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 1.1 mw * SUCH DAMAGE.
37 1.1 mw *
38 1.1 mw * from: Utah $Hdr: pte.h 1.11 89/09/03$
39 1.1 mw *
40 1.1 mw * @(#)pte.h 7.3 (Berkeley) 5/8/91
41 1.9 chopps * $Id: pte.h,v 1.9 1994/06/08 04:14:39 chopps Exp $
42 1.1 mw */
43 1.4 chopps #ifndef _MACHINE_PTE_H_
44 1.4 chopps #define _MACHINE_PTE_H_
45 1.1 mw
46 1.1 mw /*
47 1.1 mw * AMIGA hardware segment/page table entries
48 1.1 mw */
49 1.9 chopps
50 1.9 chopps struct pte {
51 1.9 chopps u_int pte;
52 1.9 chopps };
53 1.9 chopps
54 1.9 chopps struct ste {
55 1.9 chopps u_int ste;
56 1.9 chopps };
57 1.1 mw
58 1.8 chopps #define PT_ENTRY_NULL ((u_int *) 0)
59 1.8 chopps #define ST_ENTRY_NULL ((u_int *) 0)
60 1.1 mw
61 1.1 mw #define SG_V 0x00000002 /* segment is valid */
62 1.1 mw #define SG_NV 0x00000000
63 1.1 mw #define SG_PROT 0x00000004 /* access protection mask */
64 1.1 mw #define SG_RO 0x00000004
65 1.1 mw #define SG_RW 0x00000000
66 1.8 chopps #define SG_U 0x00000008 /* modified bit (68040) */
67 1.1 mw #define SG_FRAME 0xffffe000
68 1.1 mw #define SG_IMASK 0xff000000
69 1.8 chopps #define SG_ISHIFT 24
70 1.1 mw #define SG_PMASK 0x00ffe000
71 1.1 mw #define SG_PSHIFT 13
72 1.1 mw
73 1.8 chopps /* 68040 additions */
74 1.8 chopps #define SG4_IMASK1 0xfe000000
75 1.8 chopps #define SG4_ISHIFT1 25
76 1.8 chopps #define SG4_IMASK2 0x01fc0000
77 1.8 chopps #define SG4_IMASK 0xfffc0000
78 1.8 chopps #define SG4_PMASK 0x0003e000
79 1.8 chopps #define SG4_ISHIFT 18
80 1.1 mw
81 1.1 mw #define PG_V 0x00000001
82 1.1 mw #define PG_NV 0x00000000
83 1.1 mw #define PG_PROT 0x00000004
84 1.1 mw #define PG_U 0x00000008
85 1.1 mw #define PG_M 0x00000010
86 1.1 mw #define PG_W 0x00000100
87 1.1 mw #define PG_RO 0x00000004
88 1.1 mw #define PG_RW 0x00000000
89 1.8 chopps #define PG_FRAME 0xffffe000
90 1.1 mw #define PG_CI 0x00000040
91 1.1 mw #define PG_SHIFT 13
92 1.1 mw #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT)
93 1.1 mw
94 1.8 chopps /* 68040 additions */
95 1.8 chopps #define PG_CMASK 0x00000060 /* cache mode mask */
96 1.8 chopps #define PG_CWT 0x00000000 /* writethrough caching */
97 1.8 chopps #define PG_CCB 0x00000020 /* copyback caching */
98 1.8 chopps #define PG_CIS 0x00000040 /* cache inhibited serialized */
99 1.8 chopps #define PG_CIN 0x00000060 /* cache inhibited nonserialized */
100 1.8 chopps #define PG_SO 0x00000080 /* supervisor only */
101 1.8 chopps
102 1.7 chopps #define AMIGA_040RTSIZE 512 /* root (level 1) table size */
103 1.7 chopps #define AMIGA_040STSIZE 512 /* segment (level 2) table size */
104 1.7 chopps #define AMIGA_040PTSIZE 128 /* page (level 3) table size */
105 1.7 chopps #define AMIGA_STSIZE 1024 /* segment table size */
106 1.7 chopps /*
107 1.7 chopps * AMIGA_MAX_COREUPT maximum number of incore user page tables
108 1.7 chopps * AMIGA_USER_PTSIZE the number of bytes for user pagetables
109 1.7 chopps * AMIGA_PTBASE the VA start of the map from which upt's are allocated
110 1.7 chopps * AMIGA_PTSIZE the size of the map from which upt's are allocated
111 1.7 chopps * AMIGA_KPTSIZE size of kernel page table
112 1.7 chopps * AMIGA_MAX_KPTSIZE the most number of bytes for kpt pages
113 1.7 chopps * AMIGA_MAX_PTSIZE the number of bytes to map everything
114 1.7 chopps */
115 1.7 chopps #define AMIGA_MAX_COREUPT 1024
116 1.7 chopps #define AMIGA_UPTSIZE roundup(VM_MAXUSER_ADDRESS / NPTEPG, NBPG)
117 1.7 chopps #define AMIGA_UPTBASE 0x10000000
118 1.7 chopps #define AMIGA_UPTMAXSIZE \
119 1.7 chopps roundup((AMIGA_MAX_COREUPT * AMIGA_UPTSIZE), NBPG)
120 1.7 chopps #define AMIGA_MAX_KPTSIZE \
121 1.7 chopps (AMIGA_MAX_COREUPT * AMIGA_UPTSIZE / NPTEPG)
122 1.7 chopps #define AMIGA_KPTSIZE \
123 1.7 chopps roundup((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / NPTEPG, NBPG)
124 1.7 chopps #define AMIGA_MAX_PTSIZE roundup(0xffffffff / NPTEPG, NBPG)
125 1.1 mw
126 1.1 mw /*
127 1.1 mw * Kernel virtual address to page table entry and to physical address.
128 1.1 mw */
129 1.1 mw #define kvtopte(va) \
130 1.1 mw (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT])
131 1.1 mw #define ptetokv(pt) \
132 1.8 chopps ((((u_int *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
133 1.1 mw #define kvtophys(va) \
134 1.1 mw ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET))
135 1.1 mw
136 1.1 mw
137 1.4 chopps #endif /* !_MACHINE_PTE_H_ */
138