pte.h revision 1.7
1 /* 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: Utah $Hdr: pte.h 1.11 89/09/03$ 39 * 40 * @(#)pte.h 7.3 (Berkeley) 5/8/91 41 * $Id: pte.h,v 1.7 1994/06/04 05:25:03 chopps Exp $ 42 */ 43 #ifndef _MACHINE_PTE_H_ 44 #define _MACHINE_PTE_H_ 45 46 /* 47 * AMIGA hardware segment/page table entries 48 */ 49 50 struct ste { 51 unsigned int sg_pfnum:20; /* page table frame number */ 52 unsigned int :8; /* reserved at 0 */ 53 unsigned int :1; /* reserved at 1 */ 54 unsigned int sg_prot:1; /* write protect bit */ 55 unsigned int sg_v:2; /* valid bits */ 56 }; 57 58 struct pte { 59 unsigned int pg_pfnum:20; /* page frame number or 0 */ 60 unsigned int :3; 61 unsigned int pg_w:1; /* is wired */ 62 unsigned int :1; /* reserved at zero */ 63 unsigned int pg_ci:1; /* cache inhibit bit */ 64 unsigned int pg_cm1:1; /* cache mode, lsb (68040) */ 65 unsigned int pg_m:1; /* hardware modified (dirty) bit */ 66 unsigned int pg_u:1; /* hardware used (reference) bit */ 67 unsigned int pg_prot:1; /* write protect bit */ 68 unsigned int pg_v:2; /* valid bit */ 69 }; 70 71 typedef struct ste st_entry_t; /* segment table entry */ 72 typedef struct pte pt_entry_t; /* Mach page table entry */ 73 74 #define PT_ENTRY_NULL ((pt_entry_t *) 0) 75 #define ST_ENTRY_NULL ((st_entry_t *) 0) 76 77 #define SG_V 0x00000002 /* segment is valid */ 78 #define SG_NV 0x00000000 79 #define SG_PROT 0x00000004 /* access protection mask */ 80 #define SG_RO 0x00000004 81 #define SG_RW 0x00000000 82 #define SG_FRAME 0xffffe000 83 #define SG_IMASK1 0xfe000000 84 #define SG_IMASK2 0x01fc0000 85 #define SG_040IMASK 0xfffc0000 86 #define SG_040PMASK 0x0003e000 87 #define SG_ISHIFT1 25 88 #define SG_040ISHIFT 18 89 #define SG_IMASK 0xff000000 90 #define SG_PMASK 0x00ffe000 91 #define SG_ISHIFT 24 92 #define SG_PSHIFT 13 93 94 95 #define PG_V 0x00000001 96 #define PG_NV 0x00000000 97 #define PG_PROT 0x00000004 98 #define PG_U 0x00000008 99 #define PG_M 0x00000010 100 #define PG_W 0x00000100 101 #define PG_RO 0x00000004 102 #define PG_RW 0x00000000 103 #define PG_CI 0x00000040 104 #define PG_CC 0x00000020 /* Cachable, copyback */ 105 #define PG_CIN 0x00000060 /* Cache inhibited, nonserialized */ 106 #define PG_CMASK 0x00000060 /* Cache mask for 040 */ 107 #define PG_FRAME 0xffffe000 108 #define PG_SHIFT 13 109 #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) 110 111 #define AMIGA_040RTSIZE 512 /* root (level 1) table size */ 112 #define AMIGA_040STSIZE 512 /* segment (level 2) table size */ 113 #define AMIGA_040PTSIZE 128 /* page (level 3) table size */ 114 #define AMIGA_STSIZE 1024 /* segment table size */ 115 /* 116 * AMIGA_MAX_COREUPT maximum number of incore user page tables 117 * AMIGA_USER_PTSIZE the number of bytes for user pagetables 118 * AMIGA_PTBASE the VA start of the map from which upt's are allocated 119 * AMIGA_PTSIZE the size of the map from which upt's are allocated 120 * AMIGA_KPTSIZE size of kernel page table 121 * AMIGA_MAX_KPTSIZE the most number of bytes for kpt pages 122 * AMIGA_MAX_PTSIZE the number of bytes to map everything 123 */ 124 #define AMIGA_MAX_COREUPT 1024 125 #define AMIGA_UPTSIZE roundup(VM_MAXUSER_ADDRESS / NPTEPG, NBPG) 126 #define AMIGA_UPTBASE 0x10000000 127 #define AMIGA_UPTMAXSIZE \ 128 roundup((AMIGA_MAX_COREUPT * AMIGA_UPTSIZE), NBPG) 129 #define AMIGA_MAX_KPTSIZE \ 130 (AMIGA_MAX_COREUPT * AMIGA_UPTSIZE / NPTEPG) 131 #define AMIGA_KPTSIZE \ 132 roundup((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / NPTEPG, NBPG) 133 #define AMIGA_MAX_PTSIZE roundup(0xffffffff / NPTEPG, NBPG) 134 135 /* 136 * Kernel virtual address to page table entry and to physical address. 137 */ 138 #define kvtopte(va) \ 139 (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) 140 #define ptetokv(pt) \ 141 ((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) 142 #define kvtophys(va) \ 143 ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET)) 144 145 146 #endif /* !_MACHINE_PTE_H_ */ 147
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