mppb.c revision 1.2
1 /* $NetBSD: mppb.c,v 1.2 2011/09/19 19:15:29 rkujawa Exp $ */ 2 3 /*- 4 * Copyright (c) 2011 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* Matay Prometheus Zorro-PCI bridge driver. */ 33 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/time.h> 37 #include <sys/systm.h> 38 #include <sys/errno.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/extent.h> 42 #include <sys/kmem.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/bus.h> 47 #include <machine/cpu.h> 48 49 #include <m68k/bus_dma.h> 50 #include <amiga/dev/zbusvar.h> 51 #include <amiga/pci/mppbreg.h> 52 53 #include <dev/pci/pcivar.h> 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcidevs.h> 56 #include <dev/pci/pciconf.h> 57 58 /* Zorro IDs */ 59 #define ZORRO_MANID_MATAY 44359 60 #define ZORRO_PRODID_PROMETHEUS 1 61 62 struct mppb_softc { 63 device_t sc_dev; 64 volatile char *ba; 65 struct bus_space_tag pci_conf_area; 66 struct bus_space_tag pci_io_area; 67 struct bus_space_tag pci_mem_area; 68 struct amiga_pci_chipset apc; 69 }; 70 71 static int mppb_match(struct device *, struct cfdata *, void *); 72 static void mppb_attach(struct device *, struct device *, void *); 73 pcireg_t mppb_pci_conf_read(pci_chipset_tag_t, pcitag_t, int); 74 void mppb_pci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 75 int mppb_pci_bus_maxdevs(pci_chipset_tag_t pc, int busno); 76 void mppb_pci_attach_hook (struct device *parent, 77 struct device *self, struct pcibus_attach_args *pba); 78 pcitag_t mppb_pci_make_tag(pci_chipset_tag_t pc, int bus, int device, 79 int function); 80 void mppb_pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, 81 int *bp, int *dp, int *fp); 82 int mppb_pci_intr_map(const struct pci_attach_args *pa, 83 pci_intr_handle_t *ihp); 84 const struct evcnt * mppb_pci_intr_evcnt(pci_chipset_tag_t pc, 85 pci_intr_handle_t ih); 86 87 CFATTACH_DECL_NEW(mppb, sizeof(struct mppb_softc), 88 mppb_match, mppb_attach, NULL, NULL); 89 90 static int 91 mppb_match(device_t parent, cfdata_t cf, void *aux) 92 { 93 struct zbus_args *zap; 94 95 zap = aux; 96 97 if (zap->manid != ZORRO_MANID_MATAY) 98 return 0; 99 100 if (zap->prodid != ZORRO_PRODID_PROMETHEUS) 101 return 0; 102 103 #ifdef MPPB_DEBUG 104 aprint_normal("mppb matched by Zorro ID %d, %d\n", zap->manid, 105 zap->prodid); 106 #endif 107 108 return 1; 109 } 110 111 112 static void 113 mppb_attach(device_t parent, device_t self, void *aux) 114 { 115 struct mppb_softc *sc; 116 struct pcibus_attach_args pba; 117 struct zbus_args *zap; 118 pci_chipset_tag_t pc; 119 struct extent *ioext, *memext; 120 121 zap = aux; 122 sc = device_private(self); 123 pc = &sc->apc; 124 sc->sc_dev = self; 125 sc->ba = zap->va; 126 127 aprint_normal(": Matay Prometheus PCI bridge\n"); 128 129 /* Setup bus space mappings. */ 130 sc->pci_conf_area.base = (bus_addr_t) sc->ba + MPPB_CONF_BASE; 131 sc->pci_conf_area.absm = &amiga_bus_stride_1swap; 132 133 sc->pci_mem_area.base = (bus_addr_t) sc->ba + MPPB_MEM_BASE; 134 sc->pci_mem_area.absm = &amiga_bus_stride_1; 135 136 sc->pci_io_area.base = (bus_addr_t) sc->ba + MPPB_IO_BASE; 137 sc->pci_io_area.absm = &amiga_bus_stride_1; 138 139 #ifdef MPPB_DEBUG 140 aprint_normal("mppb mapped conf %x->%x, mem %x->%x\n, io %x->%x", 141 (zap->pa) + MPPB_CONF_BASE, sc->pci_conf_area.base, 142 (zap->pa) + MPPB_MEM_BASE, sc->pci_mem_area.base, 143 (zap->pa) + MPPB_IO_BASE, sc->pci_io_area.base); 144 #endif 145 146 sc->apc.pci_conf_datat = &(sc->pci_conf_area); 147 148 if (bus_space_map(sc->apc.pci_conf_datat, 0, MPPB_CONF_SIZE, 0, 149 &sc->apc.pci_conf_datah)) 150 aprint_error_dev(self, 151 "couldn't map PCI configuration data space\n"); 152 153 /* Initialize the PCI chipset tag. */ 154 sc->apc.pc_conf_v = (void*) pc; 155 sc->apc.pc_bus_maxdevs = mppb_pci_bus_maxdevs; 156 sc->apc.pc_make_tag = amiga_pci_make_tag; 157 sc->apc.pc_decompose_tag = amiga_pci_decompose_tag; 158 sc->apc.pc_conf_read = mppb_pci_conf_read; 159 sc->apc.pc_conf_write = mppb_pci_conf_write; 160 sc->apc.pc_attach_hook = mppb_pci_attach_hook; 161 162 sc->apc.pc_intr_map = mppb_pci_intr_map; 163 sc->apc.pc_intr_string = amiga_pci_intr_string; 164 sc->apc.pc_intr_establish = amiga_pci_intr_establish; 165 sc->apc.pc_intr_disestablish = amiga_pci_intr_disestablish; 166 167 sc->apc.pc_conf_hook = amiga_pci_conf_hook; 168 sc->apc.pc_conf_interrupt = amiga_pci_conf_interrupt; 169 170 ioext = extent_create("mppbio", MPPB_IO_BASE, 171 MPPB_IO_BASE + MPPB_IO_SIZE, M_DEVBUF, NULL, 0, EX_NOWAIT); 172 memext = extent_create("mppbmem", MPPB_MEM_BASE, 173 MPPB_MEM_BASE + MPPB_MEM_SIZE, M_DEVBUF, NULL, 0, EX_NOWAIT); 174 175 pci_configure_bus(pc, ioext, memext, NULL, 0, CACHELINE_SIZE); 176 177 extent_destroy(ioext); 178 extent_destroy(memext); 179 180 pba.pba_iot = &(sc->pci_io_area); 181 pba.pba_memt = &(sc->pci_mem_area); 182 pba.pba_dmat = NULL; 183 pba.pba_dmat64 = NULL; 184 pba.pba_pc = pc; 185 pba.pba_flags = PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY; 186 pba.pba_bus = 0; 187 pba.pba_bridgetag = NULL; 188 189 config_found_ia(self, "pcibus", &pba, pcibusprint); 190 } 191 192 pcireg_t 193 mppb_pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 194 { 195 uint32_t data; 196 uint32_t bus, dev, func; 197 198 pci_decompose_tag(pc, tag, &bus, &dev, &func); 199 200 data = bus_space_read_4(pc->pci_conf_datat, pc->pci_conf_datah, 201 (MPPB_CONF_STRIDE*dev) + reg); 202 #ifdef MPPB_DEBUG 203 aprint_normal("mppb conf read va: %lx, bus: %d, dev: %d, " 204 "func: %d, reg: %d -r-> data %x\n", 205 pc->pci_conf_datah, bus, dev, func, reg, data); 206 #endif 207 return data; 208 } 209 210 void 211 mppb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val) 212 { 213 uint32_t bus, dev, func; 214 215 pci_decompose_tag(pc, tag, &bus, &dev, &func); 216 217 bus_space_write_4(pc->pci_conf_datat, pc->pci_conf_datah, 218 (MPPB_CONF_STRIDE*dev) + reg, val); 219 #ifdef MPPB_DEBUG 220 aprint_normal("mppb conf write va: %lx, bus: %d, dev: %d, " 221 "func: %d, reg: %d -w-> data %x\n", 222 pc->pci_conf_datah, bus, dev, func, reg, val); 223 #endif 224 225 } 226 227 int 228 mppb_pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 229 { 230 return 4; /* Prometheus has 4 slots */ 231 } 232 233 void 234 mppb_pci_attach_hook(struct device *parent, struct device *self, 235 struct pcibus_attach_args *pba) 236 { 237 } 238 239 int 240 mppb_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 241 { 242 /* TODO: add sanity checking */ 243 244 *ihp = MPPB_INT; 245 return 0; 246 } 247 248 const struct evcnt * 249 mppb_pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 250 { 251 /* TODO: implement */ 252 return NULL; 253 } 254 255
Indexes created Thu Oct 02 14:10:14 GMT 2025